sh_il.c

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// SPDX-FileCopyrightText: 2022 Dhruv Maroo <dhruvmaru007@gmail.com>
// SPDX-License-Identifier: LGPL-3.0-only
 
#include "sh_il.h"
#include <rz_il/rz_il_opbuilder_begin.h>
#include "../../../asm/arch/sh/regs.h"
 
#define SH_U_ADDR(x) UN(SH_ADDR_SIZE, x)
#define SH_S_ADDR(x) SN(SH_ADDR_SIZE, x)
#define SH_U_REG(x)  UN(SH_REG_SIZE, (x))
#define SH_S_REG(x)  SN(SH_REG_SIZE, (x))
#define SH_BIT(x)    UN(1, x)
#define SH_TRUE      SH_U_REG(1)
#define SH_FALSE     SH_U_REG(0)
 
#define sh_il_get_pure_param(x) \
    sh_il_get_param(op->param[x], op->scaling).pure
 
#define sh_il_set_pure_param(x, val) \
    sh_il_set_param(op->param[x], val, op->scaling)
 
#define sh_il_get_effective_addr_param(x) \
    sh_il_get_effective_addr(op->param[x], op->scaling)
 
/* Utilities */
 
static bool sh_valid_gpr(ut16 reg) {
    return reg < SH_GPR_COUNT;
}
 
static bool sh_banked_reg(ut16 reg) {
    return reg < SH_BANKED_REG_COUNT;
}
 
static const char *sh_global_registers[] = {
    "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 
    "r0b", "r1b", "r2b", "r3b", "r4b", "r5b", "r6b", "r7b", 
    "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", "sr",
    SH_SR_T, SH_SR_S, SH_SR_I, SH_SR_I, SH_SR_Q, SH_SR_M, SH_SR_F, SH_SR_B, SH_SR_R, SH_SR_D, 
    "gbr", "ssr", "spc", "sgr", "dbr", "vbr", "mach", "macl", "pr"
};
 
RzILOpEffect *sh_il_signed(unsigned int len, RZ_OWN RzILOpPure *val, const char *cast_var, const char *temp_var) {
    RzILOpEffect *init = SETL(temp_var, val);
    RzILOpPure *cast = rz_il_op_new_cast(len, MSB(VARL(temp_var)), VARL(temp_var));
    RzILOpEffect *set = SETL(cast_var, cast);
 
    return SEQ2(init, set);
}
 
static const char *sh_get_banked_reg(ut16 reg, ut8 bank) {
    if (!sh_banked_reg(reg) || bank > 1) {
        return NULL;
    }
    return sh_global_registers[reg + bank * SH_BANKED_REG_COUNT];
}
 
static RzILOpBitVector *sh_il_bool_to_bv(RzILOpBool *b) {
    return ITE(b, SH_TRUE, SH_FALSE);
}
 
static RzILOpBitVector *sh_il_get_status_reg_bit(const char *bit) {
    return sh_il_bool_to_bv(VARG(bit));
}
 
static RzILOpPure *sh_il_get_status_reg() {
    RzILOpPure *val = SH_U_REG(0);
    val = LOGOR(sh_il_get_status_reg_bit(SH_SR_D), val);
    val = SHIFTL0(val, SH_U_REG(1));
    val = LOGOR(sh_il_get_status_reg_bit(SH_SR_R), val);
    val = SHIFTL0(val, SH_U_REG(1));
    val = LOGOR(sh_il_get_status_reg_bit(SH_SR_B), val);
    val = SHIFTL0(val, SH_U_REG(13));
    val = LOGOR(sh_il_get_status_reg_bit(SH_SR_F), val);
    val = SHIFTL0(val, SH_U_REG(6));
    val = LOGOR(sh_il_get_status_reg_bit(SH_SR_M), val);
    val = SHIFTL0(val, SH_U_REG(1));
    val = LOGOR(sh_il_get_status_reg_bit(SH_SR_Q), val);
    val = SHIFTL0(val, SH_U_REG(4));
    // VARG(SH_SR_I) is of 4 bits
    val = LOGOR(UNSIGNED(SH_REG_SIZE, VARG(SH_SR_I)), val);
    val = SHIFTL0(val, SH_U_REG(3));
    val = LOGOR(sh_il_get_status_reg_bit(SH_SR_S), val);
    val = SHIFTL0(val, SH_U_REG(1));
    val = LOGOR(sh_il_get_status_reg_bit(SH_SR_T), val);
 
    return val;
}
 
static RzILOpEffect *sh_il_set_status_reg(RZ_OWN RzILOpPure *val) {
    RzILOpEffect *sreg = SETL("_sreg", val);
    RzILOpEffect *eff = SETG(SH_SR_T, LSB(VARL("_sreg")));
 
    eff = SEQ2(eff, SETL("_sreg", SHIFTR0(VARL("_sreg"), SH_U_REG(1))));
    eff = SEQ2(eff, SETG(SH_SR_S, LSB(VARL("_sreg"))));
    eff = SEQ2(eff, SETL("_sreg", SHIFTR0(VARL("_sreg"), SH_U_REG(3))));
    eff = SEQ2(eff, SETG(SH_SR_I, LOGAND(UN(4, 0xf), UNSIGNED(4, VARL("_sreg")))));
    eff = SEQ2(eff, SETL("_sreg", SHIFTR0(VARL("_sreg"), SH_U_REG(4))));
    eff = SEQ2(eff, SETG(SH_SR_Q, LSB(VARL("_sreg"))));
    eff = SEQ2(eff, SETL("_sreg", SHIFTR0(VARL("_sreg"), SH_U_REG(1))));
    eff = SEQ2(eff, SETG(SH_SR_M, LSB(VARL("_sreg"))));
    eff = SEQ2(eff, SETL("_sreg", SHIFTR0(VARL("_sreg"), SH_U_REG(6))));
    eff = SEQ2(eff, SETG(SH_SR_F, LSB(VARL("_sreg"))));
    eff = SEQ2(eff, SETL("_sreg", SHIFTR0(VARL("_sreg"), SH_U_REG(13))));
    eff = SEQ2(eff, SETG(SH_SR_B, LSB(VARL("_sreg"))));
    eff = SEQ2(eff, SETL("_sreg", SHIFTR0(VARL("_sreg"), SH_U_REG(1))));
    eff = SEQ2(eff, SETG(SH_SR_R, LSB(VARL("_sreg"))));
    eff = SEQ2(eff, SETL("_sreg", SHIFTR0(VARL("_sreg"), SH_U_REG(1))));
    eff = SEQ2(eff, SETG(SH_SR_D, LSB(VARL("_sreg"))));
 
    return SEQ2(sreg, eff);
}
 
static RzILOpEffect *sh_il_initialize_privilege() {
    return SETL("_priv", AND(VARG(SH_SR_D), VARG(SH_SR_R)));
}
 
static RzILOpPure *sh_il_get_privilege_ctx(SHILContext *ctx) {
    if (ctx) {
        ctx->privilege_check = true;
    }
    return VARL("_priv");
}
 
#define sh_il_get_privilege() sh_il_get_privilege_ctx(ctx)
 
static RzILOpPure *sh_il_get_reg_ctx(ut16 reg, SHILContext *ctx) {
    if (!sh_banked_reg(reg) || !ctx->use_banked) {
        if (reg == SH_REG_IND_SR) {
            return sh_il_get_status_reg();
        }
        return VARG(sh_registers[reg]);
    }
 
    // check if both SR.MD = 1 and SR.RB = 1
    return ITE(sh_il_get_privilege(), VARG(sh_get_banked_reg(reg, 1)), VARG(sh_get_banked_reg(reg, 0)));
}
 
#define sh_il_get_reg(reg) sh_il_get_reg_ctx(reg, ctx)
 
static RzILOpEffect *sh_il_set_reg_ctx(ut16 reg, RZ_OWN RzILOpPure *val, SHILContext *ctx) {
    if (!sh_banked_reg(reg) || !ctx->use_banked) {
        if (reg == SH_REG_IND_SR) {
            return sh_il_set_status_reg(val);
        }
        return SETG(sh_registers[reg], val);
    }
 
    return SEQ2(SETL("_regv", val), BRANCH(sh_il_get_privilege(), SETG(sh_get_banked_reg(reg, 1), VARL("_regv")), SETG(sh_get_banked_reg(reg, 0), VARL("_regv"))));
}
 
#define sh_il_set_reg(reg, val) sh_il_set_reg_ctx(reg, val, ctx)
 
typedef struct sh_param_helper_t {
    RzILOpEffect *pre; 
    RzILOpPure *pure; 
    RzILOpEffect *post; 
} SHParamHelper;
 
st16 convert_to_st12(ut16 num) {
    return (num << 4) >> 4;
}
 
static RzILOpPure *sh_il_get_effective_addr_pc_ctx(SHParam param, SHScaling scaling, ut64 pc, SHILContext *ctx) {
    switch (param.mode) {
    case SH_REG_INDIRECT:
    case SH_REG_INDIRECT_I:
    case SH_REG_INDIRECT_D:
        return sh_il_get_reg(param.param[0]);
    case SH_REG_INDIRECT_DISP:
        return ADD(sh_il_get_reg(param.param[0]), MUL(SH_U_ADDR(param.param[1]), SH_U_ADDR(sh_scaling_size[scaling])));
    case SH_REG_INDIRECT_INDEXED:
        return ADD(sh_il_get_reg(SH_REG_IND_R0), sh_il_get_reg(param.param[0]));
    case SH_GBR_INDIRECT_DISP:
        return ADD(VARG("gbr"), MUL(SH_U_ADDR(param.param[0]), SH_U_ADDR(sh_scaling_size[scaling])));
    case SH_GBR_INDIRECT_INDEXED:
        return ADD(VARG("gbr"), sh_il_get_reg(SH_REG_IND_R0));
    case SH_PC_RELATIVE_DISP: {
        RzILOpBitVector *pcbv = SH_U_ADDR(pc);
        // mask lower 2 bits if long word
        if (scaling == SH_SCALING_L) {
            pcbv = LOGAND(pcbv, SH_U_ADDR(0xfffffffc));
        }
        pcbv = ADD(pcbv, SH_U_ADDR(4));
        return ADD(pcbv, MUL(SH_U_ADDR(param.param[0]), SH_U_ADDR(sh_scaling_size[scaling])));
    }
    case SH_PC_RELATIVE8: {
        // sign-extended for 8 bits and shifted left by 1 (i.e. multiplied by 2)
        RzILOpBitVector *relative = SHIFTL0(SH_S_ADDR((st8)param.param[0]), U32(1));
        return ADD(ADD(SH_U_ADDR(pc), SH_U_ADDR(4)), relative);
    }
    case SH_PC_RELATIVE12: {
        // sign-extended for 12 bits and shifted left by 1 (i.e. multiplied by 2)
        RzILOpBitVector *relative = SHIFTL0(SH_S_ADDR(convert_to_st12(param.param[0])), U32(1));
        return ADD(ADD(SH_U_ADDR(pc), SH_U_ADDR(4)), relative);
    }
    case SH_PC_RELATIVE_REG:
        return ADD(ADD(SH_U_ADDR(pc), SH_U_ADDR(4)), sh_il_get_reg(param.param[0]));
    default:
        RZ_LOG_WARN("RzIL: SuperH: No effective address for this mode: %u\n", param.mode);
    }
 
    return NULL;
}
 
#define sh_il_get_effective_addr(x, y) sh_il_get_effective_addr_pc_ctx(x, y, pc, ctx)
 
static SHParamHelper sh_il_get_param_pc_ctx(SHParam param, SHScaling scaling, ut64 pc, SHILContext *ctx) {
    SHParamHelper ret = {
        .pre = NULL,
        .pure = NULL,
        .post = NULL
    };
 
    /* In case of invalid scaling, just default to `SH_SCALING_L`, and assume param width of 32 bits (4 bytes)
    This makes the param calculation process simpler and doesn't lead to any functional difference */
    if (scaling == SH_SCALING_INVALID) {
        scaling = SH_SCALING_L;
    }
 
    switch (param.mode) {
    case SH_REG_DIRECT:
        if (scaling == SH_SCALING_L) {
            ret.pure = sh_il_get_reg(param.param[0]);
        } else {
            ret.pure = UNSIGNED(BITS_PER_BYTE * sh_scaling_size[scaling], sh_il_get_reg(param.param[0]));
        }
        break;
    case SH_REG_INDIRECT_I:
        ret.post = sh_il_set_reg(param.param[0], ADD(sh_il_get_reg(param.param[0]), SH_U_ADDR(sh_scaling_size[scaling])));
        goto set_pure;
    case SH_REG_INDIRECT_D:
        ret.pre = sh_il_set_reg(param.param[0], SUB(sh_il_get_reg(param.param[0]), SH_U_ADDR(sh_scaling_size[scaling])));
        goto set_pure;
    case SH_REG_INDIRECT:
    case SH_REG_INDIRECT_DISP:
    case SH_REG_INDIRECT_INDEXED:
    case SH_GBR_INDIRECT_DISP:
    case SH_GBR_INDIRECT_INDEXED:
    case SH_PC_RELATIVE_DISP:
    case SH_PC_RELATIVE8:
    case SH_PC_RELATIVE12:
    case SH_PC_RELATIVE_REG:
    set_pure:
        ret.pure = LOADW(BITS_PER_BYTE * sh_scaling_size[scaling], sh_il_get_effective_addr(param, scaling));
        break;
    case SH_IMM_U:
        ret.pure = UN(sh_scaling_size[scaling] * BITS_PER_BYTE, param.param[0]);
        break;
    case SH_IMM_S:
        ret.pure = SN(sh_scaling_size[scaling] * BITS_PER_BYTE, param.param[0]);
        break;
    default:
        RZ_LOG_ERROR("RzIL: SuperH: Invalid addressing mode\n");
    }
 
    return ret;
}
 
#define sh_il_get_param(x, y) sh_il_get_param_pc_ctx(x, y, pc, ctx)
 
static RzILOpEffect *sh_apply_effects(RZ_NULLABLE RzILOpEffect *target, RZ_NULLABLE RzILOpEffect *pre, RZ_NULLABLE RzILOpEffect *post) {
    if (!target) {
        if (pre) {
            target = pre;
            goto append;
        } else if (post) {
            return post;
        }
        return NULL;
    }
 
    if (pre) {
        target = SEQ2(pre, target);
    }
append:
    if (post) {
        target = SEQ2(target, post);
    }
 
    return target;
}
 
static RzILOpEffect *sh_il_set_param_pc_ctx(SHParam param, RZ_OWN RzILOpPure *val, SHScaling scaling, ut64 pc, SHILContext *ctx) {
    RzILOpEffect *ret = NULL, *pre = NULL, *post = NULL;
    switch (param.mode) {
    case SH_REG_DIRECT:
        if (scaling == SH_SCALING_INVALID || scaling == SH_SCALING_L) {
            ret = sh_il_set_reg(param.param[0], val);
        } else {
            /* We don't need to worry about sizes not matching up when calling `sh_il_signed` two times in an effect.
            This is because within an effect, the scaling will stay the same, so all the time `sh_il_signed` is called,
            it will be setting the local variables "_sign" and "_temp" to the same bitvector size.
            Thus, there will be no IL validation errors. */
            RzILOpEffect *cast = sh_il_signed(SH_REG_SIZE, val, "_sign", "_temp");
            ret = SEQ2(cast, sh_il_set_reg(param.param[0], VARL("_sign")));
        }
        break;
    case SH_REG_INDIRECT:
    case SH_REG_INDIRECT_I:
    case SH_REG_INDIRECT_D:
    case SH_REG_INDIRECT_DISP:
    case SH_REG_INDIRECT_INDEXED:
    case SH_GBR_INDIRECT_DISP:
    case SH_GBR_INDIRECT_INDEXED:
    case SH_PC_RELATIVE_DISP:
    case SH_PC_RELATIVE8:
    case SH_PC_RELATIVE12:
    case SH_PC_RELATIVE_REG:
        break;
    case SH_IMM_U:
    case SH_IMM_S:
    default:
        RZ_LOG_ERROR("RzIL: SuperH: Cannot set value for addressing mode: %u\n", param.mode);
        return NULL;
    }
 
    if (!ret) {
        SHParamHelper ret_h = sh_il_get_param(param, scaling);
        RZ_FREE(ret_h.pure);
        RzILOpPure *eff_addr = sh_il_get_effective_addr(param, scaling);
        ret = STOREW(eff_addr, val);
        pre = ret_h.pre;
        post = ret_h.post;
    }
 
    return sh_apply_effects(ret, pre, post);
}
 
#define sh_il_set_param(x, y, z) sh_il_set_param_pc_ctx(x, y, z, pc, ctx)
 
static RzILOpBool *sh_il_is_add_carry(RZ_OWN RzILOpPure *res, RZ_OWN RzILOpPure *x, RZ_OWN RzILOpPure *y) {
    // res = x + y
    RzILOpBool *xmsb = MSB(x);
    RzILOpBool *ymsb = MSB(y);
    RzILOpBool *resmsb = MSB(res);
 
    // x & y
    RzILOpBool *xy = AND(xmsb, ymsb);
    RzILOpBool *nres = INV(resmsb);
 
    // !res & y
    RzILOpBool *ry = AND(nres, DUP(ymsb));
    // x & !res
    RzILOpBool *xr = AND(DUP(xmsb), DUP(nres));
 
    // bit = xy | ry | xr
    RzILOpBool * or = OR(xy, ry);
    or = OR(or, xr);
 
    return or ;
}
 
static RzILOpBool *sh_il_is_sub_borrow(RZ_OWN RzILOpPure *res, RZ_OWN RzILOpPure *x, RZ_OWN RzILOpPure *y) {
    // res = x - y
    RzILOpBool *xmsb = MSB(x);
    RzILOpBool *ymsb = MSB(y);
    RzILOpBool *resmsb = MSB(res);
 
    // !x & y
    RzILOpBool *nx = INV(xmsb);
    RzILOpBool *nxy = AND(nx, ymsb);
 
    // y & res
    RzILOpBool *rny = AND(DUP(ymsb), resmsb);
    // res & !x
    RzILOpBool *rnx = AND(DUP(resmsb), DUP(nx));
 
    // bit = nxy | rny | rnx
    RzILOpBool * or = OR(nxy, rny);
    or = OR(or, rnx);
 
    return or ;
}
 
static RzILOpBool *sh_il_is_add_overflow(RZ_OWN RzILOpPure *res, RZ_OWN RzILOpPure *x, RZ_OWN RzILOpPure *y) {
    // res = x + y
    RzILOpBool *xmsb = MSB(x);
    RzILOpBool *ymsb = MSB(y);
    RzILOpBool *resmsb = MSB(res);
 
    // !res & x & y
    RzILOpBool *nrxy = AND(AND(INV(resmsb), xmsb), ymsb);
    // res & !x & !y
    RzILOpBool *rnxny = AND(AND(DUP(resmsb), INV(DUP(xmsb))), INV(DUP(ymsb)));
    // or = nrxy | rnxny
    RzILOpBool * or = OR(nrxy, rnxny);
 
    return or ;
}
 
static RzILOpBool *sh_il_is_sub_underflow(RZ_OWN RzILOpPure *res, RZ_OWN RzILOpPure *x, RZ_OWN RzILOpPure *y) {
    // res = x - y
    RzILOpBool *xmsb = MSB(x);
    RzILOpBool *ymsb = MSB(y);
    RzILOpBool *resmsb = MSB(res);
 
    // !res & x & !y
    RzILOpBool *nrxny = AND(AND(INV(resmsb), xmsb), INV(ymsb));
    // res & !x & y
    RzILOpBool *rnxy = AND(AND(DUP(resmsb), INV(DUP(xmsb))), DUP(ymsb));
    // or = nrxny | rnxy
    RzILOpBool * or = OR(nrxny, rnxy);
 
    return or ;
}
 
/* Instruction implementations */
 
static RzILOpEffect *sh_il_invalid(const SHOp *op, ut64 pc, RzAnalysis *analysis, SHILContext *ctx) {
    return NULL;
}
 
static RzILOpEffect *sh_il_mov(const SHOp *op, ut64 pc, RzAnalysis *analysis, SHILContext *ctx) {
    SHParamHelper shp = sh_il_get_param(op->param[0], op->scaling);
    return sh_apply_effects(sh_il_set_pure_param(1, shp.pure), shp.pre, shp.post);
}
 
static RzILOpEffect *sh_il_movt(const SHOp *op, ut64 pc, RzAnalysis *analysis, SHILContext *ctx) {
    return sh_il_set_pure_param(0, UNSIGNED(SH_REG_SIZE, sh_il_get_status_reg_bit(SH_SR_T)));
}
 
static RzILOpEffect *sh_il_swap(const SHOp *op, ut64 pc, RzAnalysis *analysis, SHILContext *ctx) {
    /* We won't be using `sh_il_{get,set}_param_pure`, because it will cast the pure value to the scaling size,
    but we want the whole register, which is why we need to call `sh_il_{get,set}_param directly` */
    if (op->scaling == SH_SCALING_B) {
        // swap lower two bytes
        RzILOpPure *lower_byte = LOGAND(sh_il_get_param(op->param[0], SH_SCALING_L).pure, SH_U_REG(0xff));
        RzILOpPure *new_lower_byte = LOGAND(SHIFTR0(sh_il_get_param(op->param[0], SH_SCALING_L).pure, SH_U_REG(BITS_PER_BYTE)), SH_U_REG(0xff));
        RzILOpPure *new_upper_byte = SHIFTL0(lower_byte, SH_U_REG(BITS_PER_BYTE));
        RzILOpPure *upper_word = LOGAND(sh_il_get_param(op->param[0], SH_SCALING_L).pure, SH_U_REG(0xffff0000));
        return sh_il_set_param(op->param[1], LOGOR(upper_word, LOGOR(new_upper_byte, new_lower_byte)), SH_SCALING_L);
    } else if (op->scaling == SH_SCALING_W) {
        // swap upper and lower words and store in dst
        RzILOpPure *high = SHIFTL0(sh_il_get_param(op->param[0], SH_SCALING_L).pure, SH_U_REG(BITS_PER_BYTE * 2));
        RzILOpPure *low = SHIFTR0(sh_il_get_param(op->param[0], SH_SCALING_L).pure, SH_U_REG(BITS_PER_BYTE * 2));
        return sh_il_set_param(op->param[1], LOGOR(high, low), SH_SCALING_L);
    }
 
    return NULL;
}
 
static RzILOpEffect *sh_il_xtrct(const SHOp *op, ut64 pc, RzAnalysis *analysis, SHILContext *ctx) {
    RzILOpPure *high = SHIFTL0(sh_il_get_pure_param(0), SH_U_REG(BITS_PER_BYTE * 2));
    RzILOpPure *low = SHIFTR0(sh_il_get_pure_param(1), SH_U_REG(BITS_PER_BYTE * 2));
    return sh_il_set_pure_param(1, LOGOR(high, low));
}
 
static RzILOpEffect *sh_il_add(const SHOp *op, ut64 pc, RzAnalysis *analysis, SHILContext *ctx) {
    return sh_il_set_pure_param(1, ADD(sh_il_get_pure_param(0), sh_il_get_pure_param(1)));
}
 
static RzILOpEffect *sh_il_addc(const SHOp *op, ut64 pc, RzAnalysis *analysis, SHILContext *ctx) {
    RzILOpPure *sum = ADD(sh_il_get_pure_param(0), sh_il_get_pure_param(1));
    RzILOpEffect *local_sum = SETL("sum", ADD(sum, UNSIGNED(SH_REG_SIZE, sh_il_get_status_reg_bit(SH_SR_T))));
 
    RzILOpEffect *tbit = SETG(SH_SR_T, sh_il_is_add_carry(VARL("sum"), sh_il_get_pure_param(0), sh_il_get_pure_param(1)));
    RzILOpEffect *ret = sh_il_set_pure_param(1, VARL("sum"));
    return SEQ3(local_sum, tbit, ret);
}
 
static RzILOpEffect *sh_il_addv(const SHOp *op, ut64 pc, RzAnalysis *analysis, SHILContext *ctx) {
    RzILOpPure *sum = ADD(sh_il_get_pure_param(0), sh_il_get_pure_param(1));
    RzILOpEffect *local_sum = SETL("sum", sum);
 
    RzILOpEffect *tbit = SETG(SH_SR_T, sh_il_is_add_overflow(VARL("sum"), sh_il_get_pure_param(0), sh_il_get_pure_param(1)));
    RzILOpEffect *ret = sh_il_set_pure_param(1, VARL("sum"));
    return SEQ3(local_sum, tbit, ret);
}
 
static RzILOpEffect *sh_il_cmp_eq(const SHOp *op, ut64 pc, RzAnalysis *analysis, SHILContext *ctx) {
    return SETG(SH_SR_T, EQ(sh_il_get_pure_param(0), sh_il_get_pure_param(1)));
}
 
static RzILOpEffect *sh_il_cmp_hs(const SHOp *op, ut64 pc, RzAnalysis *analysis, SHILContext *ctx) {
    return SETG(SH_SR_T, UGE(sh_il_get_pure_param(1), sh_il_get_pure_param(0)));
}
 
static RzILOpEffect *sh_il_cmp_ge(const SHOp *op, ut64 pc, RzAnalysis *analysis, SHILContext *ctx) {
    return SETG(SH_SR_T, SGE(sh_il_get_pure_param(1), sh_il_get_pure_param(0)));
}
 
static RzILOpEffect *sh_il_cmp_hi(const SHOp *op, ut64 pc, RzAnalysis *analysis, SHILContext *ctx) {
    return SETG(SH_SR_T, UGT(sh_il_get_pure_param(1), sh_il_get_pure_param(0)));
}
 
static RzILOpEffect *sh_il_cmp_gt(const SHOp *op, ut64 pc, RzAnalysis *analysis, SHILContext *ctx) {
    return SETG(SH_SR_T, SGT(sh_il_get_pure_param(1), sh_il_get_pure_param(0)));
}
 
static RzILOpEffect *sh_il_cmp_pz(const SHOp *op, ut64 pc, RzAnalysis *analysis, SHILContext *ctx) {
    return SETG(SH_SR_T, SGE(sh_il_get_pure_param(0), SH_S_REG(0)));
}
 
static RzILOpEffect *sh_il_cmp_pl(const SHOp *op, ut64 pc, RzAnalysis *analysis, SHILContext *ctx) {
    return SETG(SH_SR_T, SGT(sh_il_get_pure_param(0), SH_S_REG(0)));
}
 
static RzILOpEffect *sh_il_cmp_str(const SHOp *op, ut64 pc, RzAnalysis *analysis, SHILContext *ctx) {
    RzILOpPure *full_xor = LOGXOR(sh_il_get_pure_param(0), sh_il_get_pure_param(1));
    RzILOpEffect *eff = SETL("xor", full_xor);
 
    eff = SEQ2(eff, SETL("eq", EQ(LOGAND(VARL("xor"), SH_U_REG(0xff)), SH_U_REG(0x0))));
    eff = SEQ2(eff, SETL("xor", SHIFTR0(VARL("xor"), SH_U_REG(BITS_PER_BYTE))));
    eff = SEQ2(eff, SETL("eq", OR(VARL("eq"), EQ(LOGAND(VARL("xor"), SH_U_REG(0xff)), SH_U_REG(0x0)))));
    eff = SEQ2(eff, SETL("xor", SHIFTR0(VARL("xor"), SH_U_REG(BITS_PER_BYTE))));
    eff = SEQ2(eff, SETL("eq", OR(VARL("eq"), EQ(LOGAND(VARL("xor"), SH_U_REG(0xff)), SH_U_REG(0x0)))));
    eff = SEQ2(eff, SETL("xor", SHIFTR0(VARL("xor"), SH_U_REG(BITS_PER_BYTE))));
    eff = SEQ2(eff, SETL("eq", OR(VARL("eq"), EQ(LOGAND(VARL("xor"), SH_U_REG(0xff)), SH_U_REG(0x0)))));
 
    return SEQ2(eff, SETG(SH_SR_T, VARL("eq")));
}
 
static RzILOpEffect *sh_il_div1(const SHOp *op, ut64 pc, RzAnalysis *analysis, SHILContext *ctx) {
    RzILOpEffect *ret = NULL;
    RzILOpEffect *q = SETL("q", VARG(SH_SR_Q));
    RzILOpEffect *m = SETL("m", VARG(SH_SR_M));
    RzILOpEffect *t = SETL("t", VARG(SH_SR_T));
    ret = SEQ3(q, m, t);
 
    RzILOpEffect *op1 = SETL("op1", sh_il_get_pure_param(0));
    RzILOpEffect *op2 = SETL("op2", sh_il_get_pure_param(1));
    RzILOpEffect *old_q = SETL("old_q", VARL("q"));
    ret = SEQ4(ret, op1, op2, old_q);
 
    // Get 31st bit of var q
    q = SETL("q", NON_ZERO(LOGAND(VARL("op2"), SH_U_REG(0x80000000))));
    op2 = SETL("op2", LOGOR(SHIFTL0(VARL("op2"), SH_U_REG(1)), sh_il_bool_to_bv(VARL("t"))));
    ret = SEQ3(ret, q, op2);
 
    RzILOpEffect *true_eff = SETL("op2", SUB(VARL("op2"), VARL("op1")));
    RzILOpEffect *false_eff = SETL("op2", ADD(VARL("op2"), VARL("op1")));
    RzILOpEffect *cond = BRANCH(EQ(sh_il_bool_to_bv(VARL("old_q")), sh_il_bool_to_bv(VARL("m"))), true_eff, false_eff);
    ret = SEQ2(ret, cond);
 
    // q = q ^ m ^ msb(op2)
    q = SETL("q", XOR(XOR(VARL("q"), VARL("m")), MSB(VARL("op2"))));
    t = SETL("t", NON_ZERO(SUB(SH_U_REG(1), LOGXOR(sh_il_bool_to_bv(VARL("q")), sh_il_bool_to_bv(VARL("m"))))));
    ret = SEQ3(ret, q, t);
 
    RzILOpEffect *rn = sh_il_set_pure_param(1, VARL("op2"));
    q = SETG(SH_SR_Q, VARL("q"));
    t = SETG(SH_SR_T, VARL("t"));
    ret = SEQ4(ret, rn, q, t);
 
    return ret;
}
 
static RzILOpEffect *sh_il_div0s(const SHOp *op, ut64 pc, RzAnalysis *analysis, SHILContext *ctx) {
    RzILOpEffect *setq = SETG(SH_SR_Q, MSB(sh_il_get_pure_param(1)));
    RzILOpEffect *setm = SETG(SH_SR_M, MSB(sh_il_get_pure_param(0)));
    RzILOpEffect *sett = SETG(SH_SR_T, XOR(VARG(SH_SR_M), VARG(SH_SR_Q)));
 
    return SEQ3(setq, setm, sett);
}
 
static RzILOpEffect *sh_il_div0u(const SHOp *op, ut64 pc, RzAnalysis *analysis, SHILContext *ctx) {
    return SEQ3(SETG(SH_SR_M, IL_FALSE), SETG(SH_SR_Q, IL_FALSE), SETG(SH_SR_T, IL_FALSE));
}
 
static RzILOpEffect *sh_il_dmuls(const SHOp *op, ut64 pc, RzAnalysis *analysis, SHILContext *ctx) {
    RzILOpEffect *eff = SETL("res_wide", MUL(SIGNED(2 * SH_REG_SIZE, sh_il_get_pure_param(0)), SIGNED(2 * SH_REG_SIZE, sh_il_get_pure_param(1))));
    RzILOpPure *lower_bits = UNSIGNED(SH_REG_SIZE, LOGAND(VARL("res_wide"), UN(2 * SH_REG_SIZE, 0xffffffff)));
    RzILOpPure *higher_bits = UNSIGNED(SH_REG_SIZE, SHIFTR0(VARL("res_wide"), SH_U_REG(SH_REG_SIZE)));
    return SEQ3(eff, SETG("macl", lower_bits), SETG("mach", higher_bits));
}
 
static RzILOpEffect *sh_il_dmulu(const SHOp *op, ut64 pc, RzAnalysis *analysis, SHILContext *ctx) {
    RzILOpEffect *eff = SETL("res_wide", MUL(UNSIGNED(2 * SH_REG_SIZE, sh_il_get_pure_param(0)), UNSIGNED(2 * SH_REG_SIZE, sh_il_get_pure_param(1))));
    RzILOpPure *lower_bits = UNSIGNED(SH_REG_SIZE, LOGAND(VARL("res_wide"), UN(2 * SH_REG_SIZE, 0xffffffff)));
    RzILOpPure *higher_bits = UNSIGNED(SH_REG_SIZE, SHIFTR0(VARL("res_wide"), SH_U_REG(SH_REG_SIZE)));
    return SEQ3(eff, SETG("macl", lower_bits), SETG("mach", higher_bits));
}
 
static RzILOpEffect *sh_il_dt(const SHOp *op, ut64 pc, RzAnalysis *analysis, SHILContext *ctx) {
    return SEQ2(sh_il_set_pure_param(0, SUB(sh_il_get_pure_param(0), SH_U_REG(1))), SETG(SH_SR_T, IS_ZERO(sh_il_get_pure_param(0))));
}
 
static RzILOpEffect *sh_il_exts(const SHOp *op, ut64 pc, RzAnalysis *analysis, SHILContext *ctx) {
    return sh_il_set_pure_param(1, sh_il_get_pure_param(0));
}
 
static RzILOpEffect *sh_il_extu(const SHOp *op, ut64 pc, RzAnalysis *analysis, SHILContext *ctx) {
    /* Do not use `sh_il_set_pure_param` here since that will sign extend the Rn value, but we want
    it extend it unsigned, which is why we need to directly call `sh_il_set_reg` */
    return sh_il_set_reg(op->param[1].param[0], UNSIGNED(SH_REG_SIZE, sh_il_get_pure_param(0)));
}
 
static RzILOpEffect *sh_il_mac(const SHOp *op, ut64 pc, RzAnalysis *analysis, SHILContext *ctx) {
    SHParamHelper shp_rm = sh_il_get_param(op->param[0], op->scaling);
    SHParamHelper shp_rn = sh_il_get_param(op->param[1], op->scaling);
    RzILOpEffect *eff = NULL;
 
    if (op->scaling == SH_SCALING_L) {
        RzILOpEffect *mac = SETL("mac", LOGOR(SHIFTL0((UNSIGNED(2 * SH_REG_SIZE, VARG("mach"))), SH_U_REG(SH_REG_SIZE)), UNSIGNED(2 * SH_REG_SIZE, VARG("macl"))));
        RzILOpEffect *rm = SETL("rm", shp_rm.pure);
        RzILOpEffect *rn = SETL("rn", shp_rn.pure);
        eff = SEQ2(rm, rn);
 
        RzILOpEffect *mul = SETL("mul", MUL(SIGNED(2 * SH_REG_SIZE, VARL("rm")), SIGNED(2 * SH_REG_SIZE, VARL("rn"))));
        RzILOpEffect *add = SETL("add", ADD(VARL("mul"), VARL("mac")));
        RzILOpPure *lower_bits = UNSIGNED(SH_REG_SIZE, LOGAND(VARL("add"), UN(2 * SH_REG_SIZE, 0xffffffff)));
        RzILOpEffect *higher_bits = SETL("high", UNSIGNED(SH_REG_SIZE, SHIFTR0(VARL("add"), SH_U_REG(SH_REG_SIZE))));
 
        eff = SEQ7(eff, mac, mul, add, SETG("macl", lower_bits), higher_bits, BRANCH(VARG(SH_SR_S), SETG("mach", LOGAND(VARL("high"), SH_U_REG(0xffff))), SETG("mach", VARL("high"))));
    } else if (op->scaling == SH_SCALING_W) {
        RzILOpEffect *mac = SETL("mac", LOGOR(SHIFTL0((UNSIGNED(2 * SH_REG_SIZE, VARG("mach"))), SH_U_REG(SH_REG_SIZE)), UNSIGNED(2 * SH_REG_SIZE, VARG("macl"))));
        RzILOpEffect *rm = SETL("rm", shp_rm.pure);
        RzILOpEffect *rn = SETL("rn", shp_rn.pure);
        eff = SEQ2(rm, rn);
 
        RzILOpEffect *mul = SETL("mul", UNSIGNED(2 * SH_REG_SIZE, MUL(SIGNED(SH_REG_SIZE, VARL("rm")), SIGNED(SH_REG_SIZE, VARL("rn")))));
        RzILOpEffect *add = SETL("add", ADD(VARL("mul"), VARL("mac")));
        RzILOpEffect *lower_bits = SETL("low", UNSIGNED(SH_REG_SIZE, LOGAND(VARL("add"), UN(2 * SH_REG_SIZE, 0xffffffff))));
        RzILOpPure *higher_bits = UNSIGNED(SH_REG_SIZE, SHIFTR0(VARL("add"), SH_U_REG(SH_REG_SIZE)));
 
        eff = SEQ6(eff, mac, mul, add, lower_bits, BRANCH(VARG(SH_SR_S), SETG("macl", VARL("low")), SEQ2(SETG("macl", VARL("low")), SETG("mach", higher_bits))));
    }
 
    eff = SEQ3(eff, shp_rn.post, shp_rm.post);
    return eff;
}
 
static RzILOpEffect *sh_il_mul(const SHOp *op, ut64 pc, RzAnalysis *analysis, SHILContext *ctx) {
    return SETG("macl", MUL(sh_il_get_pure_param(0), sh_il_get_pure_param(1)));
}
 
static RzILOpEffect *sh_il_muls(const SHOp *op, ut64 pc, RzAnalysis *analysis, SHILContext *ctx) {
    RzILOpEffect *rm = SETL("rm", sh_il_get_pure_param(0));
    RzILOpEffect *rn = SETL("rn", sh_il_get_pure_param(1));
    RzILOpPure *m = SIGNED(SH_REG_SIZE, VARL("rm"));
    RzILOpPure *n = SIGNED(SH_REG_SIZE, VARL("rn"));
    return SEQ3(rm, rn, SETG("macl", MUL(m, n)));
}
 
static RzILOpEffect *sh_il_mulu(const SHOp *op, ut64 pc, RzAnalysis *analysis, SHILContext *ctx) {
    RzILOpPure *m = UNSIGNED(SH_REG_SIZE, sh_il_get_pure_param(0));
    RzILOpPure *n = UNSIGNED(SH_REG_SIZE, sh_il_get_pure_param(1));
    return SETG("macl", MUL(m, n));
}
 
static RzILOpEffect *sh_il_neg(const SHOp *op, ut64 pc, RzAnalysis *analysis, SHILContext *ctx) {
    RzILOpPure *sub = SUB(SH_U_REG(0), sh_il_get_pure_param(0));
    return sh_il_set_pure_param(1, sub);
}
 
static RzILOpEffect *sh_il_negc(const SHOp *op, ut64 pc, RzAnalysis *analysis, SHILContext *ctx) {
    RzILOpPure *sub = SUB(SH_U_REG(0), sh_il_get_pure_param(0));
    RzILOpEffect *subvar = SETL("sub", SUB(sub, sh_il_get_status_reg_bit(SH_SR_T)));
    return SEQ3(subvar, sh_il_set_pure_param(1, VARL("sub")), SETG(SH_SR_T, sh_il_is_sub_borrow(VARL("sub"), SH_U_REG(0), sh_il_get_pure_param(0))));
}
 
static RzILOpEffect *sh_il_sub(const SHOp *op, ut64 pc, RzAnalysis *analysis, SHILContext *ctx) {
    return sh_il_set_pure_param(1, SUB(sh_il_get_pure_param(1), sh_il_get_pure_param(0)));
}
 
static RzILOpEffect *sh_il_subc(const SHOp *op, ut64 pc, RzAnalysis *analysis, SHILContext *ctx) {
    RzILOpPure *dif = SUB(sh_il_get_pure_param(1), sh_il_get_pure_param(0));
    dif = SUB(dif, sh_il_get_status_reg_bit(SH_SR_T));
    RzILOpEffect *local_dif = SETL("dif", dif);
 
    RzILOpEffect *ret = sh_il_set_pure_param(1, VARL("dif"));
    RzILOpEffect *tbit = SETG(SH_SR_T, sh_il_is_sub_borrow(VARL("dif"), sh_il_get_pure_param(0), sh_il_get_pure_param(1)));
    return SEQ3(local_dif, ret, tbit);
}
 
static RzILOpEffect *sh_il_subv(const SHOp *op, ut64 pc, RzAnalysis *analysis, SHILContext *ctx) {
    RzILOpPure *dif = SUB(sh_il_get_pure_param(1), sh_il_get_pure_param(0));
    RzILOpEffect *local_dif = SETL("dif", dif);
 
    RzILOpEffect *ret = sh_il_set_pure_param(1, VARL("dif"));
    RzILOpEffect *tbit = SETG(SH_SR_T, sh_il_is_sub_underflow(VARL("dif"), sh_il_get_pure_param(0), sh_il_get_pure_param(1)));
    return SEQ3(local_dif, ret, tbit);
}
 
static RzILOpEffect *sh_il_and(const SHOp *op, ut64 pc, RzAnalysis *analysis, SHILContext *ctx) {
    return sh_il_set_pure_param(1, LOGAND(sh_il_get_pure_param(0), sh_il_get_pure_param(1)));
}
 
static RzILOpEffect *sh_il_not(const SHOp *op, ut64 pc, RzAnalysis *analysis, SHILContext *ctx) {
    return sh_il_set_pure_param(1, LOGNOT(sh_il_get_pure_param(0)));
}
 
static RzILOpEffect *sh_il_or(const SHOp *op, ut64 pc, RzAnalysis *analysis, SHILContext *ctx) {
    return sh_il_set_pure_param(1, LOGOR(sh_il_get_pure_param(0), sh_il_get_pure_param(1)));
}
 
static RzILOpEffect *sh_il_tas(const SHOp *op, ut64 pc, RzAnalysis *analysis, SHILContext *ctx) {
    RzILOpPure *mem = sh_il_get_pure_param(0);
    RzILOpEffect *tbit = SETG(SH_SR_T, IS_ZERO(mem));
    return SEQ2(tbit, sh_il_set_pure_param(0, LOGOR(DUP(mem), UN(8, 0x80))));
}
 
static RzILOpEffect *sh_il_tst(const SHOp *op, ut64 pc, RzAnalysis *analysis, SHILContext *ctx) {
    return SETG(SH_SR_T, IS_ZERO(LOGAND(sh_il_get_pure_param(0), sh_il_get_pure_param(1))));
}
 
static RzILOpEffect *sh_il_xor(const SHOp *op, ut64 pc, RzAnalysis *analysis, SHILContext *ctx) {
    return sh_il_set_pure_param(1, LOGXOR(sh_il_get_pure_param(0), sh_il_get_pure_param(1)));
}
 
static RzILOpEffect *sh_il_rotl(const SHOp *op, ut64 pc, RzAnalysis *analysis, SHILContext *ctx) {
    RzILOpEffect *msb = SETL("msb_", MSB(sh_il_get_pure_param(0)));
    RzILOpEffect *tbit = SETG(SH_SR_T, VARL("msb_"));
    RzILOpEffect *shl = SETL("shl_", SHIFTL0(sh_il_get_pure_param(0), SH_U_REG(1)));
    RzILOpPure *lsb = ITE(VARL("msb_"), LOGOR(VARL("shl_"), SH_U_REG(1)), VARL("shl_"));
    return SEQ4(msb, tbit, shl, sh_il_set_pure_param(0, lsb));
}
 
static RzILOpEffect *sh_il_rotr(const SHOp *op, ut64 pc, RzAnalysis *analysis, SHILContext *ctx) {
    RzILOpEffect *lsb = SETL("lsb_", LSB(sh_il_get_pure_param(0)));
    RzILOpEffect *tbit = SETG(SH_SR_T, VARL("lsb_"));
    RzILOpEffect *shr = SETL("shr_", SHIFTR0(sh_il_get_pure_param(0), SH_U_REG(1)));
    RzILOpPure *msb = ITE(VARL("lsb_"), LOGOR(VARL("shr_"), SH_U_REG(0x80000000)), VARL("shr_"));
    return SEQ4(lsb, tbit, shr, sh_il_set_pure_param(0, msb));
}
 
static RzILOpEffect *sh_il_rotcl(const SHOp *op, ut64 pc, RzAnalysis *analysis, SHILContext *ctx) {
    RzILOpEffect *msb = SETL("msb_", MSB(sh_il_get_pure_param(0)));
    RzILOpEffect *shl = SETL("shl_", SHIFTL0(sh_il_get_pure_param(0), SH_U_REG(1)));
    RzILOpPure *lsb = ITE(VARG(SH_SR_T), LOGOR(VARL("shl_"), SH_U_REG(1)), VARL("shl_"));
    RzILOpEffect *tbit = SETG(SH_SR_T, VARL("msb_"));
    return SEQ4(msb, shl, sh_il_set_pure_param(0, lsb), tbit);
}
 
static RzILOpEffect *sh_il_rotcr(const SHOp *op, ut64 pc, RzAnalysis *analysis, SHILContext *ctx) {
    RzILOpEffect *lsb = SETL("lsb_", LSB(sh_il_get_pure_param(0)));
    RzILOpEffect *shr = SETL("shr_", SHIFTR0(sh_il_get_pure_param(0), SH_U_REG(1)));
    RzILOpPure *msb = ITE(VARG(SH_SR_T), LOGOR(VARL("shr_"), SH_U_REG(0x80000000)), VARL("shr_"));
    RzILOpEffect *tbit = SETG(SH_SR_T, VARL("lsb_"));
    return SEQ4(lsb, shr, sh_il_set_pure_param(0, msb), tbit);
}
 
static RzILOpEffect *sh_il_shad(const SHOp *op, ut64 pc, RzAnalysis *analysis, SHILContext *ctx) {
    RzILOpEffect *shift_amount = SETL("shift_", UNSIGNED(5, sh_il_get_pure_param(0)));
 
    RzILOpPure *shl = SHIFTL0(sh_il_get_pure_param(1), VARL("shift_"));
    RzILOpPure *shr = SHIFTRA(sh_il_get_pure_param(1), NEG(VARL("shift_")));
 
    return SEQ2(shift_amount, BRANCH(SGE(sh_il_get_pure_param(0), SN(32, 0)), sh_il_set_pure_param(1, shl), sh_il_set_pure_param(1, shr)));
}
 
static RzILOpEffect *sh_il_shal(const SHOp *op, ut64 pc, RzAnalysis *analysis, SHILContext *ctx) {
    RzILOpPure *msb = MSB(sh_il_get_pure_param(0));
    RzILOpPure *shl = SHIFTL0(sh_il_get_pure_param(0), SH_U_REG(1));
    return SEQ2(SETG(SH_SR_T, msb), sh_il_set_pure_param(0, shl));
}
 
static RzILOpEffect *sh_il_shar(const SHOp *op, ut64 pc, RzAnalysis *analysis, SHILContext *ctx) {
    RzILOpPure *lsb = LSB(sh_il_get_pure_param(0));
    RzILOpPure *shl = SHIFTRA(sh_il_get_pure_param(0), SH_U_REG(1));
    return SEQ2(SETG(SH_SR_T, lsb), sh_il_set_pure_param(0, shl));
}
 
static RzILOpEffect *sh_il_shld(const SHOp *op, ut64 pc, RzAnalysis *analysis, SHILContext *ctx) {
    RzILOpEffect *shift_amount = SETL("shift_", UNSIGNED(5, sh_il_get_pure_param(0)));
 
    RzILOpPure *shl = SHIFTL0(sh_il_get_pure_param(1), VARL("shift_"));
    RzILOpPure *shr = SHIFTR0(sh_il_get_pure_param(1), NEG(VARL("shift_")));
 
    return SEQ2(shift_amount, BRANCH(SGE(sh_il_get_pure_param(0), SN(32, 0)), sh_il_set_pure_param(1, shl), sh_il_set_pure_param(1, shr)));
    ;
}
 
static RzILOpEffect *sh_il_shll(const SHOp *op, ut64 pc, RzAnalysis *analysis, SHILContext *ctx) {
    RzILOpPure *msb = MSB(sh_il_get_pure_param(0));
    RzILOpPure *shl = SHIFTL0(sh_il_get_pure_param(0), SH_U_REG(1));
    return SEQ2(SETG(SH_SR_T, msb), sh_il_set_pure_param(0, shl));
}
 
static RzILOpEffect *sh_il_shlr(const SHOp *op, ut64 pc, RzAnalysis *analysis, SHILContext *ctx) {
    RzILOpPure *lsb = LSB(sh_il_get_pure_param(0));
    RzILOpPure *shr = SHIFTR0(sh_il_get_pure_param(0), SH_U_REG(1));
    return SEQ2(SETG(SH_SR_T, lsb), sh_il_set_pure_param(0, shr));
}
 
static RzILOpEffect *sh_il_shll2(const SHOp *op, ut64 pc, RzAnalysis *analysis, SHILContext *ctx) {
    return sh_il_set_pure_param(0, SHIFTL0(sh_il_get_pure_param(0), SH_U_REG(2)));
}
 
static RzILOpEffect *sh_il_shlr2(const SHOp *op, ut64 pc, RzAnalysis *analysis, SHILContext *ctx) {
    return sh_il_set_pure_param(0, SHIFTR0(sh_il_get_pure_param(0), SH_U_REG(2)));
}
 
static RzILOpEffect *sh_il_shll8(const SHOp *op, ut64 pc, RzAnalysis *analysis, SHILContext *ctx) {
    return sh_il_set_pure_param(0, SHIFTL0(sh_il_get_pure_param(0), SH_U_REG(8)));
}
 
static RzILOpEffect *sh_il_shlr8(const SHOp *op, ut64 pc, RzAnalysis *analysis, SHILContext *ctx) {
    return sh_il_set_pure_param(0, SHIFTR0(sh_il_get_pure_param(0), SH_U_REG(8)));
}
 
static RzILOpEffect *sh_il_shll16(const SHOp *op, ut64 pc, RzAnalysis *analysis, SHILContext *ctx) {
    return sh_il_set_pure_param(0, SHIFTL0(sh_il_get_pure_param(0), SH_U_REG(16)));
}
 
static RzILOpEffect *sh_il_shlr16(const SHOp *op, ut64 pc, RzAnalysis *analysis, SHILContext *ctx) {
    return sh_il_set_pure_param(0, SHIFTR0(sh_il_get_pure_param(0), SH_U_REG(16)));
}
 
static RzILOpEffect *sh_il_bf(const SHOp *op, ut64 pc, RzAnalysis *analysis, SHILContext *ctx) {
    RzILOpPure *new_pc = sh_il_get_effective_addr_param(0);
    return BRANCH(VARG(SH_SR_T), JMP(new_pc), NOP());
}
 
static RzILOpEffect *sh_il_bfs(const SHOp *op, ut64 pc, RzAnalysis *analysis, SHILContext *ctx) {
    RzILOpPure *new_pc = sh_il_get_effective_addr_param(0);
    return BRANCH(VARG(SH_SR_T), JMP(new_pc), NOP());
}
 
static RzILOpEffect *sh_il_bt(const SHOp *op, ut64 pc, RzAnalysis *analysis, SHILContext *ctx) {
    RzILOpPure *new_pc = sh_il_get_effective_addr_param(0);
    return BRANCH(VARG(SH_SR_T), JMP(new_pc), NOP());
}
 
static RzILOpEffect *sh_il_bts(const SHOp *op, ut64 pc, RzAnalysis *analysis, SHILContext *ctx) {
    RzILOpPure *new_pc = sh_il_get_effective_addr_param(0);
    return BRANCH(VARG(SH_SR_T), JMP(new_pc), NOP());
}
 
static RzILOpEffect *sh_il_bra(const SHOp *op, ut64 pc, RzAnalysis *analysis, SHILContext *ctx) {
    return JMP(sh_il_get_effective_addr_param(0));
}
 
static RzILOpEffect *sh_il_braf(const SHOp *op, ut64 pc, RzAnalysis *analysis, SHILContext *ctx) {
    return JMP(sh_il_get_effective_addr_param(0));
}
 
static RzILOpEffect *sh_il_bsr(const SHOp *op, ut64 pc, RzAnalysis *analysis, SHILContext *ctx) {
    return SEQ2(SETG("pr", ADD(SH_U_ADDR(pc), SH_U_ADDR(4))), JMP(sh_il_get_effective_addr_param(0)));
}
 
static RzILOpEffect *sh_il_bsrf(const SHOp *op, ut64 pc, RzAnalysis *analysis, SHILContext *ctx) {
    return SEQ2(SETG("pr", ADD(SH_U_ADDR(pc), SH_U_ADDR(4))), JMP(sh_il_get_effective_addr_param(0)));
}
 
static RzILOpEffect *sh_il_jmp(const SHOp *op, ut64 pc, RzAnalysis *analysis, SHILContext *ctx) {
    return JMP(sh_il_get_effective_addr_param(0));
}
 
static RzILOpEffect *sh_il_jsr(const SHOp *op, ut64 pc, RzAnalysis *analysis, SHILContext *ctx) {
    return SEQ2(SETG("pr", ADD(SH_U_ADDR(pc), SH_U_ADDR(4))), JMP(sh_il_get_effective_addr_param(0)));
}
 
static RzILOpEffect *sh_il_rts(const SHOp *op, ut64 pc, RzAnalysis *analysis, SHILContext *ctx) {
    return JMP(VARG("pr"));
}
 
static RzILOpEffect *sh_il_clrmac(const SHOp *op, ut64 pc, RzAnalysis *analysis, SHILContext *ctx) {
    return SEQ2(SETG("mach", UN(SH_REG_SIZE, 0)), SETG("macl", UN(SH_REG_SIZE, 0)));
}
 
static RzILOpEffect *sh_il_clrs(const SHOp *op, ut64 pc, RzAnalysis *analysis, SHILContext *ctx) {
    return SETG(SH_SR_S, IL_FALSE);
}
 
static RzILOpEffect *sh_il_clrt(const SHOp *op, ut64 pc, RzAnalysis *analysis, SHILContext *ctx) {
    return SETG(SH_SR_T, IL_FALSE);
}
 
static RzILOpEffect *sh_il_ldc(const SHOp *op, ut64 pc, RzAnalysis *analysis, SHILContext *ctx) {
    /* We won't be using banked registers for these instructions (except for unprivileged GBR) */
    // TODO: Check what the correct implementation is
    ctx->use_banked = false;
    if (op->param[1].param[0] == SH_REG_IND_GBR) {
        ctx->use_banked = true;
    }
 
    RzILOpEffect *eff = NULL;
    if (op->scaling == SH_SCALING_INVALID) {
        if (sh_valid_gpr(op->param[1].param[0])) {
            eff = SETG(sh_get_banked_reg(op->param[1].param[0], 1), sh_il_get_pure_param(0));
        } else {
            eff = sh_il_set_pure_param(1, sh_il_get_pure_param(0));
        }
    } else if (op->scaling == SH_SCALING_L) {
        SHParamHelper rm = sh_il_get_param(op->param[0], op->scaling);
        if (sh_valid_gpr(op->param[1].param[0])) {
            eff = SEQ2(SETG(sh_get_banked_reg(op->param[1].param[0], 1), rm.pure), rm.post);
        } else {
            eff = SEQ2(sh_il_set_pure_param(1, rm.pure), rm.post);
        }
    }
 
    if (op->param[1].param[0] != SH_REG_IND_GBR) {
        eff = BRANCH(sh_il_get_privilege(), eff, EMPTY());
    }
    return eff;
}
 
static RzILOpEffect *sh_il_lds(const SHOp *op, ut64 pc, RzAnalysis *analysis, SHILContext *ctx) {
    if (op->scaling == SH_SCALING_INVALID) {
        return sh_il_set_pure_param(1, sh_il_get_pure_param(0));
    } else if (op->scaling == SH_SCALING_L) {
        SHParamHelper rm = sh_il_get_param(op->param[0], op->scaling);
        return SEQ2(sh_il_set_pure_param(1, rm.pure), rm.post);
    }
    return NOP();
}
 
static RzILOpEffect *sh_il_movca(const SHOp *op, ut64 pc, RzAnalysis *analysis, SHILContext *ctx) {
    return sh_il_set_pure_param(1, sh_il_get_pure_param(0));
}
 
static RzILOpEffect *sh_il_nop(const SHOp *op, ut64 pc, RzAnalysis *analysis, SHILContext *ctx) {
    return NOP();
}
 
static RzILOpEffect *sh_il_rte(const SHOp *op, ut64 pc, RzAnalysis *analysis, SHILContext *ctx) {
    return BRANCH(sh_il_get_privilege(), SEQ2(sh_il_set_status_reg(VARG("ssr")), JMP(VARG("spc"))), EMPTY());
}
 
static RzILOpEffect *sh_il_sets(const SHOp *op, ut64 pc, RzAnalysis *analysis, SHILContext *ctx) {
    return SETG(SH_SR_S, IL_TRUE);
}
 
static RzILOpEffect *sh_il_sett(const SHOp *op, ut64 pc, RzAnalysis *analysis, SHILContext *ctx) {
    return SETG(SH_SR_T, IL_TRUE);
}
 
static RzILOpEffect *sh_il_sleep(const SHOp *op, ut64 pc, RzAnalysis *analysis, SHILContext *ctx) {
    return BRANCH(sh_il_get_privilege(), NOP(), EMPTY());
}
 
static RzILOpEffect *sh_il_stc(const SHOp *op, ut64 pc, RzAnalysis *analysis, SHILContext *ctx) {
    /* We won't be using banked registers for these instructions (except for unprivileged GBR) */
    // TODO: Check what the correct implementation is
    ctx->use_banked = false;
    if (op->param[0].param[0] == SH_REG_IND_GBR) {
        ctx->use_banked = true;
    }
 
    RzILOpEffect *eff = NULL;
    if (sh_valid_gpr(op->param[0].param[0])) { // REG = Rn_BANK
        eff = sh_il_set_pure_param(1, VARG(sh_get_banked_reg(op->param[0].param[0], 1)));
    } else {
        eff = sh_il_set_pure_param(1, sh_il_get_pure_param(0));
    }
    if (op->param[0].param[0] != SH_REG_IND_GBR) {
        eff = BRANCH(sh_il_get_privilege(), eff, EMPTY());
    }
    return eff;
}
 
static RzILOpEffect *sh_il_sts(const SHOp *op, ut64 pc, RzAnalysis *analysis, SHILContext *ctx) {
    return sh_il_set_pure_param(1, sh_il_get_pure_param(0));
}
 
static RzILOpEffect *sh_il_unimpl(const SHOp *op, ut64 pc, RzAnalysis *analysis, SHILContext *ctx) {
    RZ_LOG_WARN("SuperH: Instruction with opcode 0x%04x is unimplemented\n", op->opcode);
    return EMPTY();
}
 
#include <rz_il/rz_il_opbuilder_end.h>
 
typedef RzILOpEffect *(*sh_il_op)(const SHOp *op, ut64 pc, RzAnalysis *analysis, SHILContext *ctx);
 
static const sh_il_op sh_ops[SH_OP_SIZE] = {
    [SH_OP_INVALID] = sh_il_invalid,
    [SH_OP_MOV] = sh_il_mov,
    [SH_OP_MOVT] = sh_il_movt,
    [SH_OP_SWAP] = sh_il_swap,
    [SH_OP_XTRCT] = sh_il_xtrct,
    [SH_OP_ADD] = sh_il_add,
    [SH_OP_ADDC] = sh_il_addc,
    [SH_OP_ADDV] = sh_il_addv,
    [SH_OP_CMP_EQ] = sh_il_cmp_eq,
    [SH_OP_CMP_HS] = sh_il_cmp_hs,
    [SH_OP_CMP_GE] = sh_il_cmp_ge,
    [SH_OP_CMP_HI] = sh_il_cmp_hi,
    [SH_OP_CMP_GT] = sh_il_cmp_gt,
    [SH_OP_CMP_PZ] = sh_il_cmp_pz,
    [SH_OP_CMP_PL] = sh_il_cmp_pl,
    [SH_OP_CMP_STR] = sh_il_cmp_str,
    [SH_OP_DIV1] = sh_il_div1,
    [SH_OP_DIV0S] = sh_il_div0s,
    [SH_OP_DIV0U] = sh_il_div0u,
    [SH_OP_DMULS] = sh_il_dmuls,
    [SH_OP_DMULU] = sh_il_dmulu,
    [SH_OP_DT] = sh_il_dt,
    [SH_OP_EXTS] = sh_il_exts,
    [SH_OP_EXTU] = sh_il_extu,
    [SH_OP_MAC] = sh_il_mac,
    [SH_OP_MUL] = sh_il_mul,
    [SH_OP_MULS] = sh_il_muls,
    [SH_OP_MULU] = sh_il_mulu,
    [SH_OP_NEG] = sh_il_neg,
    [SH_OP_NEGC] = sh_il_negc,
    [SH_OP_SUB] = sh_il_sub,
    [SH_OP_SUBC] = sh_il_subc,
    [SH_OP_SUBV] = sh_il_subv,
    [SH_OP_AND] = sh_il_and,
    [SH_OP_NOT] = sh_il_not,
    [SH_OP_OR] = sh_il_or,
    [SH_OP_TAS] = sh_il_tas,
    [SH_OP_TST] = sh_il_tst,
    [SH_OP_XOR] = sh_il_xor,
    [SH_OP_ROTL] = sh_il_rotl,
    [SH_OP_ROTR] = sh_il_rotr,
    [SH_OP_ROTCL] = sh_il_rotcl,
    [SH_OP_ROTCR] = sh_il_rotcr,
    [SH_OP_SHAD] = sh_il_shad,
    [SH_OP_SHAL] = sh_il_shal,
    [SH_OP_SHAR] = sh_il_shar,
    [SH_OP_SHLD] = sh_il_shld,
    [SH_OP_SHLL] = sh_il_shll,
    [SH_OP_SHLR] = sh_il_shlr,
    [SH_OP_SHLL2] = sh_il_shll2,
    [SH_OP_SHLR2] = sh_il_shlr2,
    [SH_OP_SHLL8] = sh_il_shll8,
    [SH_OP_SHLR8] = sh_il_shlr8,
    [SH_OP_SHLL16] = sh_il_shll16,
    [SH_OP_SHLR16] = sh_il_shlr16,
    [SH_OP_BF] = sh_il_bf,
    [SH_OP_BFS] = sh_il_bfs,
    [SH_OP_BT] = sh_il_bt,
    [SH_OP_BTS] = sh_il_bts,
    [SH_OP_BRA] = sh_il_bra,
    [SH_OP_BRAF] = sh_il_braf,
    [SH_OP_BSR] = sh_il_bsr,
    [SH_OP_BSRF] = sh_il_bsrf,
    [SH_OP_JMP] = sh_il_jmp,
    [SH_OP_JSR] = sh_il_jsr,
    [SH_OP_RTS] = sh_il_rts,
    [SH_OP_CLRMAC] = sh_il_clrmac,
    [SH_OP_CLRS] = sh_il_clrs,
    [SH_OP_CLRT] = sh_il_clrt,
    [SH_OP_LDC] = sh_il_ldc,
    [SH_OP_LDS] = sh_il_lds,
    [SH_OP_MOVCA] = sh_il_movca,
    [SH_OP_NOP] = sh_il_nop,
    [SH_OP_RTE] = sh_il_rte,
    [SH_OP_SETS] = sh_il_sets,
    [SH_OP_SETT] = sh_il_sett,
    [SH_OP_SLEEP] = sh_il_sleep,
    [SH_OP_STC] = sh_il_stc,
    [SH_OP_STS] = sh_il_sts,
    [SH_OP_UNIMPL] = sh_il_unimpl
};
 
RZ_IPI bool rz_sh_il_opcode(RZ_NONNULL RzAnalysis *analysis, RZ_NONNULL RzAnalysisOp *aop, ut64 pc, RZ_BORROW RZ_NONNULL const SHOp *op, RZ_NULLABLE SHILContext *ctx) {
    rz_return_val_if_fail(analysis && aop && op, false);
    if (op->mnemonic >= SH_OP_SIZE) {
        RZ_LOG_ERROR("RzIL: SuperH: out of bounds op\n");
        return false;
    }
 
    sh_il_op create_op = sh_ops[op->mnemonic];
    RzILOpEffect *lifted = create_op(op, pc, analysis, ctx);
 
    // If the privilege was checked, then we need to set the local variable before the IL lifting
    if (ctx && ctx->privilege_check) {
        lifted = sh_apply_effects(lifted, sh_il_initialize_privilege(), NULL);
    }
 
    aop->il_op = lifted;
    return true;
}
 
RZ_IPI RzAnalysisILConfig *rz_sh_il_config(RZ_NONNULL RzAnalysis *analysis) {
    rz_return_val_if_fail(analysis, NULL);
 
    RzAnalysisILConfig *r = rz_analysis_il_config_new(SH_ADDR_SIZE, analysis->big_endian, SH_ADDR_SIZE);
    return r;
}