#include "sysdep.h"
#include <stdio.h>
#include <string.h>
#include "ansidecl.h"
#include "arc.h"
#include "opintl.h"

Macros
#define	ELEMENTS_IN(arr) (sizeof (arr) / sizeof ((arr)[0]))

#define	INSERT_FN(fn)

#define	EXTRACT_FN(fn)

#define	OPERANDS 3

#define	UNUSED 0

#define	REGA (UNUSED + 1)

#define	REGB (REGA + 1)

#define	REGC (REGB + 1)

#define	SHIMMFINISH (REGC + 1)

#define	LIMMFINISH (SHIMMFINISH + 1)

#define	ST_OFFSET (LIMMFINISH + 1)

#define	LD_OFFSET (ST_OFFSET + 1)

#define	BASE (LD_OFFSET + 1)

#define	SYNTAX_ST_NE (BASE + 1)

#define	SYNTAX_LD_NE (SYNTAX_ST_NE + 1)

#define	SYNTAX_ST (SYNTAX_LD_NE + 1)

#define	SYNTAX_LD (SYNTAX_ST + 1)

#define	FLAG (SYNTAX_LD + 1)

#define	FLAGFINISH (FLAG + 1)

#define	FLAGINSN (FLAGFINISH + 1)

#define	DELAY (FLAGINSN + 1)

#define	COND (DELAY + 1)

#define	FORCELIMM (COND + 1)

#define	BRANCH (FORCELIMM + 1)

#define	JUMP (BRANCH + 1)

#define	JUMPFLAGS (JUMP + 1)

#define	SIZE1 (JUMPFLAGS + 1)

#define	SIZE10 (SIZE1 + 1)

#define	SIZE22 (SIZE10 + 1)

#define	SIGN0 (SIZE22 + 1)

#define	SIGN9 (SIGN0 + 1)

#define	ADDRESS3 (SIGN9 + 1)

#define	ADDRESS12 (ADDRESS3 + 1)

#define	ADDRESS24 (ADDRESS12 + 1)

#define	CACHEBYPASS5 (ADDRESS24 + 1)

#define	CACHEBYPASS14 (CACHEBYPASS5 + 1)

#define	CACHEBYPASS26 (CACHEBYPASS14 + 1)

#define	UNOPMACRO (CACHEBYPASS26 + 1)

#define	MODDOT (UNOPMACRO + 1)

#define	REG (MODDOT + 1)

#define	AUXREG (REG + 1)

#define	UNUSED_AC 0

#define	REGA_AC (UNUSED_AC + 1)

#define	REGB_SOURCE_AC (REGA_AC + 1)

#define	REGB_DEST_AC (REGB_SOURCE_AC + 1)

#define	REGC_AC (REGB_DEST_AC + 1)

#define	UIMM6_AC (REGC_AC + 1)

#define	SIMM12_AC (UIMM6_AC + 1)

#define	LIMM_AC (SIMM12_AC + 1)

#define	FORCELIMM_AC (LIMM_AC + 1)

#define	COND_AC (FORCELIMM_AC + 1)

#define	FLAG_AC (COND_AC + 1)

#define	FLAGFINISH_AC (FLAG_AC + 1)

#define	DELAY_AC (FLAGFINISH_AC + 1)

#define	JUMP_DELAY_AC (DELAY_AC + 1)

#define	SIZE1_AC (JUMP_DELAY_AC + 1)

#define	SIZE7_AC (SIZE1_AC + 1)

#define	SIZE17_AC (SIZE7_AC + 1)

#define	SIGN6_AC (SIZE17_AC + 1)

#define	SIGN16_AC (SIGN6_AC + 1)

#define	ADDRESS3_AC (SIGN16_AC + 1)

#define	ADDRESS9_AC (ADDRESS3_AC + 1)

#define	ADDRESS22_AC (ADDRESS9_AC + 1)

#define	ADDRESS22S_AC (ADDRESS22_AC + 1)

#define	CACHEBYPASS5_AC (ADDRESS22S_AC + 1)

#define	CACHEBYPASS11_AC (CACHEBYPASS5_AC + 1)

#define	CACHEBYPASS15_AC (CACHEBYPASS11_AC + 1)

#define	BASE_AC (CACHEBYPASS15_AC + 1)

#define	OFFSET_AC (BASE_AC + 1)

#define	SIMM9_AC (OFFSET_AC + 1)

#define	BLINK_AC (SIMM9_AC + 1)

#define	UNCOND_BLINK_AC (BLINK_AC + 1)

#define	BRANCH_AC (UNCOND_BLINK_AC + 1)

#define	UNCOND_BRANCH_AC (BRANCH_AC + 1)

#define	UIMM7BY2_AC (UNCOND_BRANCH_AC + 1)

#define	SIMM13BY2_AC (UIMM7BY2_AC + 1)

#define	SYNTAX_ST_NE_AC (SIMM13BY2_AC + 1)

#define	SYNTAX_LD_NE_AC (SYNTAX_ST_NE_AC + 1)

#define	SYNTAX_ST_AC (SYNTAX_LD_NE_AC + 1)

#define	SYNTAX_LD_AC (SYNTAX_ST_AC + 1)

#define	SYNTAX_EX_AT (SYNTAX_LD_AC + 1)

#define	ILINK1 (SYNTAX_EX_AT + 1)

#define	ILINK2 (ILINK1 + 1)

#define	MODDOT_AC (ILINK2 + 1)

#define	REG_AC (MODDOT_AC + 1)

#define	AUXREG_AC (REG_AC + 1)

#define	REGA_AC16 (AUXREG_AC + 1)

#define	REGB_AC16 (REGA_AC16 + 1)

#define	REGC_AC16 (REGB_AC16 + 1)

#define	REGH_AC16 (REGC_AC16 + 1)

#define	UIMM3_AC16 (REGH_AC16 + 1)

#define	UIMM5_AC16 (UIMM3_AC16 + 1)

#define	UIMM7_AC16 (UIMM5_AC16 + 1)

#define	UIMM8_AC16 (UIMM7_AC16 + 1)

#define	UIMM6BY2_AC16 (UIMM8_AC16 + 1)

#define	UIMM7BY4_AC16 (UIMM6BY2_AC16 + 1)

#define	UIMM10BY4_AC16 (UIMM7BY4_AC16 + 1)

#define	COND_BRANCH_AC16 (UIMM10BY4_AC16 + 1)

#define	CMP_BRANCH_AC16 (COND_BRANCH_AC16 + 1)

#define	UNCOND_BRANCH_AC16 (CMP_BRANCH_AC16 + 1)

#define	BLINK_AC16 (UNCOND_BRANCH_AC16 + 1)

#define	SIMM9_AC16 (BLINK_AC16 + 1)

#define	SIMM10BY2_AC16 (SIMM9_AC16 + 1)

#define	SIMM11BY4_AC16 (SIMM10BY2_AC16 + 1)

#define	REG_R0 (SIMM11BY4_AC16 + 1)

#define	REG_GP (REG_R0 + 1)

#define	REG_SP (REG_GP + 1)

#define	REG_BLINK (REG_SP + 1)

#define	REG_PCL (REG_BLINK + 1)

#define	UIMM6_A700_16 (REG_PCL + 1)

#define	SIMD_VR_DEST (UIMM6_A700_16 + 1)

#define	SIMD_VR_REGB (SIMD_VR_DEST + 1)

#define	SIMD_VR_REGC (SIMD_VR_REGB + 1)

#define	SIMD_U8_CONSTANT (SIMD_VR_REGC + 1)

#define	SIMD_I_REGB (SIMD_U8_CONSTANT + 1)

#define	SIMD_I_REGC (SIMD_I_REGB + 1)

#define	SIMD_DR_REGB (SIMD_I_REGC + 1)

#define	SIMD_DR_REGC (SIMD_DR_REGB + 1)

#define	SDASYM (SIMD_DR_REGC + 1)

#define	SIMD_LANEMASK (SDASYM+1)

#define	THROW_AC (SIMD_LANEMASK + 1)

#define	SIMD_I_REGA (THROW_AC + 1)

#define	SIMD_I_S12 (SIMD_I_REGA+1)

#define	SIMD_K_A (SIMD_I_S12+1)

#define	SIMD_K_B (SIMD_K_A+1)

#define	SIMD_K_C (SIMD_K_B+1)

#define	SIMD_I_U16 (SIMD_K_C+1)

#define	SIMD_I_UU16 (SIMD_I_U16+1)

#define	SIMD_I_UL16 (SIMD_I_UU16+1)

#define	SIMD_DISCARDED (SIMD_I_UL16+1)

#define	SIMD_I_S15 (SIMD_DISCARDED+1)

#define	SIMD_I_ZERO (SIMD_SIMD_I_S15+1)

#define	LS_VALUE 0

#define	LS_DEST 0

#define	LS_BASE 1

#define	LS_OFFSET 2

#define	ST_SYNTAX(V, B, O)

#define	LD_SYNTAX(D, B, O)

#define	X(x, b, m) ((unsigned)((x)&(((1<<(m))-1)<<(b)))>>(b))

Enumerations
enum	operand { OP_NONE , OP_REG , OP_SHIMM , OP_LIMM }

Functions
int	arc_get_noshortcut_flag (void)

	INSERT_FN (insert_u8)

	INSERT_FN (insert_u16)

	INSERT_FN (insert_uu16)

	INSERT_FN (insert_ul16)

	INSERT_FN (insert_null)

	INSERT_FN (insert_s12)

	INSERT_FN (insert_s15)

	INSERT_FN (insert_reg)

	INSERT_FN (insert_shimmfinish)

	INSERT_FN (insert_limmfinish)

	INSERT_FN (insert_offset)

	INSERT_FN (insert_base)

	INSERT_FN (insert_st_syntax)

	INSERT_FN (insert_ld_syntax)

	INSERT_FN (insert_ex_syntax)

	INSERT_FN (insert_addr_wb)

	INSERT_FN (insert_flag)

	INSERT_FN (insert_nullify)

	INSERT_FN (insert_flagfinish)

	INSERT_FN (insert_cond)

	INSERT_FN (insert_forcelimm)

	INSERT_FN (insert_reladdr)

	INSERT_FN (insert_absaddr)

	INSERT_FN (insert_jumpflags)

	INSERT_FN (insert_unopmacro)

	EXTRACT_FN (extract_reg)

	EXTRACT_FN (extract_ld_offset)

	EXTRACT_FN (extract_ld_syntax)

	EXTRACT_FN (extract_st_offset)

	EXTRACT_FN (extract_st_syntax)

	EXTRACT_FN (extract_flag)

	EXTRACT_FN (extract_cond)

	EXTRACT_FN (extract_reladdr)

	EXTRACT_FN (extract_jumpflags)

	EXTRACT_FN (extract_unopmacro)

static arc_insn	insert_u8 (arc_insn insn, long insn2 ATTRIBUTE_UNUSED, const struct arc_operand operand, int mods ATTRIBUTE_UNUSED, const struct arc_operand_value reg ATTRIBUTE_UNUSED, long value ATTRIBUTE_UNUSED, const char *errmsg ATTRIBUTE_UNUSED)

static arc_insn	insert_s12 (arc_insn insn, long ex, const struct arc_operand operand ATTRIBUTE_UNUSED, int mods ATTRIBUTE_UNUSED, const struct arc_operand_value reg ATTRIBUTE_UNUSED, long value ATTRIBUTE_UNUSED, const char *errmsg ATTRIBUTE_UNUSED)

static arc_insn	insert_u16 (arc_insn insn, long ex, const struct arc_operand operand ATTRIBUTE_UNUSED, int mods ATTRIBUTE_UNUSED, const struct arc_operand_value reg ATTRIBUTE_UNUSED, long value ATTRIBUTE_UNUSED, const char *errmsg ATTRIBUTE_UNUSED)

static arc_insn	insert_uu16 (arc_insn insn, long ex, const struct arc_operand operand ATTRIBUTE_UNUSED, int mods ATTRIBUTE_UNUSED, const struct arc_operand_value reg ATTRIBUTE_UNUSED, long value ATTRIBUTE_UNUSED, const char *errmsg ATTRIBUTE_UNUSED)

static arc_insn	insert_ul16 (arc_insn insn, long ex, const struct arc_operand operand ATTRIBUTE_UNUSED, int mods ATTRIBUTE_UNUSED, const struct arc_operand_value reg ATTRIBUTE_UNUSED, long value ATTRIBUTE_UNUSED, const char *errmsg ATTRIBUTE_UNUSED)

static arc_insn	insert_s15 (arc_insn insn, long ex, const struct arc_operand operand ATTRIBUTE_UNUSED, int mods ATTRIBUTE_UNUSED, const struct arc_operand_value reg ATTRIBUTE_UNUSED, long value ATTRIBUTE_UNUSED, const char *errmsg ATTRIBUTE_UNUSED)

static arc_insn	insert_null (arc_insn insn, long ex ATTRIBUTE_UNUSED, const struct arc_operand operand ATTRIBUTE_UNUSED, int mods ATTRIBUTE_UNUSED, const struct arc_operand_value reg ATTRIBUTE_UNUSED, long value ATTRIBUTE_UNUSED, const char *errmsg ATTRIBUTE_UNUSED)

static arc_insn	insert_reg (arc_insn insn, long ex ATTRIBUTE_UNUSED, const struct arc_operand operand, int mods, const struct arc_operand_value reg, long value, const char *errmsg)

static arc_insn	insert_flag (arc_insn insn, long ex ATTRIBUTE_UNUSED, const struct arc_operand operand ATTRIBUTE_UNUSED, int mods ATTRIBUTE_UNUSED, const struct arc_operand_value reg ATTRIBUTE_UNUSED, long value ATTRIBUTE_UNUSED, const char *errmsg ATTRIBUTE_UNUSED)

static arc_insn	insert_nullify (arc_insn insn, long ex ATTRIBUTE_UNUSED, const struct arc_operand operand, int mods ATTRIBUTE_UNUSED, const struct arc_operand_value reg ATTRIBUTE_UNUSED, long value, const char *errmsg ATTRIBUTE_UNUSED)

static arc_insn	insert_flagfinish (arc_insn insn, long ex ATTRIBUTE_UNUSED, const struct arc_operand operand, int mods ATTRIBUTE_UNUSED, const struct arc_operand_value reg ATTRIBUTE_UNUSED, long value ATTRIBUTE_UNUSED, const char *errmsg ATTRIBUTE_UNUSED)

static arc_insn	insert_cond (arc_insn insn, long ex ATTRIBUTE_UNUSED, const struct arc_operand operand, int mods ATTRIBUTE_UNUSED, const struct arc_operand_value reg ATTRIBUTE_UNUSED, long value, const char *errmsg ATTRIBUTE_UNUSED)

static arc_insn	insert_forcelimm (arc_insn insn, long ex ATTRIBUTE_UNUSED, const struct arc_operand operand ATTRIBUTE_UNUSED, int mods ATTRIBUTE_UNUSED, const struct arc_operand_value reg ATTRIBUTE_UNUSED, long value ATTRIBUTE_UNUSED, const char *errmsg ATTRIBUTE_UNUSED)

static arc_insn	insert_addr_wb (arc_insn insn, long ex ATTRIBUTE_UNUSED, const struct arc_operand operand, int mods ATTRIBUTE_UNUSED, const struct arc_operand_value reg ATTRIBUTE_UNUSED, long value ATTRIBUTE_UNUSED, const char *errmsg ATTRIBUTE_UNUSED)

static arc_insn	insert_base (arc_insn insn, long ex ATTRIBUTE_UNUSED, const struct arc_operand operand, int mods, const struct arc_operand_value reg, long value, const char *errmsg)

static arc_insn	insert_offset (arc_insn insn, long ex ATTRIBUTE_UNUSED, const struct arc_operand operand, int mods, const struct arc_operand_value reg, long value, const char *errmsg)

static long	extract_st_syntax (arc_insn insn, const struct arc_operand operand ATTRIBUTE_UNUSED, int mods ATTRIBUTE_UNUSED, const struct arc_operand_value *opval ATTRIBUTE_UNUSED, int invalid)

int	arc_limm_fixup_adjust (arc_insn insn)

static arc_insn	insert_st_syntax (arc_insn insn, long ex ATTRIBUTE_UNUSED, const struct arc_operand operand ATTRIBUTE_UNUSED, int mods ATTRIBUTE_UNUSED, const struct arc_operand_value reg ATTRIBUTE_UNUSED, long value ATTRIBUTE_UNUSED, const char *errmsg)

static arc_insn	insert_ld_syntax (arc_insn insn, long ex ATTRIBUTE_UNUSED, const struct arc_operand operand ATTRIBUTE_UNUSED, int mods ATTRIBUTE_UNUSED, const struct arc_operand_value reg ATTRIBUTE_UNUSED, long value ATTRIBUTE_UNUSED, const char *errmsg)

static long	extract_ld_syntax (arc_insn insn, const struct arc_operand operand ATTRIBUTE_UNUSED, int mods ATTRIBUTE_UNUSED, const struct arc_operand_value *opval ATTRIBUTE_UNUSED, int invalid)

static arc_insn	insert_ex_syntax (arc_insn insn, long ex ATTRIBUTE_UNUSED, const struct arc_operand operand ATTRIBUTE_UNUSED, int mods ATTRIBUTE_UNUSED, const struct arc_operand_value reg ATTRIBUTE_UNUSED, long value ATTRIBUTE_UNUSED, const char *errmsg)

static arc_insn	insert_shimmfinish (arc_insn insn, long ex ATTRIBUTE_UNUSED, const struct arc_operand operand, int mods ATTRIBUTE_UNUSED, const struct arc_operand_value reg ATTRIBUTE_UNUSED, long value ATTRIBUTE_UNUSED, const char *errmsg ATTRIBUTE_UNUSED)

static arc_insn	insert_limmfinish (arc_insn insn, long ex ATTRIBUTE_UNUSED, const struct arc_operand operand ATTRIBUTE_UNUSED, int mods ATTRIBUTE_UNUSED, const struct arc_operand_value reg ATTRIBUTE_UNUSED, long value ATTRIBUTE_UNUSED, const char *errmsg ATTRIBUTE_UNUSED)

static arc_insn	insert_jumpflags (arc_insn insn, long ex ATTRIBUTE_UNUSED, const struct arc_operand operand, int mods ATTRIBUTE_UNUSED, const struct arc_operand_value reg ATTRIBUTE_UNUSED, long value, const char *errmsg)

static arc_insn	insert_unopmacro (arc_insn insn, long ex ATTRIBUTE_UNUSED, const struct arc_operand operand, int mods ATTRIBUTE_UNUSED, const struct arc_operand_value reg ATTRIBUTE_UNUSED, long value ATTRIBUTE_UNUSED, const char *errmsg ATTRIBUTE_UNUSED)

static arc_insn	insert_reladdr (arc_insn insn, long ex ATTRIBUTE_UNUSED, const struct arc_operand operand, int mods ATTRIBUTE_UNUSED, const struct arc_operand_value reg ATTRIBUTE_UNUSED, long value, const char *errmsg)

static arc_insn	insert_absaddr (arc_insn insn, long ex ATTRIBUTE_UNUSED, const struct arc_operand operand ATTRIBUTE_UNUSED, int mods ATTRIBUTE_UNUSED, const struct arc_operand_value reg ATTRIBUTE_UNUSED, long value ATTRIBUTE_UNUSED, const char *errmsg)

void	arc_opcode_init_extract (void)

static const struct arc_operand_value *	lookup_register (int type, long regno)

static long	extract_reg (arc_insn insn, const struct arc_operand operand, int mods, const struct arc_operand_value *opval, int invalid ATTRIBUTE_UNUSED)

static long	extract_flag (arc_insn insn, const struct arc_operand operand, int mods ATTRIBUTE_UNUSED, const struct arc_operand_value *opval, int invalid ATTRIBUTE_UNUSED)

static long	extract_cond (arc_insn insn, const struct arc_operand operand, int mods ATTRIBUTE_UNUSED, const struct arc_operand_value *opval, int invalid ATTRIBUTE_UNUSED)

static long	extract_reladdr (arc_insn insn, const struct arc_operand operand, int mods ATTRIBUTE_UNUSED, const struct arc_operand_value *opval ATTRIBUTE_UNUSED, int invalid ATTRIBUTE_UNUSED)

static long	extract_jumpflags (arc_insn insn, const struct arc_operand operand, int mods ATTRIBUTE_UNUSED, const struct arc_operand_value *opval ATTRIBUTE_UNUSED, int invalid)

static long	extract_st_offset (arc_insn insn, const struct arc_operand operand, int mods ATTRIBUTE_UNUSED, const struct arc_operand_value *opval ATTRIBUTE_UNUSED, int invalid)

static long	extract_ld_offset (arc_insn insn, const struct arc_operand operand, int mods, const struct arc_operand_value *opval, int invalid)

static long	extract_unopmacro (arc_insn insn, const struct arc_operand operand ATTRIBUTE_UNUSED, int mods ATTRIBUTE_UNUSED, const struct arc_operand_value *opval ATTRIBUTE_UNUSED, int invalid)

int	arc_get_opcode_mach (int bfd_mach, int big_p)

void	arc_opcode_init_tables (int flags)

int	arc_opcode_supported (const struct arc_opcode *opcode)

int	arc_opval_supported (const struct arc_operand_value *opval ATTRIBUTE_UNUSED)

const struct arc_opcode *	arc_opcode_lookup_asm (const char *insn)

const struct arc_opcode *	arc_opcode_lookup_dis (unsigned int insn)

int	arc_test_wb (void)

void	arc_opcode_init_insert (void)

int	arc_opcode_limm_p (long *limmp)

const struct arc_operand_value *	arc_opcode_lookup_suffix (const struct arc_operand *type, int value)

int	arc_insn_is_j (arc_insn)

int	ac_lpcc_insn (arc_insn insn)

int	ac_add_reg_sdasym_insn (arc_insn)

int	ac_get_load_sdasym_insn_type (arc_insn, int)

int	ac_get_store_sdasym_insn_type (arc_insn, int)

int	arc_insn_not_jl (arc_insn insn)

int	a4_brk_insn (arc_insn insn)

int	ac_brk_s_insn (arc_insn insn)

int	ac_branch_or_jump_insn (arc_insn insn, int compact_insn_16)

int	ARC700_rtie_insn (arc_insn insn)

int	ac_get_store_sdasym_insn_type (arc_insn insn, int compact_insn_16 ATTRIBUTE_UNUSED)

int	ac_constant_operand (const struct arc_operand *op)

int	ARC700_register_simd_operand (char fmt)

int	ac_register_operand (const struct arc_operand *op)

int	ac_symbol_operand (const struct arc_operand *op)

int	arc_operand_type (int opertype)

struct arc_operand_value *	get_ext_suffix (char *s, char field)

char *	arc_aux_reg_name (int regVal)

Variables
static int	flag_p

static int	flagshimm_handled_p

static int	addrwb_p

static int	nullify_p

static int	nullify

static int	jumpflags_p

static int	shimm_p

static int	shimm

static int	limm_p

static long	limm

static int	cpu_type

static unsigned char	arc_operand_map_a4 [256]

static unsigned char	arc_operand_map_ac [256]

static enum operand	ls_operand [OPERANDS]

static const struct arc_operand	arc_operands_a4 []

static const struct arc_operand	arc_operands_ac []

int	arc_cond_p

int	arc_mach_a4 = 1

unsigned long	arc_ld_ext_mask = 1 << (62 - 32)

int	arc_user_mode_only = 0

struct arc_ext_operand_value *	arc_ext_operands

unsigned char *	arc_operand_map = arc_operand_map_a4

const struct arc_operand *	arc_operands = arc_operands_a4

static struct arc_opcode	arc_opcodes []

static const struct arc_operand_value	arc_reg_names_a4 []

static const struct arc_operand_value	arc_reg_names_a500600 []

static const struct arc_operand_value	arc_reg_names_a700 []

const struct arc_operand_value *	arc_reg_names = arc_reg_names_a4

int	arc_reg_names_count

static const struct arc_operand_value	arc_suffixes_a4 []

static const struct arc_operand_value	arc_suffixes_ac []

const struct arc_operand_value *	arc_suffixes = arc_suffixes_a4

int	arc_suffixes_count

static struct arc_opcode *	opcode_map [26+1]

static struct arc_opcode *	icode_map [32]

Macro Definition Documentation

◆ ADDRESS12

#define ADDRESS12 (ADDRESS3 + 1)

◆ ADDRESS22_AC

#define ADDRESS22_AC (ADDRESS9_AC + 1)

◆ ADDRESS22S_AC

#define ADDRESS22S_AC (ADDRESS22_AC + 1)

◆ ADDRESS24

#define ADDRESS24 (ADDRESS12 + 1)

◆ ADDRESS3

#define ADDRESS3 (SIGN9 + 1)

◆ ADDRESS3_AC

#define ADDRESS3_AC (SIGN16_AC + 1)

◆ ADDRESS9_AC

#define ADDRESS9_AC (ADDRESS3_AC + 1)

◆ AUXREG

#define AUXREG (REG + 1)

◆ AUXREG_AC

#define AUXREG_AC (REG_AC + 1)

◆ BASE

#define BASE (LD_OFFSET + 1)

◆ BASE_AC

#define BASE_AC (CACHEBYPASS15_AC + 1)

◆ BLINK_AC

#define BLINK_AC (SIMM9_AC + 1)

◆ BLINK_AC16

#define BLINK_AC16 (UNCOND_BRANCH_AC16 + 1)

◆ BRANCH

#define BRANCH (FORCELIMM + 1)

◆ BRANCH_AC

#define BRANCH_AC (UNCOND_BLINK_AC + 1)

◆ CACHEBYPASS11_AC

#define CACHEBYPASS11_AC (CACHEBYPASS5_AC + 1)

◆ CACHEBYPASS14

#define CACHEBYPASS14 (CACHEBYPASS5 + 1)

◆ CACHEBYPASS15_AC

#define CACHEBYPASS15_AC (CACHEBYPASS11_AC + 1)

◆ CACHEBYPASS26

#define CACHEBYPASS26 (CACHEBYPASS14 + 1)

◆ CACHEBYPASS5

#define CACHEBYPASS5 (ADDRESS24 + 1)

◆ CACHEBYPASS5_AC

#define CACHEBYPASS5_AC (ADDRESS22S_AC + 1)

◆ CMP_BRANCH_AC16

#define CMP_BRANCH_AC16 (COND_BRANCH_AC16 + 1)

◆ COND

#define COND (DELAY + 1)

◆ COND_AC

#define COND_AC (FORCELIMM_AC + 1)

◆ COND_BRANCH_AC16

#define COND_BRANCH_AC16 (UIMM10BY4_AC16 + 1)

◆ DELAY

#define DELAY (FLAGINSN + 1)

◆ DELAY_AC

#define DELAY_AC (FLAGFINISH_AC + 1)

◆ ELEMENTS_IN

#define ELEMENTS_IN ( arr ) (sizeof (arr) / sizeof ((arr)[0]))

Definition at line 46 of file arc-opc.c.

◆ EXTRACT_FN

#define EXTRACT_FN ( fn )

Value:

static long fn (arc_insn *, const struct arc_operand *, \

int, const struct arc_operand_value **, int *)

arc_insn

unsigned int arc_insn

Definition: arc.h:62

fn

static const char struct stat static buf struct stat static buf static idle const char static path static fd const char static len const void static prot const char struct module static image struct kernel_sym static table unsigned char static buf static fsuid unsigned struct dirent unsigned static count const struct iovec static count static pid const void static len static flags const struct sched_param static p static pid static policy struct timespec static tp static suid unsigned fn

Definition: sflib.h:186

arc_operand_value

Definition: arc.h:189

arc_operand

Definition: arc.h:212

Definition at line 60 of file arc-opc.c.

◆ FLAG

#define FLAG (SYNTAX_LD + 1)

◆ FLAG_AC

#define FLAG_AC (COND_AC + 1)

◆ FLAGFINISH

#define FLAGFINISH (FLAG + 1)

◆ FLAGFINISH_AC

#define FLAGFINISH_AC (FLAG_AC + 1)

◆ FLAGINSN

#define FLAGINSN (FLAGFINISH + 1)

◆ FORCELIMM

#define FORCELIMM (COND + 1)

◆ FORCELIMM_AC

#define FORCELIMM_AC (LIMM_AC + 1)

◆ ILINK1

#define ILINK1 (SYNTAX_EX_AT + 1)

◆ ILINK2

#define ILINK2 (ILINK1 + 1)

◆ INSERT_FN

#define INSERT_FN ( fn )

Value:

static arc_insn fn (arc_insn, long *, const struct arc_operand *, \
            int, const struct arc_operand_value *, long, \
            const char **)

Definition at line 55 of file arc-opc.c.

◆ JUMP

#define JUMP (BRANCH + 1)

◆ JUMP_DELAY_AC

#define JUMP_DELAY_AC (DELAY_AC + 1)

◆ JUMPFLAGS

#define JUMPFLAGS (JUMP + 1)

◆ LD_OFFSET

#define LD_OFFSET (ST_OFFSET + 1)

◆ LD_SYNTAX

#define LD_SYNTAX	(	D,
		B,
		O
	)

Value:

  (   (ls_operand[LS_DEST]   == (D) \
    && ls_operand[LS_BASE]   == (B) \
    && ls_operand[LS_OFFSET] == (O)))

◆ LIMM_AC

#define LIMM_AC (SIMM12_AC + 1)

◆ LIMMFINISH

#define LIMMFINISH (SHIMMFINISH + 1)

◆ LS_BASE

#define LS_BASE 1

Definition at line 884 of file arc-opc.c.

◆ LS_DEST

#define LS_DEST 0

Definition at line 883 of file arc-opc.c.

◆ LS_OFFSET

#define LS_OFFSET 2

Definition at line 885 of file arc-opc.c.

◆ LS_VALUE

#define LS_VALUE 0

Definition at line 882 of file arc-opc.c.

◆ MODDOT

#define MODDOT (UNOPMACRO + 1)

◆ MODDOT_AC

#define MODDOT_AC (ILINK2 + 1)

◆ OFFSET_AC

#define OFFSET_AC (BASE_AC + 1)

◆ OPERANDS

#define OPERANDS 3

Definition at line 152 of file arc-opc.c.

◆ REG

#define REG (MODDOT + 1)

◆ REG_AC

#define REG_AC (MODDOT_AC + 1)

◆ REG_BLINK

#define REG_BLINK (REG_SP + 1)

◆ REG_GP

#define REG_GP (REG_R0 + 1)

◆ REG_PCL

#define REG_PCL (REG_BLINK + 1)

◆ REG_R0

#define REG_R0 (SIMM11BY4_AC16 + 1)

◆ REG_SP

#define REG_SP (REG_GP + 1)

◆ REGA

#define REGA (UNUSED + 1)

◆ REGA_AC

#define REGA_AC (UNUSED_AC + 1)

◆ REGA_AC16

#define REGA_AC16 (AUXREG_AC + 1)

◆ REGB

#define REGB (REGA + 1)

◆ REGB_AC16

#define REGB_AC16 (REGA_AC16 + 1)

◆ REGB_DEST_AC

#define REGB_DEST_AC (REGB_SOURCE_AC + 1)

◆ REGB_SOURCE_AC

#define REGB_SOURCE_AC (REGA_AC + 1)

◆ REGC

#define REGC (REGB + 1)

◆ REGC_AC

#define REGC_AC (REGB_DEST_AC + 1)

◆ REGC_AC16

#define REGC_AC16 (REGB_AC16 + 1)

◆ REGH_AC16

#define REGH_AC16 (REGC_AC16 + 1)

◆ SDASYM

#define SDASYM (SIMD_DR_REGC + 1)

◆ SHIMMFINISH

#define SHIMMFINISH (REGC + 1)

◆ SIGN0

#define SIGN0 (SIZE22 + 1)

◆ SIGN16_AC

#define SIGN16_AC (SIGN6_AC + 1)

◆ SIGN6_AC

#define SIGN6_AC (SIZE17_AC + 1)

◆ SIGN9

#define SIGN9 (SIGN0 + 1)

◆ SIMD_DISCARDED

#define SIMD_DISCARDED (SIMD_I_UL16+1)

◆ SIMD_DR_REGB

#define SIMD_DR_REGB (SIMD_I_REGC + 1)

◆ SIMD_DR_REGC

#define SIMD_DR_REGC (SIMD_DR_REGB + 1)

◆ SIMD_I_REGA

#define SIMD_I_REGA (THROW_AC + 1)

◆ SIMD_I_REGB

#define SIMD_I_REGB (SIMD_U8_CONSTANT + 1)

◆ SIMD_I_REGC

#define SIMD_I_REGC (SIMD_I_REGB + 1)

◆ SIMD_I_S12

#define SIMD_I_S12 (SIMD_I_REGA+1)

◆ SIMD_I_S15

#define SIMD_I_S15 (SIMD_DISCARDED+1)

◆ SIMD_I_U16

#define SIMD_I_U16 (SIMD_K_C+1)

◆ SIMD_I_UL16

#define SIMD_I_UL16 (SIMD_I_UU16+1)

◆ SIMD_I_UU16

#define SIMD_I_UU16 (SIMD_I_U16+1)

◆ SIMD_I_ZERO

#define SIMD_I_ZERO (SIMD_SIMD_I_S15+1)

◆ SIMD_K_A

#define SIMD_K_A (SIMD_I_S12+1)

◆ SIMD_K_B

#define SIMD_K_B (SIMD_K_A+1)

◆ SIMD_K_C

#define SIMD_K_C (SIMD_K_B+1)

◆ SIMD_LANEMASK

#define SIMD_LANEMASK (SDASYM+1)

◆ SIMD_U8_CONSTANT

#define SIMD_U8_CONSTANT (SIMD_VR_REGC + 1)

◆ SIMD_VR_DEST

#define SIMD_VR_DEST (UIMM6_A700_16 + 1)

◆ SIMD_VR_REGB

#define SIMD_VR_REGB (SIMD_VR_DEST + 1)

◆ SIMD_VR_REGC

#define SIMD_VR_REGC (SIMD_VR_REGB + 1)

◆ SIMM10BY2_AC16

#define SIMM10BY2_AC16 (SIMM9_AC16 + 1)

◆ SIMM11BY4_AC16

#define SIMM11BY4_AC16 (SIMM10BY2_AC16 + 1)

◆ SIMM12_AC

#define SIMM12_AC (UIMM6_AC + 1)

◆ SIMM13BY2_AC

#define SIMM13BY2_AC (UIMM7BY2_AC + 1)

◆ SIMM9_AC

#define SIMM9_AC (OFFSET_AC + 1)

◆ SIMM9_AC16

#define SIMM9_AC16 (BLINK_AC16 + 1)

◆ SIZE1

#define SIZE1 (JUMPFLAGS + 1)

◆ SIZE10

#define SIZE10 (SIZE1 + 1)

◆ SIZE17_AC

#define SIZE17_AC (SIZE7_AC + 1)

◆ SIZE1_AC

#define SIZE1_AC (JUMP_DELAY_AC + 1)

◆ SIZE22

#define SIZE22 (SIZE10 + 1)

◆ SIZE7_AC

#define SIZE7_AC (SIZE1_AC + 1)

◆ ST_OFFSET

#define ST_OFFSET (LIMMFINISH + 1)

◆ ST_SYNTAX

#define ST_SYNTAX	(	V,
		B,
		O
	)

Value:

((ls_operand[LS_VALUE]  == (V) && \
  ls_operand[LS_BASE]   == (B) && \
  ls_operand[LS_OFFSET] == (O)))

◆ SYNTAX_EX_AT

#define SYNTAX_EX_AT (SYNTAX_LD_AC + 1)

◆ SYNTAX_LD

#define SYNTAX_LD (SYNTAX_ST + 1)

◆ SYNTAX_LD_AC

#define SYNTAX_LD_AC (SYNTAX_ST_AC + 1)

◆ SYNTAX_LD_NE

#define SYNTAX_LD_NE (SYNTAX_ST_NE + 1)

◆ SYNTAX_LD_NE_AC

#define SYNTAX_LD_NE_AC (SYNTAX_ST_NE_AC + 1)

◆ SYNTAX_ST

#define SYNTAX_ST (SYNTAX_LD_NE + 1)

◆ SYNTAX_ST_AC

#define SYNTAX_ST_AC (SYNTAX_LD_NE_AC + 1)

◆ SYNTAX_ST_NE

#define SYNTAX_ST_NE (BASE + 1)

◆ SYNTAX_ST_NE_AC

#define SYNTAX_ST_NE_AC (SIMM13BY2_AC + 1)

◆ THROW_AC

#define THROW_AC (SIMD_LANEMASK + 1)

◆ UIMM10BY4_AC16

#define UIMM10BY4_AC16 (UIMM7BY4_AC16 + 1)

◆ UIMM3_AC16

#define UIMM3_AC16 (REGH_AC16 + 1)

◆ UIMM5_AC16

#define UIMM5_AC16 (UIMM3_AC16 + 1)

◆ UIMM6_A700_16

#define UIMM6_A700_16 (REG_PCL + 1)

◆ UIMM6_AC

#define UIMM6_AC (REGC_AC + 1)

◆ UIMM6BY2_AC16

#define UIMM6BY2_AC16 (UIMM8_AC16 + 1)

◆ UIMM7_AC16

#define UIMM7_AC16 (UIMM5_AC16 + 1)

◆ UIMM7BY2_AC

#define UIMM7BY2_AC (UNCOND_BRANCH_AC + 1)

◆ UIMM7BY4_AC16

#define UIMM7BY4_AC16 (UIMM6BY2_AC16 + 1)

◆ UIMM8_AC16

#define UIMM8_AC16 (UIMM7_AC16 + 1)

◆ UNCOND_BLINK_AC

#define UNCOND_BLINK_AC (BLINK_AC + 1)

◆ UNCOND_BRANCH_AC

#define UNCOND_BRANCH_AC (BRANCH_AC + 1)

◆ UNCOND_BRANCH_AC16

#define UNCOND_BRANCH_AC16 (CMP_BRANCH_AC16 + 1)

◆ UNOPMACRO

#define UNOPMACRO (CACHEBYPASS26 + 1)

◆ UNUSED

#define UNUSED 0

◆ UNUSED_AC

#define UNUSED_AC 0

◆ X

#define X	(	x,
		b,
		m
	)	((unsigned)((x)&(((1<<(m))-1)<<(b)))>>(b))

Enumeration Type Documentation

◆ operand

enum operand

Enumerator
OP_NONE
OP_REG
OP_SHIMM
OP_LIMM

Definition at line 39 of file arc-opc.c.

39 {OP_NONE,OP_REG,OP_SHIMM,OP_LIMM};

OP_LIMM

@ OP_LIMM

Definition: arc-opc.c:39

OP_NONE

@ OP_NONE

Definition: arc-opc.c:39

OP_REG

@ OP_REG

Definition: arc-opc.c:39

OP_SHIMM

@ OP_SHIMM

Definition: arc-opc.c:39

Function Documentation

◆ a4_brk_insn()

int a4_brk_insn ( arc_insn insn )

Definition at line 4549 of file arc-opc.c.

 {
   return insn == 0x1ffffe00;
 }

◆ ac_add_reg_sdasym_insn()

int ac_add_reg_sdasym_insn ( arc_insn insn )

Definition at line 4595 of file arc-opc.c.

 {
   return ((insn & 0xf8ff0fc0) == 0x20000f80);
 }

Referenced by insert_reg().

◆ ac_branch_or_jump_insn()

int ac_branch_or_jump_insn	(	arc_insn	insn,
		int	compact_insn_16
	)

Definition at line 4569 of file arc-opc.c.

 {
  
   return ((!compact_insn_16 && ((insn & I(-1)) == I(0x4)) &&
                    (((insn >> 18) & 0xf) == 0x8)) ||
       (compact_insn_16 && ((insn & I(-1)) == I(0xf))) ||
       (!compact_insn_16 && ((insn & I(-1)) == I(0x1))) ||
       (compact_insn_16 && ((insn & I(-1)) == I(0x1f))) ||
       (!compact_insn_16 && ((insn & I(-1)) == I(0x0))) ||
       (compact_insn_16 && ((insn & I(-1)) == I(0x1e))));
 }

References I.

◆ ac_brk_s_insn()

int ac_brk_s_insn ( arc_insn insn )

Definition at line 4559 of file arc-opc.c.

 {
   return insn == 0x7fff;
 }

◆ ac_constant_operand()

int ac_constant_operand ( const struct arc_operand * op )

Definition at line 4737 of file arc-opc.c.

 {
   switch (op->fmt)
     {
     case '@': /* This is valid only for A700 . The checks in the instruction patterns would take care of other checks.*/
  
       case 'u':
       case 'K':
       case 'L':
       case 'o':
       case 'e':
       case 'E':
       case 'j':
       case 'J':
       case 'k':
       case 'l':
       case 'm':
       case 'M':
       case 'O':
       case 'R':
     /* Operands for the Aurora SIMD ISA*/
       case '?':
       case '\14':
       case '\20':
       case '\21':
       case '\22':
       case '\23':
       case '\24':
       case '\25':
  
         return 1;
     }
     return 0;
 }

◆ ac_get_load_sdasym_insn_type()

int ac_get_load_sdasym_insn_type	(	arc_insn	insn,
		int	compact_insn_16
	)

Definition at line 4625 of file arc-opc.c.

 {
   int load_type = -1;
  
   /* ld[b/w]_s */
   if (compact_insn_16)
     {
       switch (insn & 0xfe00)
     {
       /* ld_s */
     case 0xc800:
       load_type = 10;
       break;
  
       /* ldb_s */
     case 0xca00:
       load_type = 11;
       break;
  
       /* ldw_s */
     case 0xcc00:
       load_type = 12;
       break;
     }
     }
   else
     {
       /* ld/ldw/ldb */
       switch (insn & 0xf8000180)
     {
       /* ld */
     case 0x10000000:
         if (((insn >> 9) & 3) == 3) {
             load_type = 0;
         } else {
             load_type = 1;
         }
         break;
  
         /* ldw */
     case 0x10000100:
         if (((insn >> 9) & 3) == 3) {
             load_type = 2;
         } else {
             load_type = 1;
         }
         break;
  
         /* ldb */
     case 0x10000080:
       load_type = 1;
       break;
  
     }
     }
  
   return load_type;
 }

◆ ac_get_store_sdasym_insn_type() [1/2]

int ac_get_store_sdasym_insn_type	(	arc_insn	insn,
		int compact_insn_16	ATTRIBUTE_UNUSED
	)

Definition at line 4697 of file arc-opc.c.

 {
   int store_type = -1;
  
   /* st/stw/stb */
   switch (insn & 0xf8000007)
     {
       /* st */
     case 0x18000000:
         if (((insn >> 3) & 3) == 3) {
             store_type = 0;
         } else {
             store_type = 1;
         }
         break;
  
         /* stw */
     case 0x18000004:
         if (((insn >> 3) & 3) == 3) {
             store_type = 2;
         } else {
             store_type = 1;
         }
         break;
  
         /* stb */
     case 0x18000002:
       store_type = 1;
       break;
  
     }
  
   return store_type;
 }

◆ ac_get_store_sdasym_insn_type() [2/2]

int ac_get_store_sdasym_insn_type	(	arc_insn	,
		int
	)

◆ ac_lpcc_insn()

int ac_lpcc_insn ( arc_insn insn )

Definition at line 4586 of file arc-opc.c.

 {
     return ( ((insn & 0xfffff000) == 0x20a80000) ||
          ((insn & 0xfffff020) == 0x20a80020));
 }

◆ ac_register_operand()

int ac_register_operand ( const struct arc_operand * op )

Definition at line 4803 of file arc-opc.c.

 {
   switch (op->fmt)
     {
       case 'a':
       case 'b':
       case 'c':
       case 'A':
       case 'B':
       case '#':
       case 'C':
       case 'U':
       case 'g':
       case 'G':
       case 'r':
       case '4':
       case '5':
       case '6':
       case '7':
       case '8':
       case '9':
       case '!':
         return 1;
     }
     return 0;
 }

◆ ac_symbol_operand()

int ac_symbol_operand ( const struct arc_operand * op )

Definition at line 4833 of file arc-opc.c.

 {
   switch (op->fmt)
     {
       case 'L':
       case 'd':
       case 'h':
       case 'H':
       case 'i':
       case 'I':
       case 'y':
       case 'Y':
       case 's':
       case 'S':
       case 'Z':
       case 'W':
         return 1;
     }
   return 0;
 }

◆ ARC700_register_simd_operand()

int ARC700_register_simd_operand ( char fmt )

Definition at line 4776 of file arc-opc.c.

 {
   switch (fmt)
     {
     case '*':
     case '(':
     case ')':
       return 1; /*If the operand belongs to  the Vector register(Vrxx) set*/
     case '<':
     case '>':
       return 2; /*If the operand belongs to the DMA registers (DRxx) set*/
     case '\13':
     case '{':
     case '}':
       return 3; /*If the operand belongs to the Scalar register (Ixx) set*/
     case '\15':
     case '\16':
     case '\17':
       return 4; /*If the operand belongs to the Scalar register (Kxx) set*/
     }
   return 0;
 }

◆ ARC700_rtie_insn()

int ARC700_rtie_insn ( arc_insn insn )

Definition at line 4603 of file arc-opc.c.

 {
   return insn == 0x242f003f;
 }

◆ arc_aux_reg_name()

char* arc_aux_reg_name ( int regVal )

Definition at line 4965 of file arc-opc.c.

 {
   int i;
  
   for (i= arc_reg_names_count ; i > 0  ; i--)
     {
       if ((arc_reg_names[i].type == AUXREG_AC) && (arc_reg_names[i].value == regVal)) {
           return arc_reg_names[i].name;
       }
     }
  
   return NULL;
 }

References arc_reg_names, arc_reg_names_count, AUXREG_AC, i, arc_operand_value::name, NULL, type, and value.

Referenced by my_sprintf().

◆ arc_get_noshortcut_flag()

int arc_get_noshortcut_flag ( void )

Definition at line 4958 of file arc-opc.c.

 {
   return ARC_REGISTER_NOSHORT_CUT;
 }

References ARC_REGISTER_NOSHORT_CUT.

◆ arc_get_opcode_mach()

int arc_get_opcode_mach	(	int	bfd_mach,
		int	big_p
	)

Definition at line 4282 of file arc-opc.c.

 {
   static int mach_type_map[] =
     {
       ARC_MACH_ARC4,
       ARC_MACH_ARC5,
       ARC_MACH_ARC6,
       ARC_MACH_ARC7,
       ARC_MACH_ARC601
     };
  
   return mach_type_map[bfd_mach] | (big_p ? ARC_MACH_BIG : 0);
 }

References ARC_MACH_ARC4, ARC_MACH_ARC5, ARC_MACH_ARC6, ARC_MACH_ARC601, ARC_MACH_ARC7, and ARC_MACH_BIG.

◆ arc_insn_is_j()

int arc_insn_is_j ( arc_insn insn )

Definition at line 4532 of file arc-opc.c.

 {
   return (insn & (I(-1))) == I(0x7);
 }

References I.

◆ arc_insn_not_jl()

int arc_insn_not_jl ( arc_insn insn )

Definition at line 4539 of file arc-opc.c.

 {
   return ((insn & (I(-1)|A(-1)|C(-1)|R(-1,7,1)|R(-1,9,1)))
       != (I(0x7) | R(-1,9,1)));
 }

References A, C, I, and R.

◆ arc_limm_fixup_adjust()

int arc_limm_fixup_adjust ( arc_insn insn )

Definition at line 1658 of file arc-opc.c.

 {
   int retval = 0;
  
   /* Check for st shimm,[limm].  */
  
   if ((insn & (I(-1) | C(-1) | B(-1))) ==
       (I(2) | C(ARC_REG_SHIMM) | B(ARC_REG_LIMM)))
     {
       retval = insn & 0x1ff;
       if (retval & 0x100) { /* Sign extend 9 bit offset.  */
           retval |= ~0x1ff;
       }
     }
   return -retval; /* Negate offset for return.  */
 }

References ARC_REG_LIMM, ARC_REG_SHIMM, B, C, and I.

Referenced by insert_st_syntax().

◆ arc_opcode_init_extract()

void arc_opcode_init_extract ( void )

Definition at line 2131 of file arc-opc.c.

 {
   arc_opcode_init_insert ();
 }

References arc_opcode_init_insert().

◆ arc_opcode_init_insert()

void arc_opcode_init_insert ( void )

Definition at line 4457 of file arc-opc.c.

 {
   int i;
  
   for (i = 0; i < OPERANDS; i++) {
       ls_operand[i] = OP_NONE;
   }
  
   flag_p = 0;
   flagshimm_handled_p = 0;
   arc_cond_p = 0;
   addrwb_p = 0;
   shimm_p = 0;
   limm_p = 0;
   jumpflags_p = 0;
   nullify_p = 0;
   nullify = 0; /* The default is important.  */
 }

References addrwb_p, arc_cond_p, flag_p, flagshimm_handled_p, i, jumpflags_p, limm_p, ls_operand, nullify, nullify_p, OP_NONE, OPERANDS, and shimm_p.

Referenced by arc_opcode_init_extract().

◆ arc_opcode_init_tables()

void arc_opcode_init_tables ( int flags )

Definition at line 4304 of file arc-opc.c.

 {
   static int init_p = 0;
  
   /* If initialization was already done but current cpu type is different
      from the one for which initialization was done earlier, then do
      initialization again */
   if (init_p && cpu_type != flags) {
       init_p = 0;
   }
  
   cpu_type = flags;
  
   /* We may be intentionally called more than once (for example gdb will call
      us each time the user switches cpu).  These tables only need to be init'd
      once though.  */
   /* ??? We can remove the need for arc_opcode_supported by taking it into
      account here, but I'm not sure I want to do that yet (if ever).  */
   if (!init_p)
     {
       int i;
  
       if (arc_mach_a4)
         {
           /* Initialize operand map table for ARCtanget-A4 */
           memset (arc_operand_map_a4, 0, sizeof (arc_operand_map_a4));
  
       for (i = 0; i < (int)ELEMENTS_IN (arc_operands_a4); i++) {
           arc_operand_map_a4[arc_operands_a4[i].fmt] = i;
       }
  
       /* Set the pointers to operand table, operand map table */
           arc_operands        = arc_operands_a4;
           arc_operand_map     = arc_operand_map_a4;
           arc_reg_names       = arc_reg_names_a4;
           arc_reg_names_count = ELEMENTS_IN(arc_reg_names_a4);
           arc_suffixes        = arc_suffixes_a4;
           arc_suffixes_count  = ELEMENTS_IN(arc_suffixes_a4);
         }
       else
         {
           /* Initialize operand map table for ARCompact */
           memset (arc_operand_map_ac, 0, sizeof (arc_operand_map_ac));
  
       for (i = 0; i < (int)ELEMENTS_IN (arc_operands_ac); i++) {
           arc_operand_map_ac[arc_operands_ac[i].fmt] = i;
       }
  
       /* Set the pointers to operand table, operand map table */
           arc_operands = arc_operands_ac;
           arc_operand_map = arc_operand_map_ac;
  
       /* Codito :: Ideally all the checking should be on this
          basis and not on flags shared across the libraries as seems
          to be the case for A4. Would have to check that and test
          it at some point in time.
       */
       if (ARC_OPCODE_CPU(flags) == ARC_MACH_ARC7)
         {
           arc_reg_names       = arc_reg_names_a700;
           arc_reg_names_count = ELEMENTS_IN(arc_reg_names_a700);
         }
       else
         {
           arc_reg_names       = arc_reg_names_a500600;
           arc_reg_names_count = ELEMENTS_IN(arc_reg_names_a500600);
         }
           arc_suffixes       = arc_suffixes_ac;
           arc_suffixes_count = ELEMENTS_IN(arc_suffixes_ac);
         }
  
       memset (opcode_map, 0, sizeof (opcode_map));
       memset (icode_map,  0, sizeof (icode_map));
  
       /* Scan the table backwards so macros appear at the front.  */
       for (i = ELEMENTS_IN(arc_opcodes) - 1; i >= 0; --i)
     {
       int opcode_hash = ARC_HASH_OPCODE (arc_opcodes[i].syntax);
       int icode_hash = ARC_HASH_ICODE (arc_opcodes[i].value);
  
       arc_opcodes[i].next_asm = opcode_map[opcode_hash];
       opcode_map[opcode_hash] = &arc_opcodes[i];
  
       arc_opcodes[i].next_dis = icode_map[icode_hash];
       icode_map[icode_hash] = &arc_opcodes[i];
     }
  
       init_p = 1;
     }
 }

References ARC_HASH_ICODE, ARC_HASH_OPCODE, arc_mach_a4, ARC_MACH_ARC7, ARC_OPCODE_CPU, arc_opcodes, arc_operand_map, arc_operand_map_a4, arc_operand_map_ac, arc_operands, arc_operands_a4, arc_operands_ac, arc_reg_names, arc_reg_names_a4, arc_reg_names_a500600, arc_reg_names_a700, arc_reg_names_count, arc_suffixes, arc_suffixes_a4, arc_suffixes_ac, arc_suffixes_count, cpu_type, ELEMENTS_IN, flags, arc_operand::fmt, i, icode_map, int, memset(), arc_opcode::next_asm, arc_opcode::next_dis, opcode_map, benchmark::syntax, and value.

◆ arc_opcode_limm_p()

int arc_opcode_limm_p ( long * limmp )

Definition at line 4481 of file arc-opc.c.

 {
     if (limmp) {
         *limmp = limm;
     }
     return limm_p;
 }

References limm, and limm_p.

◆ arc_opcode_lookup_asm()

const struct arc_opcode* arc_opcode_lookup_asm ( const char * insn )

Definition at line 4432 of file arc-opc.c.

 {
   return opcode_map[ARC_HASH_OPCODE (insn)];
 }

References ARC_HASH_OPCODE, and opcode_map.

◆ arc_opcode_lookup_dis()

const struct arc_opcode* arc_opcode_lookup_dis ( unsigned int insn )

Definition at line 4441 of file arc-opc.c.

 {
   return icode_map[ARC_HASH_ICODE (insn)];
 }

References ARC_HASH_ICODE, and icode_map.

◆ arc_opcode_lookup_suffix()

const struct arc_operand_value* arc_opcode_lookup_suffix	(	const struct arc_operand *	type,
		int	value
	)

Definition at line 4494 of file arc-opc.c.

 {
   const struct arc_operand_value *v,*end;
   struct arc_ext_operand_value *ext_oper = arc_ext_operands;
   while (ext_oper)
     {
       if (type == &arc_operands[ext_oper->operand.type] && value == ext_oper->operand.value) {
           return (&ext_oper->operand);
       }
       ext_oper = ext_oper->next;
     }
  
   /* ??? This is a little slow and can be speeded up.  */
     for (v = arc_suffixes, end = arc_suffixes + arc_suffixes_count; v < end; ++v) {
         if (type == &arc_operands[v->type] && value == v->value) {
             return v;
         }
     }
     return 0;
 }

References arc_ext_operands, arc_operands, arc_suffixes, arc_suffixes_count, test_evm::end, arc_ext_operand_value::next, arc_ext_operand_value::operand, arc_operand_value::type, type, v, arc_operand_value::value, and value.

Referenced by extract_cond(), and extract_flag().

◆ arc_opcode_supported()

int arc_opcode_supported ( const struct arc_opcode * opcode )

Definition at line 4400 of file arc-opc.c.

 {
     if (ARC_OPCODE_CPU (opcode->flags) == 0) {
         return 1;
     }
     if (ARC_OPCODE_CPU (opcode->flags) & ARC_HAVE_CPU (cpu_type)) {
         return 1;
     }
     return 0;
 }

References ARC_HAVE_CPU, ARC_OPCODE_CPU, cpu_type, and arc_opcode::flags.

◆ arc_operand_type()

int arc_operand_type ( int opertype )

Definition at line 4856 of file arc-opc.c.

 {
   switch (opertype)
     {
     case 0:
       return (arc_mach_a4 ? COND : COND_AC);
     case 1:
       return (arc_mach_a4 ? REG : REG_AC);
     case 2:
       return (arc_mach_a4 ? AUXREG : AUXREG_AC);
     default:
       return 0; // abort
     }
 }

References arc_mach_a4, AUXREG, AUXREG_AC, COND, COND_AC, REG, and REG_AC.

◆ arc_opval_supported()

int arc_opval_supported ( const struct arc_operand_value *opval ATTRIBUTE_UNUSED )

Definition at line 4416 of file arc-opc.c.

 {
 #if 0 /* I'm leaving this is a place holder, we don't discrimnate */
   if (ARC_OPVAL_CPU (opval->flags) == 0)
     return 1;
   if (ARC_OPVAL_CPU (opval->flags) & ARC_HAVE_CPU (cpu_type))
     return 1;
   return 0;
 #endif
   return(1);
 }

References ARC_HAVE_CPU, ARC_OPVAL_CPU, and cpu_type.

◆ arc_test_wb()

int arc_test_wb ( void )

Definition at line 4448 of file arc-opc.c.

 {
   return addrwb_p;
 }

References addrwb_p.

◆ extract_cond()

static long extract_cond	(	arc_insn *	insn,
		const struct arc_operand *	operand,
		int mods	ATTRIBUTE_UNUSED,
		const struct arc_operand_value **	opval,
		int *invalid	ATTRIBUTE_UNUSED
	)

static

Definition at line 2325 of file arc-opc.c.

 {
   long cond;
   const struct arc_operand_value *val;
  
   if (flagshimm_handled_p) {
       return 0;
   }
  
   cond = (*insn >> operand->shift) & ((1 << operand->bits) - 1);
   val = arc_opcode_lookup_suffix (operand, cond);
  
   /* Ignore NULL values of `val'.  Several condition code values are
      reserved for extensions.  */
   if (opval != NULL && val != NULL) {
       *opval = val;
   }
   return cond;
 }

References arc_opcode_lookup_suffix(), cond, flagshimm_handled_p, NULL, and val.

◆ extract_flag()

static long extract_flag	(	arc_insn *	insn,
		const struct arc_operand *	operand,
		int mods	ATTRIBUTE_UNUSED,
		const struct arc_operand_value **	opval,
		int *invalid	ATTRIBUTE_UNUSED
	)

static

Definition at line 2292 of file arc-opc.c.

 {
   int f;
   const struct arc_operand_value *val;
  
   if (flagshimm_handled_p) {
       f = flag_p != 0;
   } else {
       f = (*insn & (1 << operand->shift)) != 0;
   }
  
   /* There is no text for zero values.  */
   if (f == 0) {
       return 0;
   }
   flag_p = 1;
   val = arc_opcode_lookup_suffix (operand, 1);
   if (opval != NULL && val != NULL) {
       *opval = val;
   }
   return val?val->value:0;
 }

References arc_opcode_lookup_suffix(), f, flag_p, flagshimm_handled_p, NULL, and val.

◆ EXTRACT_FN() [1/10]

EXTRACT_FN ( extract_cond )

◆ EXTRACT_FN() [2/10]

EXTRACT_FN ( extract_flag )

◆ EXTRACT_FN() [3/10]

EXTRACT_FN ( extract_jumpflags )

◆ EXTRACT_FN() [4/10]

EXTRACT_FN ( extract_ld_offset )

◆ EXTRACT_FN() [5/10]

EXTRACT_FN ( extract_ld_syntax )

◆ EXTRACT_FN() [6/10]

EXTRACT_FN ( extract_reg )

◆ EXTRACT_FN() [7/10]

EXTRACT_FN ( extract_reladdr )

◆ EXTRACT_FN() [8/10]

EXTRACT_FN ( extract_st_offset )

◆ EXTRACT_FN() [9/10]

EXTRACT_FN ( extract_st_syntax )

◆ EXTRACT_FN() [10/10]

EXTRACT_FN ( extract_unopmacro )

◆ extract_jumpflags()

static long extract_jumpflags	(	arc_insn *	insn,
		const struct arc_operand *	operand,
		int mods	ATTRIBUTE_UNUSED,
		const struct arc_operand_value **opval	ATTRIBUTE_UNUSED,
		int *	invalid
	)

static

Definition at line 2372 of file arc-opc.c.

 {
     if (!flag_p || !limm_p) {
         *invalid = 1;
     }
     return ((flag_p && limm_p)
             ? (insn[1] >> operand->shift) & ((1 << operand->bits) - 1)
             : 0);
 }

References flag_p, and limm_p.

◆ extract_ld_offset()

static long extract_ld_offset	(	arc_insn *	insn,
		const struct arc_operand *	operand,
		int	mods,
		const struct arc_operand_value **	opval,
		int *	invalid
	)

static

Definition at line 2416 of file arc-opc.c.

 {
   int test = insn[0] & I(-1);
   int value = 0;
  
   if (test)
     {
       value = insn[0] & 511;
       if ((operand->flags & ARC_OPERAND_SIGNED) && (value & 256)) {
           value -= 512;
       }
       if (value) {
           ls_operand[LS_OFFSET] = OP_SHIMM;
       }
  
       return value;
     }
   /* If it isn't in the insn, it's concealed behind reg 'c'.  */
   return extract_reg (insn, &arc_operands[arc_operand_map['c']],
               mods, opval, invalid);
 }

References arc_operand_map, ARC_OPERAND_SIGNED, arc_operands, extract_reg(), I, LS_OFFSET, ls_operand, OP_SHIMM, and value.

◆ extract_ld_syntax()

static long extract_ld_syntax	(	arc_insn *	insn,
		const struct arc_operand *operand	ATTRIBUTE_UNUSED,
		int mods	ATTRIBUTE_UNUSED,
		const struct arc_operand_value **opval	ATTRIBUTE_UNUSED,
		int *	invalid
	)

static

Definition at line 1846 of file arc-opc.c.

 {
   int test = insn[0] & I(-1);
  
   if (!(test == I(1)))
     {
       if ((ls_operand[LS_DEST] == OP_SHIMM || ls_operand[LS_BASE] == OP_SHIMM || ls_operand[LS_OFFSET] == OP_SHIMM)) {
           *invalid = 1;
       }
     }
     if (!((LD_SYNTAX (OP_REG, OP_REG, OP_NONE) && test == I (1)) || LD_SYNTAX (OP_REG, OP_REG, OP_REG) || LD_SYNTAX (OP_REG, OP_REG, OP_SHIMM) || (LD_SYNTAX (OP_REG, OP_REG, OP_LIMM) && test != I (1)) || (LD_SYNTAX (OP_REG, OP_LIMM, OP_REG) && test != I (1)) || (LD_SYNTAX (OP_REG, OP_SHIMM, OP_NONE) && shimm == 0) || LD_SYNTAX (OP_REG, OP_SHIMM, OP_SHIMM) || (LD_SYNTAX (OP_REG, OP_LIMM, OP_NONE) && test == I (1)))) {
         *invalid = 1;
     }
     return 0;
 }

References I, LD_SYNTAX, LS_BASE, LS_DEST, LS_OFFSET, ls_operand, OP_LIMM, OP_NONE, OP_REG, OP_SHIMM, and shimm.

◆ extract_reg()

static long extract_reg	(	arc_insn *	insn,
		const struct arc_operand *	operand,
		int	mods,
		const struct arc_operand_value **	opval,
		int *invalid	ATTRIBUTE_UNUSED
	)

static

Definition at line 2172 of file arc-opc.c.

 {
   int regno;
   long value;
   enum operand op_type;
  
   /* Get the register number.  */
   regno = (*insn >> operand->shift) & ((1 << operand->bits) - 1);
  
   /* Is it a constant marker?  */
   if (regno == ARC_REG_SHIMM)
     {
       op_type = OP_SHIMM;
       /* Always return zero if dest is a shimm  mlm.  */
  
       if ('a' != operand->fmt)
     {
       value = *insn & 511;
       if ((operand->flags & ARC_OPERAND_SIGNED) && (value & 256)) {
           value -= 512;
       }
       if (!flagshimm_handled_p) {
           flag_p = 0;
       }
       flagshimm_handled_p = 1;
       } else {
           value = 0;
       }
     }
   else if (regno == ARC_REG_SHIMM_UPDATE)
     {
       op_type = OP_SHIMM;
  
       /* Always return zero if dest is a shimm  mlm.  */
       if ('a' != operand->fmt)
     {
       value = *insn & 511;
       if ((operand->flags & ARC_OPERAND_SIGNED) && (value & 256)) {
           value -= 512;
       }
       } else {
           value = 0;
       }
  
       flag_p = 1;
       flagshimm_handled_p = 1;
     }
   else if (regno == ARC_REG_LIMM)
     {
       op_type = OP_LIMM;
       value = insn[1];
       limm_p = 1;
  
       /* If this is a jump instruction (j,jl), show new pc correctly.  */
       if (0x07 == ((*insn & I (-1)) >> 27)) {
           value = (value & 0xffffff);
       }
     }
  
   /* It's a register, set OPVAL (that's the only way we distinguish registers
      from constants here).  */
   else
     {
       const struct arc_operand_value *reg = lookup_register (REG, regno);
  
       op_type = OP_REG;
  
       if (!reg) {
           return 0;
       }
       if (opval != NULL) {
           *opval = reg;
       }
       value = regno;
     }
  
   /* If this field takes an auxiliary register, see if it's a known one.  */
   if ((mods & ARC_MOD_AUXREG)
       && ARC_REG_CONSTANT_P (regno))
     {
       const struct arc_operand_value *reg = lookup_register (AUXREG, value);
  
       /* This is really a constant, but tell the caller it has a special
      name.  */
       if (reg != NULL && opval != NULL) {
           *opval = reg;
       }
     }
  
   switch (operand->fmt)
     {
     case 'a':
       ls_operand[LS_DEST] = op_type;
       break;
     case 's':
       ls_operand[LS_BASE] = op_type;
       break;
     case 'c':
         if ((insn[0] & I (-1)) == I (2)) {
             ls_operand[LS_VALUE] = op_type;
         } else {
             ls_operand[LS_OFFSET] = op_type;
         }
         break;
     case 'o': case 'O':
       ls_operand[LS_OFFSET] = op_type;
       break;
     }
  
   return value;
 }

References ARC_MOD_AUXREG, ARC_OPERAND_SIGNED, ARC_REG_CONSTANT_P, ARC_REG_LIMM, ARC_REG_SHIMM, ARC_REG_SHIMM_UPDATE, AUXREG, flag_p, flagshimm_handled_p, I, limm_p, lookup_register(), LS_BASE, LS_DEST, LS_OFFSET, ls_operand, LS_VALUE, NULL, OP_LIMM, OP_REG, OP_SHIMM, REG, reg, and value.

Referenced by extract_ld_offset().

◆ extract_reladdr()

static long extract_reladdr	(	arc_insn *	insn,
		const struct arc_operand *	operand,
		int mods	ATTRIBUTE_UNUSED,
		const struct arc_operand_value **opval	ATTRIBUTE_UNUSED,
		int *invalid	ATTRIBUTE_UNUSED
	)

static

Definition at line 2353 of file arc-opc.c.

 {
   long addr;
  
   addr = (*insn >> operand->shift) & ((1 << operand->bits) - 1);
   if ((operand->flags & ARC_OPERAND_SIGNED) && (addr & (1 << (operand->bits - 1)))) {
       addr -= 1 << operand->bits;
   }
  
   return addr << 2;
 }

References addr, and ARC_OPERAND_SIGNED.

◆ extract_st_offset()

static long extract_st_offset	(	arc_insn *	insn,
		const struct arc_operand *	operand,
		int mods	ATTRIBUTE_UNUSED,
		const struct arc_operand_value **opval	ATTRIBUTE_UNUSED,
		int *	invalid
	)

static

Definition at line 2389 of file arc-opc.c.

 {
   int value = 0;
  
   if (ls_operand[LS_VALUE] != OP_SHIMM || ls_operand[LS_BASE] != OP_LIMM)
     {
       value = insn[0] & 511;
       if ((operand->flags & ARC_OPERAND_SIGNED) && (value & 256)) {
           value -= 512;
       }
       if (value) {
           ls_operand[LS_OFFSET] = OP_SHIMM;
       }
   } else {
       *invalid = 1;
   }
  
   return value;
 }

References ARC_OPERAND_SIGNED, LS_BASE, LS_OFFSET, ls_operand, LS_VALUE, OP_LIMM, OP_SHIMM, and value.

◆ extract_st_syntax()

static long extract_st_syntax	(	arc_insn *	insn,
		const struct arc_operand *operand	ATTRIBUTE_UNUSED,
		int mods	ATTRIBUTE_UNUSED,
		const struct arc_operand_value **opval	ATTRIBUTE_UNUSED,
		int *	invalid
	)

static

Definition at line 1640 of file arc-opc.c.

 {
 #define ST_SYNTAX(V,B,O) \
 ((ls_operand[LS_VALUE]  == (V) && \
   ls_operand[LS_BASE]   == (B) && \
   ls_operand[LS_OFFSET] == (O)))
  
     if (!((ST_SYNTAX (OP_REG, OP_REG, OP_NONE) && (insn[0] & 511) == 0) || ST_SYNTAX (OP_REG, OP_LIMM, OP_NONE) || (ST_SYNTAX (OP_SHIMM, OP_REG, OP_NONE) && (insn[0] & 511) == 0) || (ST_SYNTAX (OP_SHIMM, OP_SHIMM, OP_NONE) && (insn[0] & 511) == 0) || ST_SYNTAX (OP_SHIMM, OP_LIMM, OP_NONE) || ST_SYNTAX (OP_SHIMM, OP_LIMM, OP_SHIMM) || ST_SYNTAX (OP_SHIMM, OP_SHIMM, OP_SHIMM) || (ST_SYNTAX (OP_LIMM, OP_REG, OP_NONE) && (insn[0] & 511) == 0) || ST_SYNTAX (OP_REG, OP_REG, OP_SHIMM) || ST_SYNTAX (OP_REG, OP_SHIMM, OP_SHIMM) || ST_SYNTAX (OP_SHIMM, OP_REG, OP_SHIMM) || ST_SYNTAX (OP_LIMM, OP_SHIMM, OP_SHIMM) || ST_SYNTAX (OP_LIMM, OP_SHIMM, OP_NONE) || ST_SYNTAX (OP_LIMM, OP_REG, OP_SHIMM))) {
         *invalid = 1;
     }
     return 0;
 }

References OP_LIMM, OP_NONE, OP_REG, OP_SHIMM, and ST_SYNTAX.

◆ extract_unopmacro()

static long extract_unopmacro	(	arc_insn *	insn,
		const struct arc_operand *operand	ATTRIBUTE_UNUSED,
		int mods	ATTRIBUTE_UNUSED,
		const struct arc_operand_value **opval	ATTRIBUTE_UNUSED,
		int *	invalid
	)

static

Definition at line 2447 of file arc-opc.c.

 {
   /* This misses the case where B == ARC_REG_SHIMM_UPDATE &&
      C == ARC_REG_SHIMM (or vice versa).  No big deal.  Those insns will get
      printed as "and"s.  */
   if (((*insn >> ARC_SHIFT_REGB) & ARC_MASK_REG) != ((*insn >> ARC_SHIFT_REGC) & ARC_MASK_REG)) {
       if (invalid != NULL) {
           *invalid = 1;
       }
   }
  
   return 0;
 }

◆ get_ext_suffix()

struct arc_operand_value* get_ext_suffix	(	char *	s,
		char	field
	)

Definition at line 4873 of file arc-opc.c.

 {
   struct arc_ext_operand_value *suffix = arc_ext_operands;
   char ctype = 0;
  
   switch(field){
   case 'e' :
       ctype = arc_mach_a4 ? CACHEBYPASS5 : 0;
       break;
   case 'f' :
       ctype = arc_mach_a4 ? FLAG : FLAG_AC;
       break;
   case 'j' :
       ctype = arc_mach_a4 ? JUMPFLAGS : 0;
       break;
   case 'p' :
       ctype = arc_mach_a4 ? 0 : ADDRESS9_AC;
       break;
   case 'q' :
       ctype = arc_mach_a4 ? COND : COND_AC;
       break;
   case 't' :
       ctype = arc_mach_a4 ? 0 : SIZE7_AC;
       break;
   case 'v' :
       ctype = arc_mach_a4 ? ADDRESS24 : CACHEBYPASS11_AC;
       break;
   case 'w' :
       ctype = arc_mach_a4 ? ADDRESS3 : ADDRESS3_AC;
       break;
   case 'x' :
       ctype = arc_mach_a4 ? SIGN0 : SIGN6_AC;
       break;
   case 'y' :
       ctype = arc_mach_a4 ? SIZE22 : 0;
       break;
   case 'z' :
       ctype = arc_mach_a4 ? SIZE1 : SIZE1_AC;
       break;
   case 'D' :
       ctype = arc_mach_a4 ? CACHEBYPASS26 : CACHEBYPASS5_AC;
       break;
   case 'E' :
       ctype = arc_mach_a4 ? CACHEBYPASS14 : 0;
       break;
   case 'P' :
       ctype = arc_mach_a4 ? 0 : ADDRESS22_AC;
       break;
   case 'T' :
       ctype = arc_mach_a4 ? 0 : SIZE17_AC;
       break;
   case 'V' :
       ctype = arc_mach_a4 ? 0 : CACHEBYPASS15_AC;
       break;
   case 'W' :
       ctype = arc_mach_a4 ? ADDRESS12 : 0;
       break;
   case 'X' :
       ctype = arc_mach_a4 ? SIGN9 : SIGN16_AC;
       break;
   case 'Z' :
       ctype = arc_mach_a4 ? SIZE10 : 0;
       break;
   case '&' :
       ctype = arc_mach_a4 ? 0 : ADDRESS22S_AC;
       break;
   default :
       ctype = arc_mach_a4 ? COND : COND_AC;
       break;
       } /* end switch(field) */
       if (ctype == 0) {
           ctype = arc_mach_a4 ? COND : COND_AC;
       }
       while (suffix) {
           if ((suffix->operand.type == ctype) && !strcmp (s, suffix->operand.name)) {
               return (&suffix->operand);
           }
           suffix = suffix->next;
   } /* end while(suffix) */
  
   return NULL;
 }

References ADDRESS12, ADDRESS22_AC, ADDRESS22S_AC, ADDRESS24, ADDRESS3, ADDRESS3_AC, ADDRESS9_AC, arc_ext_operands, arc_mach_a4, CACHEBYPASS11_AC, CACHEBYPASS14, CACHEBYPASS15_AC, CACHEBYPASS26, CACHEBYPASS5, CACHEBYPASS5_AC, COND, COND_AC, test-lz4-speed::default, FLAG, FLAG_AC, JUMPFLAGS, NULL, s, SIGN0, SIGN16_AC, SIGN6_AC, SIGN9, SIZE1, SIZE10, SIZE17_AC, SIZE1_AC, SIZE22, SIZE7_AC, and suffix.

◆ insert_absaddr()

static arc_insn insert_absaddr	(	arc_insn	insn,
		long *ex	ATTRIBUTE_UNUSED,
		const struct arc_operand *operand	ATTRIBUTE_UNUSED,
		int mods	ATTRIBUTE_UNUSED,
		const struct arc_operand_value *reg	ATTRIBUTE_UNUSED,
		long value	ATTRIBUTE_UNUSED,
		const char **	errmsg
	)

static

Definition at line 2099 of file arc-opc.c.

 {
   if (limm_p)
     {
       /* If it is a jump and link, .jd must be specified.  */
       if (insn & R (-1, 9, 1))
     {
           if (!nullify_p) {
               insn |= 0x02 << 5; /* Default nullify to .jd.  */
           } else if (nullify != 0x02) {
               *errmsg = _ ("must specify .jd or no nullify suffix");
           }
     }
     }
   return insn;
 }

References _, limm_p, nullify, nullify_p, and R.

◆ insert_addr_wb()

static arc_insn insert_addr_wb	(	arc_insn	insn,
		long *ex	ATTRIBUTE_UNUSED,
		const struct arc_operand *	operand,
		int mods	ATTRIBUTE_UNUSED,
		const struct arc_operand_value *reg	ATTRIBUTE_UNUSED,
		long value	ATTRIBUTE_UNUSED,
		const char **errmsg	ATTRIBUTE_UNUSED
	)

static

Definition at line 1430 of file arc-opc.c.

 {
     /* Ravi: added the 'w' to handle the st.ab st.as instructions after
      * adding suport for it in the arc_suffixes_ac by defining aw, ab and as
      * to be ADDRESS3_AC also */
  
     if (!arc_mach_a4 && (('p' == operand->fmt) || ('P' == operand->fmt) || ('w' == operand->fmt) || ('&' == operand->fmt))) {
         addrwb_p = value << operand->shift;
     } else {
         addrwb_p = 1 << operand->shift;
     }
     return insn;
 }

References addrwb_p, arc_mach_a4, and value.

◆ insert_base()

static arc_insn insert_base	(	arc_insn	insn,
		long *ex	ATTRIBUTE_UNUSED,
		const struct arc_operand *	operand,
		int	mods,
		const struct arc_operand_value *	reg,
		long	value,
		const char **	errmsg
	)

static

Definition at line 1450 of file arc-opc.c.

 {
   if (reg != NULL)
     {
       arc_insn myinsn;
       if (!arc_mach_a4 && ('g' == operand->fmt)) {
           insn |= insert_reg (0, ex, operand, mods, reg, value, errmsg);
       } else {
           myinsn = (insert_reg (0, ex, operand, mods, reg, value, errmsg) >> operand->shift);
           insn |= B (myinsn);
     }
       ls_operand[LS_BASE] = OP_REG;
     }
   else if (arc_mach_a4 && ARC_SHIMM_CONST_P (value) && !arc_cond_p)
     {
       if (shimm_p && value != shimm)
     {
       /* Convert the previous shimm operand to a limm.  */
       limm_p = 1;
       limm = shimm;
       insn &= ~C(-1); /* We know where the value is in insn.  */
       insn |= C(ARC_REG_LIMM);
       ls_operand[LS_VALUE] = OP_LIMM;
     }
       insn |= ARC_REG_SHIMM << operand->shift;
       shimm_p = 1;
       shimm = value;
       ls_operand[LS_BASE] = OP_SHIMM;
       ls_operand[LS_OFFSET] = OP_SHIMM;
     }
   else if (arc_mach_a4)
     {
       if (limm_p && value != limm)
     {
       *errmsg = _("too many long constants");
       return insn;
     }
       limm_p = 1;
       limm = value;
       insn |= B(ARC_REG_LIMM);
       ls_operand[LS_BASE] = OP_LIMM;
     }
  
   return insn;
 }

References _, arc_cond_p, arc_mach_a4, ARC_REG_LIMM, ARC_REG_SHIMM, ARC_SHIMM_CONST_P, B, C, ex, insert_reg(), limm, limm_p, LS_BASE, LS_OFFSET, ls_operand, LS_VALUE, NULL, OP_LIMM, OP_REG, OP_SHIMM, reg, shimm, shimm_p, and value.

◆ insert_cond()

static arc_insn insert_cond	(	arc_insn	insn,
		long *ex	ATTRIBUTE_UNUSED,
		const struct arc_operand *	operand,
		int mods	ATTRIBUTE_UNUSED,
		const struct arc_operand_value *reg	ATTRIBUTE_UNUSED,
		long	value,
		const char **errmsg	ATTRIBUTE_UNUSED
	)

static

Definition at line 1398 of file arc-opc.c.

 {
   arc_cond_p = 1;
  
   insn |= (value & ((1 << operand->bits) - 1)) << operand->shift;
   return insn;
 }

References arc_cond_p, and value.

◆ insert_ex_syntax()

static arc_insn insert_ex_syntax	(	arc_insn	insn,
		long *ex	ATTRIBUTE_UNUSED,
		const struct arc_operand *operand	ATTRIBUTE_UNUSED,
		int mods	ATTRIBUTE_UNUSED,
		const struct arc_operand_value *reg	ATTRIBUTE_UNUSED,
		long value	ATTRIBUTE_UNUSED,
		const char **	errmsg
	)

static

Definition at line 1867 of file arc-opc.c.

 {
   /* Ravi: operand validity checks for the ARC700 */
   if (cpu_type == ARC_MACH_ARC7)
   /* if (arc_get_opcode_mach (arc_mach_type, 0) == ARC_MACH_ARC7) */
     {
       unsigned ac_reg_hi = X (insn, 12, 3);
       unsigned ac_reg_lo = X (insn, 24, 3);
       unsigned ac_reg_num = (ac_reg_hi << 3) | ac_reg_lo;
  
       if (arc_user_mode_only && (ac_reg_num == 29 || ac_reg_num == 30)) {
           *errmsg = _ ("ex operand error: Privilege Violation exception");
       }
       if (0x20 <= ac_reg_num && ac_reg_num <= 0x3F && !((arc_ld_ext_mask >> (ac_reg_num - 32)) & 1)) {
           *errmsg = _ ("ld operand error: Instruction Error exception");
       }
     }
   return insn;
 }

References _, arc_ld_ext_mask, ARC_MACH_ARC7, arc_user_mode_only, cpu_type, and X.

◆ insert_flag()

static arc_insn insert_flag	(	arc_insn	insn,
		long *ex	ATTRIBUTE_UNUSED,
		const struct arc_operand *operand	ATTRIBUTE_UNUSED,
		int mods	ATTRIBUTE_UNUSED,
		const struct arc_operand_value *reg	ATTRIBUTE_UNUSED,
		long value	ATTRIBUTE_UNUSED,
		const char **errmsg	ATTRIBUTE_UNUSED
	)

static

Definition at line 1344 of file arc-opc.c.

 {
   /* We can't store anything in the insn until we've parsed the registers.
      Just record the fact that we've got this flag.  `insert_reg' will use it
      to store the correct value (ARC_REG_SHIMM_UPDATE or bit 0x100).  */
   flag_p = 1;
   return insn;
 }

References flag_p.

◆ insert_flagfinish()

static arc_insn insert_flagfinish	(	arc_insn	insn,
		long *ex	ATTRIBUTE_UNUSED,
		const struct arc_operand *	operand,
		int mods	ATTRIBUTE_UNUSED,
		const struct arc_operand_value *reg	ATTRIBUTE_UNUSED,
		long value	ATTRIBUTE_UNUSED,
		const char **errmsg	ATTRIBUTE_UNUSED
	)

static

Definition at line 1379 of file arc-opc.c.

 {
   if (flag_p && !flagshimm_handled_p)
     {
       //if (shimm_p) abort ();
       flagshimm_handled_p = 1;
       insn |= (1 << operand->shift);
     }
   return insn;
 }

References flag_p, and flagshimm_handled_p.

◆ INSERT_FN() [1/25]

INSERT_FN ( insert_absaddr )

◆ INSERT_FN() [2/25]

INSERT_FN ( insert_addr_wb )

◆ INSERT_FN() [3/25]

INSERT_FN ( insert_base )

◆ INSERT_FN() [4/25]

INSERT_FN ( insert_cond )

◆ INSERT_FN() [5/25]

INSERT_FN ( insert_ex_syntax )

◆ INSERT_FN() [6/25]

INSERT_FN ( insert_flag )

◆ INSERT_FN() [7/25]

INSERT_FN ( insert_flagfinish )

◆ INSERT_FN() [8/25]

INSERT_FN ( insert_forcelimm )

◆ INSERT_FN() [9/25]

INSERT_FN ( insert_jumpflags )

◆ INSERT_FN() [10/25]

INSERT_FN ( insert_ld_syntax )

◆ INSERT_FN() [11/25]

INSERT_FN ( insert_limmfinish )

◆ INSERT_FN() [12/25]

INSERT_FN ( insert_null )

◆ INSERT_FN() [13/25]

INSERT_FN ( insert_nullify )

◆ INSERT_FN() [14/25]

INSERT_FN ( insert_offset )

◆ INSERT_FN() [15/25]

INSERT_FN ( insert_reg )

◆ INSERT_FN() [16/25]

INSERT_FN ( insert_reladdr )

◆ INSERT_FN() [17/25]

INSERT_FN ( insert_s12 )

◆ INSERT_FN() [18/25]

INSERT_FN ( insert_s15 )

◆ INSERT_FN() [19/25]

INSERT_FN ( insert_shimmfinish )

◆ INSERT_FN() [20/25]

INSERT_FN ( insert_st_syntax )

◆ INSERT_FN() [21/25]

INSERT_FN ( insert_u16 )

◆ INSERT_FN() [22/25]

INSERT_FN ( insert_u8 )

◆ INSERT_FN() [23/25]

INSERT_FN ( insert_ul16 )

◆ INSERT_FN() [24/25]

INSERT_FN ( insert_unopmacro )

◆ INSERT_FN() [25/25]

INSERT_FN ( insert_uu16 )

◆ insert_forcelimm()

static arc_insn insert_forcelimm	(	arc_insn	insn,
		long *ex	ATTRIBUTE_UNUSED,
		const struct arc_operand *operand	ATTRIBUTE_UNUSED,
		int mods	ATTRIBUTE_UNUSED,
		const struct arc_operand_value *reg	ATTRIBUTE_UNUSED,
		long value	ATTRIBUTE_UNUSED,
		const char **errmsg	ATTRIBUTE_UNUSED
	)

static

Definition at line 1418 of file arc-opc.c.

 {
   arc_cond_p = 1;
   return insn;
 }

References arc_cond_p.

◆ insert_jumpflags()

static arc_insn insert_jumpflags	(	arc_insn	insn,
		long *ex	ATTRIBUTE_UNUSED,
		const struct arc_operand *	operand,
		int mods	ATTRIBUTE_UNUSED,
		const struct arc_operand_value *reg	ATTRIBUTE_UNUSED,
		long	value,
		const char **	errmsg
	)

static

Definition at line 1934 of file arc-opc.c.

 {
     if (!flag_p) {
         *errmsg = _ ("jump flags, but no .f seen");
  
     } else if (!limm_p) {
         *errmsg = _ ("jump flags, but no limm addr");
  
     } else if (limm & 0xfc000000) {
         *errmsg = _ ("flag bits of jump address limm lost");
  
     } else if (limm & 0x03000000) {
         *errmsg = _ ("attempt to set HR bits");
  
     } else if ((value & ((1 << operand->bits) - 1)) != value) {
         *errmsg = _ ("bad jump flags value");
     }
  
     jumpflags_p = 1;
     limm = ((limm & ((1 << operand->shift) - 1)) | ((value & ((1 << operand->bits) - 1)) << operand->shift));
     return insn;
 }

References _, flag_p, jumpflags_p, limm, limm_p, and value.

◆ insert_ld_syntax()

static arc_insn insert_ld_syntax	(	arc_insn	insn,
		long *ex	ATTRIBUTE_UNUSED,
		const struct arc_operand *operand	ATTRIBUTE_UNUSED,
		int mods	ATTRIBUTE_UNUSED,
		const struct arc_operand_value *reg	ATTRIBUTE_UNUSED,
		long value	ATTRIBUTE_UNUSED,
		const char **	errmsg
	)

static

Definition at line 1767 of file arc-opc.c.

 {
 #define LD_SYNTAX(D, B, O) \
   (   (ls_operand[LS_DEST]   == (D) \
     && ls_operand[LS_BASE]   == (B) \
     && ls_operand[LS_OFFSET] == (O)))
  
 #define X(x,b,m) ((unsigned)((x)&(((1<<(m))-1)<<(b)))>>(b))
   int test = insn & I (-1);
  
   /* do syntax check for ARCompact 'ld' insn */
   if (!arc_mach_a4)
     {
       /* TODO - check for validity of operands for ARCompact load insn */
  
       /* Extract operand 6 bits of the A field from insn starting at bit
          position 0.  */
       unsigned char ac_reg_num = X(insn,0,6);
  
       if (addrwb_p)
     {
           if (ls_operand[LS_BASE] != OP_REG
               /* .as is not actually an address write-back.  */
               && addrwb_p != 0xc00000) {
               *errmsg = _ ("address writeback not allowed");
           }
           insn |= addrwb_p;
     }
  
       /* Fixme: We should hash define register names to their respective
          numbers and not use them as 29, 30, 31,....  */
  
       if (0x20 <= ac_reg_num && ac_reg_num <= 0x3F)
     {
           if (!((arc_ld_ext_mask >> (ac_reg_num - 32)) & 1)) {
               *errmsg = _ ("ld operand error: Instruction Error exception");
           }
     }
  
       /* Ravi: operand validity checks for the ARC700 */
       if (cpu_type == ARC_MACH_ARC7 && arc_user_mode_only)
       /* if (arc_get_opcode_mach (arc_mach_type, 0) == ARC_MACH_ARC7) */
     {
       if (ac_reg_num == 29 || ac_reg_num == 30)
         {
           *errmsg = _("ld operand error: Privilege Violation exception");
         }
     }
  
       return insn;
     }
  
   /* do syntax check for ARCtangent-A4 'ld' insn */
   if (!(test == I (1)))
     {
       if ((ls_operand[LS_DEST] == OP_SHIMM || ls_operand[LS_BASE] == OP_SHIMM || ls_operand[LS_OFFSET] == OP_SHIMM)) {
           *errmsg = _ ("invalid load/shimm insn");
       }
     }
     if (!(LD_SYNTAX (OP_REG, OP_REG, OP_NONE) || LD_SYNTAX (OP_REG, OP_REG, OP_REG) || LD_SYNTAX (OP_REG, OP_REG, OP_SHIMM) || (LD_SYNTAX (OP_REG, OP_LIMM, OP_REG) && !(test == I (1))) || (LD_SYNTAX (OP_REG, OP_REG, OP_LIMM) && !(test == I (1))) || LD_SYNTAX (OP_REG, OP_SHIMM, OP_SHIMM) || (LD_SYNTAX (OP_REG, OP_LIMM, OP_NONE) && (test == I (1))))) {
         *errmsg = _ ("ld operand error");
     }
     if (addrwb_p) {
         if (ls_operand[LS_BASE] != OP_REG) {
             *errmsg = _ ("address writeback not allowed");
         }
         insn |= addrwb_p;
     }
   return insn;
 }

References _, addrwb_p, arc_ld_ext_mask, arc_mach_a4, ARC_MACH_ARC7, arc_user_mode_only, cpu_type, I, LD_SYNTAX, LS_BASE, LS_DEST, LS_OFFSET, ls_operand, OP_LIMM, OP_NONE, OP_REG, OP_SHIMM, and X.

◆ insert_limmfinish()

static arc_insn insert_limmfinish	(	arc_insn	insn,
		long *ex	ATTRIBUTE_UNUSED,
		const struct arc_operand *operand	ATTRIBUTE_UNUSED,
		int mods	ATTRIBUTE_UNUSED,
		const struct arc_operand_value *reg	ATTRIBUTE_UNUSED,
		long value	ATTRIBUTE_UNUSED,
		const char **errmsg	ATTRIBUTE_UNUSED
	)

static

Definition at line 1923 of file arc-opc.c.

 {
   return insn;
 }

◆ insert_null()

static arc_insn insert_null	(	arc_insn	insn,
		long *ex	ATTRIBUTE_UNUSED,
		const struct arc_operand *operand	ATTRIBUTE_UNUSED,
		int mods	ATTRIBUTE_UNUSED,
		const struct arc_operand_value *reg	ATTRIBUTE_UNUSED,
		long value	ATTRIBUTE_UNUSED,
		const char **errmsg	ATTRIBUTE_UNUSED
	)

static

Definition at line 1090 of file arc-opc.c.

 {
   return insn;
 }

◆ insert_nullify()

static arc_insn insert_nullify	(	arc_insn	insn,
		long *ex	ATTRIBUTE_UNUSED,
		const struct arc_operand *	operand,
		int mods	ATTRIBUTE_UNUSED,
		const struct arc_operand_value *reg	ATTRIBUTE_UNUSED,
		long	value,
		const char **errmsg	ATTRIBUTE_UNUSED
	)

static

Definition at line 1361 of file arc-opc.c.

 {
   nullify_p = 1;
   insn |= (value & ((1 << operand->bits) - 1)) << operand->shift;
   nullify = value;
   return insn;
 }

References nullify, nullify_p, and value.

◆ insert_offset()

static arc_insn insert_offset	(	arc_insn	insn,
		long *ex	ATTRIBUTE_UNUSED,
		const struct arc_operand *	operand,
		int	mods,
		const struct arc_operand_value *	reg,
		long	value,
		const char **	errmsg
	)

static

Definition at line 1505 of file arc-opc.c.

 {
   long minval, maxval;
  
   if (reg != NULL)
     {
       if (arc_mach_a4)
         {
       arc_insn myinsn
         = (insert_reg (0, ex, operand, mods, reg, value, errmsg)
            >> operand->shift);
  
       /* Not if store, catch it later.  */
       if (operand->flags & ARC_OPERAND_LOAD) {
           /* Not if opcode == 1, catch it later.  */
           if ((insn & I (-1)) != I (1)) {
               insn |= C (myinsn);
           }
       }
       } else {
           insn |= insert_reg (0, ex, operand, mods, reg, value, errmsg);
       }
       ls_operand[LS_OFFSET] = OP_REG;
     }
   else
     {
       int bits;
  
       if (operand->flags & ARC_OPERAND_2BYTE_ALIGNED) {
           bits = operand->bits + 1;
       } else if (operand->flags & ARC_OPERAND_4BYTE_ALIGNED) {
           bits = operand->bits + 2;
       } else {
           bits = operand->bits;
       }
  
       /* This is *way* more general than necessary, but maybe some day it'll
      be useful.  */
       if (operand->flags & ARC_OPERAND_SIGNED)
     {
       minval = -(1 << (bits - 1));
       maxval = (1 << (bits - 1)) - 1;
     }
       else
     {
       minval = 0;
       maxval = (1 << bits) - 1;
     }
       if (arc_mach_a4 && ((arc_cond_p && !limm_p) || value < minval || value > maxval))
     {
           if (limm_p && value != limm) {
               *errmsg = _ ("too many long constants");
           } else {
               limm_p = 1;
               limm = value;
               if (operand->flags & ARC_OPERAND_STORE) {
                   insn |= B (ARC_REG_LIMM);
               }
               if (operand->flags & ARC_OPERAND_LOAD) {
                   insn |= C (ARC_REG_LIMM);
               }
               ls_operand[LS_OFFSET] = OP_LIMM;
         }
     }
       else
     {
         if ((value < minval || value > maxval)) {
             *errmsg = _ ("need too many limms");
         } else if (arc_mach_a4 && shimm_p && value != shimm) {
             /* Check for bad operand combinations
          before we lose info about them.  */
             if ((insn & I (-1)) == I (1)) {
                 *errmsg = _ ("to many shimms in load");
                 goto out;
             }
             if (limm_p && operand->flags & ARC_OPERAND_LOAD) {
                 *errmsg = _ ("too many long constants");
                 goto out;
             }
             /* Convert what we thought was a shimm to a limm.  */
             limm_p = 1;
             limm = shimm;
             if (ls_operand[LS_VALUE] == OP_SHIMM && operand->flags & ARC_OPERAND_STORE) {
                 insn &= ~C (-1);
                 insn |= C (ARC_REG_LIMM);
                 ls_operand[LS_VALUE] = OP_LIMM;
             }
             if (ls_operand[LS_BASE] == OP_SHIMM && operand->flags & ARC_OPERAND_STORE) {
                 insn &= ~B (-1);
                 insn |= B (ARC_REG_LIMM);
                 ls_operand[LS_BASE] = OP_LIMM;
             }
         }
       if (!arc_mach_a4)
         {
           switch (operand->fmt)
         {
         case 'o':
           insn |= ((value & 0xff) << operand->shift);
           insn |= (((value & 0x100) >> 8) << 15);
           break;
         case 'k':
           insn |= ((value >> 1) & 0x1f) << operand->shift;
           break;
         case 'm':
           insn |= ((value >> 2) & 0xff) << operand->shift;
           break;
         case 'M':
           insn |= (value & 0x1ff) << operand->shift;
           break;
         case 'O':
           insn |= ((value >> 1) & 0x1ff) << operand->shift;
           break;
         case 'R':
           insn |= ((value >> 2) & 0x1ff) << operand->shift;
           break;
         }
         }
       shimm = value;
       shimm_p = 1;
       ls_operand[LS_OFFSET] = OP_SHIMM;
     }
     }
  out:
   return insn;
 }

References _, arc_cond_p, arc_mach_a4, ARC_OPERAND_2BYTE_ALIGNED, ARC_OPERAND_4BYTE_ALIGNED, ARC_OPERAND_LOAD, ARC_OPERAND_SIGNED, ARC_OPERAND_STORE, ARC_REG_LIMM, B, bits(), C, ex, I, insert_reg(), limm, limm_p, LS_BASE, LS_OFFSET, ls_operand, LS_VALUE, NULL, OP_LIMM, OP_REG, OP_SHIMM, out, reg, shimm, shimm_p, and value.

◆ insert_reg()

static arc_insn insert_reg	(	arc_insn	insn,
		long *ex	ATTRIBUTE_UNUSED,
		const struct arc_operand *	operand,
		int	mods,
		const struct arc_operand_value *	reg,
		long	value,
		const char **	errmsg
	)

static

Definition at line 1107 of file arc-opc.c.

 {
   static char buf[100];
   enum operand op_type = OP_NONE;
   if (!reg)
     {
       /* We have a constant that also requires a value stored in a register
      field.  Handle these by updating the register field and saving the
      value for later handling by either %S (shimm) or %L (limm).  */
  
       /* Try to use a shimm value before a limm one.  */
       if (arc_mach_a4 && ARC_SHIMM_CONST_P (value)
       /* If we've seen a conditional suffix we have to use a limm.  */
       && !arc_cond_p
       /* If we already have a shimm value that is different than ours
          we have to use a limm.  */
       && (!shimm_p || shimm == value))
     {
       int marker;
  
       op_type = OP_SHIMM;
       /* Forget about shimm as dest mlm.  */
  
       if ('a' != operand->fmt)
         {
           shimm_p = 1;
           shimm = value;
           flagshimm_handled_p = 1;
           marker = flag_p ? ARC_REG_SHIMM_UPDATE : ARC_REG_SHIMM;
         }
       else
         {
           /* Don't request flag setting on shimm as dest.  */
           marker = ARC_REG_SHIMM;
         }
       insn |= marker << operand->shift;
       /* insn |= value & 511; - done later.  */
     }
       else if ((mods & ARC_MOD_SDASYM) && !ac_add_reg_sdasym_insn (insn))
     {
       /* If it is an ld/ldw/st/stw insn without any .aa suffixes, then
          make it a scaled instruction, i.e. set .aa field to 3 */
       if (addrwb_p == 0)
         {
           /* Check for ld with .aa=0 */
           if ((insn & 0xf8000000) == 0x10000000)
         {
           /* if an ld/ldw insn */
           if ((((insn >> 7) & 3) == 0) ||
               (((insn >> 7) & 3) == 2)) {
               /* Set .aa to 3 */
               addrwb_p = 0x600;
           }
         }
           /* Check for st with .aa=0 */
           else if ((insn & 0xf8000001) == 0x18000000)
         {
           /* if an st/stw insn */
           if ((((insn >> 1) & 3) == 0) ||
               (((insn >> 1) & 3) == 2)) {
               /* Set .aa to 3 */
               addrwb_p = 0x18;
           }
         }
         } /* addrwb_p == 0 */
     }
       /* We have to use a limm.  If we've already seen one they must match.  */
       else if (!limm_p || limm == value)
     {
         if ('a' != operand->fmt)
           {
         op_type = OP_LIMM;
         limm_p = 1;
         limm = value;
         if (arc_mach_a4) {
             insn |= ARC_REG_LIMM << operand->shift;
         }
         /* The constant is stored later.  */
           }
         else
           {
               if (arc_mach_a4) {
                   insn |= ARC_REG_SHIMM << operand->shift;
               }
               /* insn |= value & 511; - done later.  */
           }
     }
       else{
     *errmsg = _("unable to fit different valued constants into instruction");
           }
     }
   else
     {
       /* We have to handle both normal and auxiliary registers.  */
  
       if ((reg->type == AUXREG) || (reg->type == AUXREG_AC))
     {
           if (!(mods & ARC_MOD_AUXREG)) {
               *errmsg = _ ("auxiliary register not allowed here");
           } else if (arc_mach_a4) {
               if ((insn & I (-1)) == I (2)) /* Check for use validity.  */
               {
                   if (reg->flags & ARC_REGISTER_READONLY) {
                       *errmsg = _ ("attempt to set readonly register");
                   }
               } else {
                   if (reg->flags & ARC_REGISTER_WRITEONLY) {
                       *errmsg = _ ("attempt to read writeonly register");
                   }
               }
               insn |= ARC_REG_SHIMM << operand->shift;
               insn |= reg->value << arc_operands[reg->type].shift;
         }
       else /* Insert auxiliary register value for ARCompact ISA.  */
         {
           /* TODO: Check for validity of using ARCompact auxiliary regs.  */
  
           //          insn |= reg->value << operand->shift;
           /* Replace this later with the corresponding function to do
          the insertion of signed 12 bit immediates .
          This is because the auxillary registers used as a mnemonic
          would be stored in this fashion.  */
  
           insn |= (((reg->value & 0x3f) << 6) | ((reg->value & 0xffffffc0) >> 6));
         }
     }
       else
     {
           /* Check for use validity.  */
           if (('a' == operand->fmt) || (arc_mach_a4 && ((insn & I(-1)) < I(2))) ||
               (!arc_mach_a4 && (('A' == operand->fmt)||('#' == operand->fmt))))
             {
           if (reg->flags & ARC_REGISTER_READONLY) {
               *errmsg = _ ("attempt to set readonly register");
           }
         }
           if ('a' != operand->fmt || (!arc_mach_a4 && ('A' != operand->fmt)))
             {
           if (reg->flags & ARC_REGISTER_WRITEONLY) {
               *errmsg = _ ("attempt to read writeonly register");
           }
         }
       /* We should never get an invalid register number here.  */
       if (arc_mach_a4 && ((unsigned int) reg->value > 60))
         {
           sprintf (buf, _("invalid register number `%d'"), reg->value);
           *errmsg = buf;
         }
       if (!arc_mach_a4 && ((unsigned int) reg->value > 63))
         {
           sprintf (buf, _("invalid register number `%d'"), reg->value);
           *errmsg = buf;
         }
           if (!arc_mach_a4 && (   ('B' == operand->fmt) || ('#' == operand->fmt)
                || ('g' == operand->fmt) || ('(' == operand->fmt)
                || ('{' == operand->fmt) || ('<' == operand->fmt)))
         {
           insn |= (reg->value & 0x7) << operand->shift;
           insn |= (reg->value >> 3) << ARC_SHIFT_REGB_HIGH_AC;
         }
           else if (!arc_mach_a4 && ('U' == operand->fmt))
             {
           insn |= (reg->value & 0x7) << operand->shift;
           insn |= reg->value >> 3;
  
           /* Ravi: Quoting from the ARC Programmer reference:
          The program counter (PCL) is not permitted to be the
          destination of an instruction.  A value of in 0x03 in the
          sub opcode field, i, and a value of 0x3F in destination
          register field, H, will raise an Instruction Error
          exception.
          This should solve the mov_s pcl, whatever bug.  */
           if ((insn & 0xFF) == 0xFF) {
               *errmsg = _ ("attempt to set readonly register");
           }
         } else {
             insn |= reg->value << operand->shift;
         }
         op_type = OP_REG;
     }
     }
  
   if (arc_mach_a4)
     {
       switch (operand->fmt)
         {
     case 'a':
       ls_operand[LS_DEST] = op_type;
       break;
     case 's':
       ls_operand[LS_BASE] = op_type;
       break;
     case 'c':
         if ((insn & I (-1)) == I (2)) {
             ls_operand[LS_VALUE] = op_type;
         } else {
             ls_operand[LS_OFFSET] = op_type;
         }
         break;
     case 'o': case 'O':
       ls_operand[LS_OFFSET] = op_type;
       break;
     }
     }
   else
     {
       switch (operand->fmt)
         {
         case 'a':
         case 'A':
         case '#':
         case '*':
           ls_operand[LS_DEST] = op_type;
           break;
         case 'C':
         case ')':
         case '}':
         case '>':
         if ((insn & I (-1)) == I (3)) {
             ls_operand[LS_VALUE] = op_type;
         } else {
             ls_operand[LS_OFFSET] = op_type;
         }
         break;
         }
     }
   return insn;
 }

References _, ac_add_reg_sdasym_insn(), addrwb_p, arc_cond_p, arc_mach_a4, ARC_MOD_AUXREG, ARC_MOD_SDASYM, arc_operands, ARC_REG_LIMM, ARC_REG_SHIMM, ARC_REG_SHIMM_UPDATE, ARC_REGISTER_READONLY, ARC_REGISTER_WRITEONLY, ARC_SHIFT_REGB_HIGH_AC, ARC_SHIMM_CONST_P, AUXREG, AUXREG_AC, flag_p, flagshimm_handled_p, I, if(), limm, limm_p, LS_BASE, LS_DEST, LS_OFFSET, ls_operand, LS_VALUE, OP_LIMM, OP_NONE, OP_REG, OP_SHIMM, reg, arc_operand::shift, shimm, shimm_p, sprintf, and value.

Referenced by insert_base(), and insert_offset().

◆ insert_reladdr()

static arc_insn insert_reladdr	(	arc_insn	insn,
		long *ex	ATTRIBUTE_UNUSED,
		const struct arc_operand *	operand,
		int mods	ATTRIBUTE_UNUSED,
		const struct arc_operand_value *reg	ATTRIBUTE_UNUSED,
		long	value,
		const char **	errmsg
	)

static

Definition at line 1979 of file arc-opc.c.

 {
   if (!arc_mach_a4 && ('h' == operand->fmt))
     {
       if (value & 3) {
           *errmsg = _ ("branch address not on 4 byte boundary");
       }
  
       value = value >> 2;
       /* Insert least significant 9-bits.  */
       insn |= (value & 0x1ff) << operand->shift;
       /* Insert most significant 10-bits.  */
       insn |= ((value >> 9) & 0x3ff) << 6;
     }
   else if (!arc_mach_a4 && ('H' == operand->fmt))
     {
         if (value & 3) {
             *errmsg = _ ("branch address not on 4 byte boundary");
         }
  
         value = value >> 2;
         /* Insert least significant 9-bits.  */
         insn |= (value & 0x1ff) << operand->shift;
         /* Insert next least significant 10-bits.  */
         insn |= ((value >> 9) & 0x3ff) << 6;
         /* Insert most significant 4-bits.  */
         insn |= (value >> 19) & 0xf;
     }
   else if (!arc_mach_a4 && ('i' == operand->fmt))
     {
         if (value & 1) {
             *errmsg = _ ("branch address not on 2 byte boundary");
         }
  
         value = value >> 1;
         /* Insert least significant 10-bits.  */
         insn |= (value & 0x3ff) << operand->shift;
         /* Insert most significant 10-bits.  */
         insn |= ((value >> 10) & 0x3ff) << 6;
     }
   else if (!arc_mach_a4 && ('I' == operand->fmt))
     {
         if (value & 1) {
             *errmsg = _ ("branch address not on 2 byte boundary");
         }
  
         value = value >> 1;
         /* Insert least significant 10-bits.  */
         insn |= (value & 0x3ff) << operand->shift;
         /* Insert next least significant 10-bits.  */
         insn |= ((value >> 10) & 0x3ff) << 6;
         /* Insert most significant 4-bits.  */
         insn |= (value >> 20) & 0xf;
     }
   else if (!arc_mach_a4 && ('d' == operand->fmt))
     {
       /* Insert least significant 7-bits.  */
       insn |= ((value >> 1) & 0x7f) << operand->shift;
       /* Insert most significant bit.  */
       insn |= (((value >> 1) & 0x80) >> 7) << 15;
     }
   else if (!arc_mach_a4 && ('y' == operand->fmt))
     {
       /* Insert most significant 6-bits of 7-bit unsigned immediate value.  */
       insn |= ((value >> 1) & 0x3f) << operand->shift;
     }
   else if (!arc_mach_a4 && ('Y' == operand->fmt))
     {
       /* Insert bit-1 to bit-6 of 13-bit signed immediate value.  */
       insn |= ((value >> 1) & 0x3f) << operand->shift;
       /* Insert bit-7 to bit-13 of 13-bit signed immediate value.  */
       insn |= ((value >> 1) & 0xfc0) >> 6;
     }
   else if (!arc_mach_a4 && (('s' == operand->fmt) || ('S' == operand->fmt)
             || ('Z' == operand->fmt)))
     {
         if (value & 1) {
             *errmsg = _ ("branch address not on 2 byte boundary");
         }
         insn |= ((value >> 1) & ((1 << operand->bits) - 1)) << operand->shift;
     }
   else if (!arc_mach_a4 && ('W' == operand->fmt))
     {
         if (value & 3) {
             *errmsg = _ ("branch address not on 4 byte boundary");
         }
         insn |= ((value >> 2) & ((1 << operand->bits) - 1)) << operand->shift;
     }
   else
     {
       /* for ARCtangent-A4 */
  
       if (value & 3) {
           *errmsg = _ ("branch address not on 4 byte boundary");
       }
       insn |= ((value >> 2) & ((1 << operand->bits) - 1)) << operand->shift;
     }
   return insn;
 }

References _, arc_mach_a4, and value.

◆ insert_s12()

static arc_insn insert_s12	(	arc_insn	insn,
		long *	ex,
		const struct arc_operand *operand	ATTRIBUTE_UNUSED,
		int mods	ATTRIBUTE_UNUSED,
		const struct arc_operand_value *reg	ATTRIBUTE_UNUSED,
		long value	ATTRIBUTE_UNUSED,
		const char **errmsg	ATTRIBUTE_UNUSED
	)

static

Definition at line 937 of file arc-opc.c.

 {
  
   long msb6;
   long lsb6;
  
   msb6 = (value >> 6) & 0x3ff;
   lsb6 = (value & 0x3f) << 6 ;
  
   insn |= lsb6;
   if (ex) {
       *ex |= msb6;
   }
   return insn;
 }

References ex, and value.

◆ insert_s15()

static arc_insn insert_s15	(	arc_insn	insn,
		long *	ex,
		const struct arc_operand *operand	ATTRIBUTE_UNUSED,
		int mods	ATTRIBUTE_UNUSED,
		const struct arc_operand_value *reg	ATTRIBUTE_UNUSED,
		long value	ATTRIBUTE_UNUSED,
		const char **errmsg	ATTRIBUTE_UNUSED
	)

static

Definition at line 1064 of file arc-opc.c.

 {
  
     if (ex) {
         *ex |= (value & 0x7fff);
     }
     return insn;
 }

References ex, and value.

◆ insert_shimmfinish()

static arc_insn insert_shimmfinish	(	arc_insn	insn,
		long *ex	ATTRIBUTE_UNUSED,
		const struct arc_operand *	operand,
		int mods	ATTRIBUTE_UNUSED,
		const struct arc_operand_value *reg	ATTRIBUTE_UNUSED,
		long value	ATTRIBUTE_UNUSED,
		const char **errmsg	ATTRIBUTE_UNUSED
	)

static

Definition at line 1897 of file arc-opc.c.

 {
     if (shimm_p) {
         insn |= (shimm & ((1 << operand->bits) - 1)) << operand->shift;
     }
     return insn;
 }

References shimm, and shimm_p.

◆ insert_st_syntax()

static arc_insn insert_st_syntax	(	arc_insn	insn,
		long *ex	ATTRIBUTE_UNUSED,
		const struct arc_operand *operand	ATTRIBUTE_UNUSED,
		int mods	ATTRIBUTE_UNUSED,
		const struct arc_operand_value *reg	ATTRIBUTE_UNUSED,
		long value	ATTRIBUTE_UNUSED,
		const char **	errmsg
	)

static

Definition at line 1678 of file arc-opc.c.

 {
   /* do syntax check for ARCompact 'st' insn */
   if (!arc_mach_a4)
     {
       /* TODO - check for validity of operands for ARCompact store insn */
  
       if (addrwb_p)
         {
           if (ls_operand[LS_BASE] != OP_REG) {
               *errmsg = _ ("address writeback not allowed");
           }
           insn |= addrwb_p;
         }
       return insn;
     }
  
   /* Do syntax check for ARCtangent-A4 'st' insn.  */
   if (ST_SYNTAX (OP_SHIMM, OP_REG, OP_NONE) && shimm != 0)
     {
       /* Change an illegal insn into a legal one, it's easier to
      do it here than to try to handle it during operand scan.  */
       limm_p = 1;
       limm = shimm;
       shimm_p = 0;
       shimm = 0;
       insn= insn & ~(C(-1) | 511);
       insn |= ARC_REG_LIMM << ARC_SHIFT_REGC;
       ls_operand[LS_VALUE] = OP_LIMM;
     }
  
   if (ST_SYNTAX (OP_REG, OP_SHIMM, OP_NONE)
       || ST_SYNTAX (OP_LIMM, OP_SHIMM, OP_NONE))
     {
       /* Try to salvage this syntax.  */
       if (shimm & 0x1) /* Odd shimms won't work.  */
     {
           if (limm_p) { /* Do we have a limm already?  */
               *errmsg = _ ("impossible store");
           }
           limm_p = 1;
           limm = shimm;
           shimm = 0;
           shimm_p = 0;
           insn = insn & ~(B (-1) | 511);
           insn |= B (ARC_REG_LIMM);
           ls_operand[LS_BASE] = OP_LIMM;
     }
       else
     {
       shimm >>= 1;
       insn = insn & ~511;
       insn |= shimm;
       ls_operand[LS_OFFSET] = OP_SHIMM;
     }
     }
     if (ST_SYNTAX (OP_SHIMM, OP_LIMM, OP_NONE)) {
         limm += arc_limm_fixup_adjust (insn);
     }
     if (ST_SYNTAX (OP_LIMM, OP_SHIMM, OP_SHIMM) && (shimm * 2 == limm)) {
         insn &= ~C (-1);
         limm_p = 0;
         limm = 0;
         insn |= C (ARC_REG_SHIMM);
         ls_operand[LS_VALUE] = OP_SHIMM;
     }
     if (!(ST_SYNTAX (OP_REG, OP_REG, OP_NONE) || ST_SYNTAX (OP_REG, OP_LIMM, OP_NONE) || ST_SYNTAX (OP_REG, OP_REG, OP_SHIMM) || ST_SYNTAX (OP_REG, OP_SHIMM, OP_SHIMM) || (ST_SYNTAX (OP_SHIMM, OP_SHIMM, OP_NONE) && (shimm == 0)) || ST_SYNTAX (OP_SHIMM, OP_LIMM, OP_NONE) || ST_SYNTAX (OP_SHIMM, OP_REG, OP_NONE) || ST_SYNTAX (OP_SHIMM, OP_REG, OP_SHIMM) || ST_SYNTAX (OP_SHIMM, OP_SHIMM, OP_SHIMM) || ST_SYNTAX (OP_LIMM, OP_SHIMM, OP_SHIMM) || ST_SYNTAX (OP_LIMM, OP_REG, OP_NONE) || ST_SYNTAX (OP_LIMM, OP_REG, OP_SHIMM))) {
         *errmsg = _ ("st operand error");
     }
     if (addrwb_p) {
         if (ls_operand[LS_BASE] != OP_REG) {
             *errmsg = _ ("address writeback not allowed");
         }
         insn |= addrwb_p;
     }
     if (ST_SYNTAX (OP_SHIMM, OP_REG, OP_NONE) && shimm) {
         *errmsg = _ ("store value must be zero");
     }
     return insn;
 }

References _, addrwb_p, arc_limm_fixup_adjust(), arc_mach_a4, ARC_REG_LIMM, ARC_REG_SHIMM, ARC_SHIFT_REGC, B, C, limm, limm_p, LS_BASE, LS_OFFSET, ls_operand, LS_VALUE, OP_LIMM, OP_NONE, OP_REG, OP_SHIMM, shimm, shimm_p, and ST_SYNTAX.

◆ insert_u16()

static arc_insn insert_u16	(	arc_insn	insn,
		long *	ex,
		const struct arc_operand *operand	ATTRIBUTE_UNUSED,
		int mods	ATTRIBUTE_UNUSED,
		const struct arc_operand_value *reg	ATTRIBUTE_UNUSED,
		long value	ATTRIBUTE_UNUSED,
		const char **errmsg	ATTRIBUTE_UNUSED
	)

static

Definition at line 970 of file arc-opc.c.

 {
  
   long msb6;
   long lsb6;
  
   msb6 = (value >> 6) & 0x3ff;
   lsb6 = (value & 0x3f) << 6 ;
  
   insn |= lsb6;
   if (ex) {
       *ex |= msb6;
   }
   return insn;
 }

References ex, and value.

◆ insert_u8()

static arc_insn insert_u8	(	arc_insn	insn,
		long *insn2	ATTRIBUTE_UNUSED,
		const struct arc_operand *	operand,
		int mods	ATTRIBUTE_UNUSED,
		const struct arc_operand_value *reg	ATTRIBUTE_UNUSED,
		long value	ATTRIBUTE_UNUSED,
		const char **errmsg	ATTRIBUTE_UNUSED
	)

static

Definition at line 904 of file arc-opc.c.

 {
  
   long msb2;
   long lsb6;
  
   msb2 = value >> 6;
   msb2 = msb2  << 15;
  
   lsb6 = value & 0x3f ;
  
   insn |= msb2;
   insn |= (lsb6 << operand->shift);
   return insn;
 }

References value.

◆ insert_ul16()

static arc_insn insert_ul16	(	arc_insn	insn,
		long *	ex,
		const struct arc_operand *operand	ATTRIBUTE_UNUSED,
		int mods	ATTRIBUTE_UNUSED,
		const struct arc_operand_value *reg	ATTRIBUTE_UNUSED,
		long value	ATTRIBUTE_UNUSED,
		const char **errmsg	ATTRIBUTE_UNUSED
	)

static

Definition at line 1033 of file arc-opc.c.

 {
  
   long msb2;
   long lsb6;
  
   msb2 = (value >> 6) & 0x3;
   lsb6 = (value & 0x3f) << 6 ;
  
   insn |= lsb6;
   if (ex) {
       *ex |= msb2;
   }
   return insn;
 }

References ex, and value.

◆ insert_unopmacro()

static arc_insn insert_unopmacro	(	arc_insn	insn,
		long *ex	ATTRIBUTE_UNUSED,
		const struct arc_operand *	operand,
		int mods	ATTRIBUTE_UNUSED,
		const struct arc_operand_value *reg	ATTRIBUTE_UNUSED,
		long value	ATTRIBUTE_UNUSED,
		const char **errmsg	ATTRIBUTE_UNUSED
	)

static

Definition at line 1965 of file arc-opc.c.

 {
   insn |= ((insn >> ARC_SHIFT_REGB) & ARC_MASK_REG) << operand->shift;
   return insn;
 }

References ARC_MASK_REG, and ARC_SHIFT_REGB.

◆ insert_uu16()

static arc_insn insert_uu16	(	arc_insn	insn,
		long *	ex,
		const struct arc_operand *operand	ATTRIBUTE_UNUSED,
		int mods	ATTRIBUTE_UNUSED,
		const struct arc_operand_value *reg	ATTRIBUTE_UNUSED,
		long value	ATTRIBUTE_UNUSED,
		const char **errmsg	ATTRIBUTE_UNUSED
	)

static

Definition at line 1003 of file arc-opc.c.

 {
  
   long msb8;
  
   msb8 = (value & 0xff) << 2;
   if (ex) {
       *ex |= msb8;
   }
   return insn;
 }

References ex, and value.

◆ lookup_register()

static const struct arc_operand_value* lookup_register	(	int	type,
		long	regno
	)

static

Definition at line 2137 of file arc-opc.c.

 {
   const struct arc_operand_value *r,*end;
   struct arc_ext_operand_value *ext_oper = arc_ext_operands;
  
   while (ext_oper)
     {
       if (ext_oper->operand.type == type && ext_oper->operand.value == regno) {
           return (&ext_oper->operand);
       }
       ext_oper = ext_oper->next;
     }
  
     if (type == REG || type == REG_AC) {
         return &arc_reg_names[regno];
     }
  
     /* ??? This is a little slow and can be speeded up.  */
     for (r = arc_reg_names, end = arc_reg_names + arc_reg_names_count;
         r < end; ++r) {
         if (type == r->type && regno == r->value) {
             return r;
         }
     }
     return 0;
 }