Rizin
unix-like reverse engineering framework and cli tools
armass64_const.h
Go to the documentation of this file.
1
// SPDX-FileCopyrightText: 2016 pancake <pancake@nopcode.org>
2
// SPDX-License-Identifier: LGPL-3.0-only
3
4
struct
{
5
const
char
*
name
;
6
ut16
val
;
7
}
msr_const
[] = {
8
{
"MDCCSR_EL0"
, 0x9808 },
9
{
"DBGDTRRX_EL0"
, 0x9828 },
10
{
"MDRAR_EL1"
, 0x8080 },
11
{
"OSLSR_EL1"
, 0x808c },
12
{
"DBGAUTHSTATUS_EL1"
, 0x83f6 },
13
{
"PMCEID0_EL0"
, 0xdce6 },
14
{
"PMCEID1_EL0"
, 0xdce7 },
15
{
"MIDR_EL1"
, 0xc000 },
16
{
"CCSIDR_EL1"
, 0xc800 },
17
{
"CLIDR_EL1"
, 0xc801 },
18
{
"CTR_EL0"
, 0xd801 },
19
{
"MPIDR_EL1"
, 0xc005 },
20
{
"REVIDR_EL1"
, 0xc006 },
21
{
"AIDR_EL1"
, 0xc807 },
22
{
"DCZID_EL0"
, 0xd807 },
23
{
"ID_PFR0_EL1"
, 0xc008 },
24
{
"ID_PFR1_EL1"
, 0xc009 },
25
{
"ID_DFR0_EL1"
, 0xc00a },
26
{
"ID_AFR0_EL1"
, 0xc00b },
27
{
"ID_MMFR0_EL1"
, 0xc00c },
28
{
"ID_MMFR1_EL1"
, 0xc00d },
29
{
"ID_MMFR2_EL1"
, 0xc00e },
30
{
"ID_MMFR3_EL1"
, 0xc00f },
31
{
"ID_ISAR0_EL1"
, 0xc010 },
32
{
"ID_ISAR1_EL1"
, 0xc011 },
33
{
"ID_ISAR2_EL1"
, 0xc012 },
34
{
"ID_ISAR3_EL1"
, 0xc013 },
35
{
"ID_ISAR4_EL1"
, 0xc014 },
36
{
"ID_ISAR5_EL1"
, 0xc015 },
37
{
"ID_A64PFR0_EL1"
, 0xc020 },
38
{
"ID_A64PFR1_EL1"
, 0xc021 },
39
{
"ID_A64DFR0_EL1"
, 0xc028 },
40
{
"ID_A64DFR1_EL1"
, 0xc029 },
41
{
"ID_A64AFR0_EL1"
, 0xc02c },
42
{
"ID_A64AFR1_EL1"
, 0xc02d },
43
{
"ID_A64ISAR0_EL1"
, 0xc030 },
44
{
"ID_A64ISAR1_EL1"
, 0xc031 },
45
{
"ID_A64MMFR0_EL1"
, 0xc038 },
46
{
"ID_A64MMFR1_EL1"
, 0xc039 },
47
{
"ID_A64MMFR2_EL1"
, 0xc03a },
48
{
"MVFR0_EL1"
, 0xc018 },
49
{
"MVFR1_EL1"
, 0xc019 },
50
{
"MVFR2_EL1"
, 0xc01a },
51
{
"RVBAR_EL1"
, 0xc601 },
52
{
"RVBAR_EL2"
, 0xe601 },
53
{
"RVBAR_EL3"
, 0xf601 },
54
{
"ISR_EL1"
, 0xc608 },
55
{
"CNTPCT_EL0"
, 0xdf01 },
56
{
"CNTVCT_EL0"
, 0xdf02 },
57
{
"ID_MMFR4_EL1"
, 0xc016 },
58
{
"TRCSTATR"
, 0x8818 },
59
{
"TRCIDR8"
, 0x8806 },
60
{
"TRCIDR9"
, 0x880e },
61
{
"TRCIDR10"
, 0x8816 },
62
{
"TRCIDR11"
, 0x881e },
63
{
"TRCIDR12"
, 0x8826 },
64
{
"TRCIDR13"
, 0x882e },
65
{
"TRCIDR0"
, 0x8847 },
66
{
"TRCIDR1"
, 0x884f },
67
{
"TRCIDR2"
, 0x8857 },
68
{
"TRCIDR3"
, 0x885f },
69
{
"TRCIDR4"
, 0x8867 },
70
{
"TRCIDR5"
, 0x886f },
71
{
"TRCIDR6"
, 0x8877 },
72
{
"TRCIDR7"
, 0x887f },
73
{
"TRCOSLSR"
, 0x888c },
74
{
"TRCPDSR"
, 0x88ac },
75
{
"TRCDEVAFF0"
, 0x8bd6 },
76
{
"TRCDEVAFF1"
, 0x8bde },
77
{
"TRCLSR"
, 0x8bee },
78
{
"TRCAUTHSTATUS"
, 0x8bf6 },
79
{
"TRCDEVARCH"
, 0x8bfe },
80
{
"TRCDEVID"
, 0x8b97 },
81
{
"TRCDEVTYPE"
, 0x8b9f },
82
{
"TRCPIDR4"
, 0x8ba7 },
83
{
"TRCPIDR5"
, 0x8baf },
84
{
"TRCPIDR6"
, 0x8bb7 },
85
{
"TRCPIDR7"
, 0x8bbf },
86
{
"TRCPIDR0"
, 0x8bc7 },
87
{
"TRCPIDR1"
, 0x8bcf },
88
{
"TRCPIDR2"
, 0x8bd7 },
89
{
"TRCPIDR3"
, 0x8bdf },
90
{
"TRCCIDR0"
, 0x8be7 },
91
{
"TRCCIDR1"
, 0x8bef },
92
{
"TRCCIDR2"
, 0x8bf7 },
93
{
"TRCCIDR3"
, 0x8bff },
94
{
"ICC_IAR1_EL1"
, 0xc660 },
95
{
"ICC_IAR0_EL1"
, 0xc640 },
96
{
"ICC_HPPIR1_EL1"
, 0xc662 },
97
{
"ICC_HPPIR0_EL1"
, 0xc642 },
98
{
"ICC_RPR_EL1"
, 0xc65b },
99
{
"ICH_VTR_EL2"
, 0xe659 },
100
{
"ICH_EISR_EL2"
, 0xe65b },
101
{
"ICH_EISR_EL2"
, 0xe65b },
102
{
"DBGDTRTX_EL0"
, 0x9828 },
103
{
"OSLAR_EL1"
, 0x8084 },
104
{
"PMSWINC_EL0"
, 0xdce4 },
105
{
"TRCOSLAR"
, 0x8884 },
106
{
"TRCLAR"
, 0x8be6 },
107
{
"ICC_EOIR1_EL1"
, 0xc661 },
108
{
"ICC_EOIR0_EL1"
, 0xc641 },
109
{
"ICC_DIR_EL1"
, 0xc659 },
110
{
"ICC_SGI1R_EL1"
, 0xc65d },
111
{
"ICC_ASGI1R_EL1"
, 0xc65e },
112
{
"ICC_ASGI1R_EL1"
, 0xc65e },
113
{
"OSDTRRX_EL1"
, 0x8002 },
114
{
"OSDTRTX_EL1"
, 0x801a },
115
{
"TEECR32_EL1"
, 0x9000 },
116
{
"MDCCINT_EL1"
, 0x8010 },
117
{
"MDSCR_EL1"
, 0x8012 },
118
{
"DBGDTR_EL0"
, 0x9820 },
119
{
"OSECCR_EL1"
, 0x8032 },
120
{
"DBGVCR32_EL2"
, 0xa038 },
121
{
"DBGBVR0_EL1"
, 0x8004 },
122
{
"DBGBVR1_EL1"
, 0x800c },
123
{
"DBGBVR2_EL1"
, 0x8014 },
124
{
"DBGBVR3_EL1"
, 0x801c },
125
{
"DBGBVR4_EL1"
, 0x8024 },
126
{
"DBGBVR5_EL1"
, 0x802c },
127
{
"DBGBVR6_EL1"
, 0x8034 },
128
{
"DBGBVR7_EL1"
, 0x803c },
129
{
"DBGBVR8_EL1"
, 0x8044 },
130
{
"DBGBVR9_EL1"
, 0x804c },
131
{
"DBGBVR10_EL1"
, 0x8054 },
132
{
"DBGBVR11_EL1"
, 0x805c },
133
{
"DBGBVR12_EL1"
, 0x8064 },
134
{
"DBGBVR13_EL1"
, 0x806c },
135
{
"DBGBVR14_EL1"
, 0x8074 },
136
{
"DBGBVR15_EL1"
, 0x807c },
137
{
"DBGBCR0_EL1"
, 0x8005 },
138
{
"DBGBCR1_EL1"
, 0x800d },
139
{
"DBGBCR2_EL1"
, 0x8015 },
140
{
"DBGBCR3_EL1"
, 0x801d },
141
{
"DBGBCR4_EL1"
, 0x8025 },
142
{
"DBGBCR5_EL1"
, 0x802d },
143
{
"DBGBCR6_EL1"
, 0x8035 },
144
{
"DBGBCR7_EL1"
, 0x803d },
145
{
"DBGBCR8_EL1"
, 0x8045 },
146
{
"DBGBCR9_EL1"
, 0x804d },
147
{
"DBGBCR10_EL1"
, 0x8055 },
148
{
"DBGBCR11_EL1"
, 0x805d },
149
{
"DBGBCR12_EL1"
, 0x8065 },
150
{
"DBGBCR13_EL1"
, 0x806d },
151
{
"DBGBCR14_EL1"
, 0x8075 },
152
{
"DBGBCR15_EL1"
, 0x807d },
153
{
"DBGWVR0_EL1"
, 0x8006 },
154
{
"DBGWVR1_EL1"
, 0x800e },
155
{
"DBGWVR2_EL1"
, 0x8016 },
156
{
"DBGWVR3_EL1"
, 0x801e },
157
{
"DBGWVR4_EL1"
, 0x8026 },
158
{
"DBGWVR5_EL1"
, 0x802e },
159
{
"DBGWVR6_EL1"
, 0x8036 },
160
{
"DBGWVR7_EL1"
, 0x803e },
161
{
"DBGWVR8_EL1"
, 0x8046 },
162
{
"DBGWVR9_EL1"
, 0x804e },
163
{
"DBGWVR10_EL1"
, 0x8056 },
164
{
"DBGWVR11_EL1"
, 0x805e },
165
{
"DBGWVR12_EL1"
, 0x8066 },
166
{
"DBGWVR13_EL1"
, 0x806e },
167
{
"DBGWVR14_EL1"
, 0x8076 },
168
{
"DBGWVR15_EL1"
, 0x807e },
169
{
"DBGWCR0_EL1"
, 0x8007 },
170
{
"DBGWCR1_EL1"
, 0x800f },
171
{
"DBGWCR2_EL1"
, 0x8017 },
172
{
"DBGWCR3_EL1"
, 0x801f },
173
{
"DBGWCR4_EL1"
, 0x8027 },
174
{
"DBGWCR5_EL1"
, 0x802f },
175
{
"DBGWCR6_EL1"
, 0x8037 },
176
{
"DBGWCR7_EL1"
, 0x803f },
177
{
"DBGWCR8_EL1"
, 0x8047 },
178
{
"DBGWCR9_EL1"
, 0x804f },
179
{
"DBGWCR10_EL1"
, 0x8057 },
180
{
"DBGWCR11_EL1"
, 0x805f },
181
{
"DBGWCR12_EL1"
, 0x8067 },
182
{
"DBGWCR13_EL1"
, 0x806f },
183
{
"DBGWCR14_EL1"
, 0x8077 },
184
{
"DBGWCR15_EL1"
, 0x807f },
185
{
"TEEHBR32_EL1"
, 0x9080 },
186
{
"OSDLR_EL1"
, 0x809c },
187
{
"DBGPRCR_EL1"
, 0x80a4 },
188
{
"DBGCLAIMSET_EL1"
, 0x83c6 },
189
{
"DBGCLAIMCLR_EL1"
, 0x83ce },
190
{
"CSSELR_EL1"
, 0xd000 },
191
{
"VPIDR_EL2"
, 0xe000 },
192
{
"VMPIDR_EL2"
, 0xe005 },
193
{
"CPACR_EL1"
, 0xc082 },
194
{
"SCTLR_EL1"
, 0xc080 },
195
{
"SCTLR_EL2"
, 0xe080 },
196
{
"SCTLR_EL3"
, 0xf080 },
197
{
"ACTLR_EL1"
, 0xc081 },
198
{
"ACTLR_EL2"
, 0xe081 },
199
{
"ACTLR_EL3"
, 0xf081 },
200
{
"HCR_EL2"
, 0xe088 },
201
{
"SCR_EL3"
, 0xf088 },
202
{
"MDCR_EL2"
, 0xe089 },
203
{
"SDER32_EL3"
, 0xf089 },
204
{
"CPTR_EL2"
, 0xe08a },
205
{
"CPTR_EL3"
, 0xf08a },
206
{
"HSTR_EL2"
, 0xe08b },
207
{
"HACR_EL2"
, 0xe08f },
208
{
"MDCR_EL3"
, 0xf099 },
209
{
"TTBR0_EL1"
, 0xc100 },
210
{
"TTBR0_EL2"
, 0xe100 },
211
{
"TTBR0_EL3"
, 0xf100 },
212
{
"TTBR1_EL1"
, 0xc101 },
213
{
"TCR_EL1"
, 0xc102 },
214
{
"TCR_EL2"
, 0xe102 },
215
{
"TCR_EL3"
, 0xf102 },
216
{
"VTTBR_EL2"
, 0xe108 },
217
{
"VTCR_EL2"
, 0xe10a },
218
{
"DACR32_EL2"
, 0xe180 },
219
{
"SPSR_EL1"
, 0xc200 },
220
{
"SPSR_EL2"
, 0xe200 },
221
{
"SPSR_EL3"
, 0xf200 },
222
{
"ELR_EL1"
, 0xc201 },
223
{
"ELR_EL2"
, 0xe201 },
224
{
"ELR_EL3"
, 0xf201 },
225
{
"SP_EL0"
, 0xc208 },
226
{
"SP_EL1"
, 0xe208 },
227
{
"SP_EL2"
, 0xf208 },
228
{
"SPSel"
, 0xc210 },
229
{
"NZCV"
, 0xda10 },
230
{
"DAIF"
, 0xda11 },
231
{
"DAIFSet"
, 0x36 },
232
{
"DAIFClr"
, 0x37 },
233
{
"CurrentEL"
, 0xc212 },
234
{
"SPSR_irq"
, 0xe218 },
235
{
"SPSR_abt"
, 0xe219 },
236
{
"SPSR_und"
, 0xe21a },
237
{
"SPSR_fiq"
, 0xe21b },
238
{
"FPCR"
, 0xda20 },
239
{
"FPSR"
, 0xda21 },
240
{
"DSPSR_EL0"
, 0xda28 },
241
{
"DLR_EL0"
, 0xda29 },
242
{
"IFSR32_EL2"
, 0xe281 },
243
{
"AFSR0_EL1"
, 0xc288 },
244
{
"AFSR0_EL2"
, 0xe288 },
245
{
"AFSR0_EL3"
, 0xf288 },
246
{
"AFSR1_EL1"
, 0xc289 },
247
{
"AFSR1_EL2"
, 0xe289 },
248
{
"AFSR1_EL3"
, 0xf289 },
249
{
"ESR_EL1"
, 0xc290 },
250
{
"ESR_EL2"
, 0xe290 },
251
{
"ESR_EL3"
, 0xf290 },
252
{
"FPEXC32_EL2"
, 0xe298 },
253
{
"FAR_EL1"
, 0xc300 },
254
{
"FAR_EL2"
, 0xe300 },
255
{
"FAR_EL3"
, 0xf300 },
256
{
"HPFAR_EL2"
, 0xe304 },
257
{
"PAR_EL1"
, 0xc3a0 },
258
{
"PMCR_EL0"
, 0xdce0 },
259
{
"PMCNTENSET_EL0"
, 0xdce1 },
260
{
"PMCNTENCLR_EL0"
, 0xdce2 },
261
{
"PMOVSCLR_EL0"
, 0xdce3 },
262
{
"PMSELR_EL0"
, 0xdce5 },
263
{
"PMCCNTR_EL0"
, 0xdce8 },
264
{
"PMXEVTYPER_EL0"
, 0xdce9 },
265
{
"PMXEVCNTR_EL0"
, 0xdcea },
266
{
"PMUSERENR_EL0"
, 0xdcf0 },
267
{
"PMINTENSET_EL1"
, 0xc4f1 },
268
{
"PMINTENCLR_EL1"
, 0xc4f2 },
269
{
"PMOVSSET_EL0"
, 0xdcf3 },
270
{
"MAIR_EL1"
, 0xc510 },
271
{
"MAIR_EL2"
, 0xe510 },
272
{
"MAIR_EL3"
, 0xf510 },
273
{
"AMAIR_EL1"
, 0xc518 },
274
{
"AMAIR_EL2"
, 0xe518 },
275
{
"AMAIR_EL3"
, 0xf518 },
276
{
"VBAR_EL1"
, 0xc600 },
277
{
"VBAR_EL2"
, 0xe600 },
278
{
"VBAR_EL3"
, 0xf600 },
279
{
"RMR_EL1"
, 0xc602 },
280
{
"RMR_EL2"
, 0xe602 },
281
{
"RMR_EL3"
, 0xf602 },
282
{
"CONTEXTIDR_EL1"
, 0xc681 },
283
{
"TPIDR_EL0"
, 0xde82 },
284
{
"TPIDR_EL2"
, 0xe682 },
285
{
"TPIDR_EL3"
, 0xf682 },
286
{
"TPIDRRO_EL0"
, 0xde83 },
287
{
"TPIDR_EL1"
, 0xc684 },
288
{
"CNTFRQ_EL0"
, 0xdf00 },
289
{
"CNTVOFF_EL2"
, 0xe703 },
290
{
"CNTKCTL_EL1"
, 0xc708 },
291
{
"CNTHCTL_EL2"
, 0xe708 },
292
{
"CNTP_TVAL_EL0"
, 0xdf10 },
293
{
"CNTHP_TVAL_EL2"
, 0xe710 },
294
{
"CNTPS_TVAL_EL1"
, 0xff10 },
295
{
"CNTP_CTL_EL0"
, 0xdf11 },
296
{
"CNTHP_CTL_EL2"
, 0xe711 },
297
{
"CNTPS_CTL_EL1"
, 0xff11 },
298
{
"CNTP_CVAL_EL0"
, 0xdf12 },
299
{
"CNTHP_CVAL_EL2"
, 0xe712 },
300
{
"CNTPS_CVAL_EL1"
, 0xff12 },
301
{
"CNTV_TVAL_EL0"
, 0xdf18 },
302
{
"CNTV_CTL_EL0"
, 0xdf19 },
303
{
"CNTV_CVAL_EL0"
, 0xdf1a },
304
{
"PMEVCNTR0_EL0"
, 0xdf40 },
305
{
"PMEVCNTR1_EL0"
, 0xdf41 },
306
{
"PMEVCNTR2_EL0"
, 0xdf42 },
307
{
"PMEVCNTR3_EL0"
, 0xdf43 },
308
{
"PMEVCNTR4_EL0"
, 0xdf44 },
309
{
"PMEVCNTR5_EL0"
, 0xdf45 },
310
{
"PMEVCNTR6_EL0"
, 0xdf46 },
311
{
"PMEVCNTR7_EL0"
, 0xdf47 },
312
{
"PMEVCNTR8_EL0"
, 0xdf48 },
313
{
"PMEVCNTR9_EL0"
, 0xdf49 },
314
{
"PMEVCNTR10_EL0"
, 0xdf4a },
315
{
"PMEVCNTR11_EL0"
, 0xdf4b },
316
{
"PMEVCNTR12_EL0"
, 0xdf4c },
317
{
"PMEVCNTR13_EL0"
, 0xdf4d },
318
{
"PMEVCNTR14_EL0"
, 0xdf4e },
319
{
"PMEVCNTR15_EL0"
, 0xdf4f },
320
{
"PMEVCNTR16_EL0"
, 0xdf50 },
321
{
"PMEVCNTR17_EL0"
, 0xdf51 },
322
{
"PMEVCNTR18_EL0"
, 0xdf52 },
323
{
"PMEVCNTR19_EL0"
, 0xdf53 },
324
{
"PMEVCNTR20_EL0"
, 0xdf54 },
325
{
"PMEVCNTR21_EL0"
, 0xdf55 },
326
{
"PMEVCNTR22_EL0"
, 0xdf56 },
327
{
"PMEVCNTR23_EL0"
, 0xdf57 },
328
{
"PMEVCNTR24_EL0"
, 0xdf58 },
329
{
"PMEVCNTR25_EL0"
, 0xdf59 },
330
{
"PMEVCNTR26_EL0"
, 0xdf5a },
331
{
"PMEVCNTR27_EL0"
, 0xdf5b },
332
{
"PMEVCNTR28_EL0"
, 0xdf5c },
333
{
"PMEVCNTR29_EL0"
, 0xdf5d },
334
{
"PMEVCNTR30_EL0"
, 0xdf5e },
335
{
"PMCCFILTR_EL0"
, 0xdf7f },
336
{
"PMEVTYPER0_EL0"
, 0xdf60 },
337
{
"PMEVTYPER1_EL0"
, 0xdf61 },
338
{
"PMEVTYPER2_EL0"
, 0xdf62 },
339
{
"PMEVTYPER3_EL0"
, 0xdf63 },
340
{
"PMEVTYPER4_EL0"
, 0xdf64 },
341
{
"PMEVTYPER5_EL0"
, 0xdf65 },
342
{
"PMEVTYPER6_EL0"
, 0xdf66 },
343
{
"PMEVTYPER7_EL0"
, 0xdf67 },
344
{
"PMEVTYPER8_EL0"
, 0xdf68 },
345
{
"PMEVTYPER9_EL0"
, 0xdf69 },
346
{
"PMEVTYPER10_EL0"
, 0xdf6a },
347
{
"PMEVTYPER11_EL0"
, 0xdf6b },
348
{
"PMEVTYPER12_EL0"
, 0xdf6c },
349
{
"PMEVTYPER13_EL0"
, 0xdf6d },
350
{
"PMEVTYPER14_EL0"
, 0xdf6e },
351
{
"PMEVTYPER15_EL0"
, 0xdf6f },
352
{
"PMEVTYPER16_EL0"
, 0xdf70 },
353
{
"PMEVTYPER17_EL0"
, 0xdf71 },
354
{
"PMEVTYPER18_EL0"
, 0xdf72 },
355
{
"PMEVTYPER19_EL0"
, 0xdf73 },
356
{
"PMEVTYPER20_EL0"
, 0xdf74 },
357
{
"PMEVTYPER21_EL0"
, 0xdf75 },
358
{
"PMEVTYPER22_EL0"
, 0xdf76 },
359
{
"PMEVTYPER23_EL0"
, 0xdf77 },
360
{
"PMEVTYPER24_EL0"
, 0xdf78 },
361
{
"PMEVTYPER25_EL0"
, 0xdf79 },
362
{
"PMEVTYPER26_EL0"
, 0xdf7a },
363
{
"PMEVTYPER27_EL0"
, 0xdf7b },
364
{
"PMEVTYPER28_EL0"
, 0xdf7c },
365
{
"PMEVTYPER29_EL0"
, 0xdf7d },
366
{
"PMEVTYPER30_EL0"
, 0xdf7e },
367
{
"TRCPRGCTLR"
, 0x8808 },
368
{
"TRCPROCSELR"
, 0x8810 },
369
{
"TRCCONFIGR"
, 0x8820 },
370
{
"TRCAUXCTLR"
, 0x8830 },
371
{
"TRCEVENTCTL0R"
, 0x8840 },
372
{
"TRCEVENTCTL1R"
, 0x8848 },
373
{
"TRCSTALLCTLR"
, 0x8858 },
374
{
"TRCTSCTLR"
, 0x8860 },
375
{
"TRCSYNCPR"
, 0x8868 },
376
{
"TRCCCCTLR"
, 0x8870 },
377
{
"TRCBBCTLR"
, 0x8878 },
378
{
"TRCTRACEIDR"
, 0x8801 },
379
{
"TRCQCTLR"
, 0x8809 },
380
{
"TRCVICTLR"
, 0x8802 },
381
{
"TRCVIIECTLR"
, 0x880a },
382
{
"TRCVISSCTLR"
, 0x8812 },
383
{
"TRCVIPCSSCTLR"
, 0x881a },
384
{
"TRCVDCTLR"
, 0x8842 },
385
{
"TRCVDSACCTLR"
, 0x884a },
386
{
"TRCVDARCCTLR"
, 0x8852 },
387
{
"TRCSEQEVR0"
, 0x8804 },
388
{
"TRCSEQEVR1"
, 0x880c },
389
{
"TRCSEQEVR2"
, 0x8814 },
390
{
"TRCSEQRSTEVR"
, 0x8834 },
391
{
"TRCSEQSTR"
, 0x883c },
392
{
"TRCEXTINSELR"
, 0x8844 },
393
{
"TRCCNTRLDVR0"
, 0x8805 },
394
{
"TRCCNTRLDVR1"
, 0x880d },
395
{
"TRCCNTRLDVR2"
, 0x8815 },
396
{
"TRCCNTRLDVR3"
, 0x881d },
397
{
"TRCCNTCTLR0"
, 0x8825 },
398
{
"TRCCNTCTLR1"
, 0x882d },
399
{
"TRCCNTCTLR2"
, 0x8835 },
400
{
"TRCCNTCTLR3"
, 0x883d },
401
{
"TRCCNTVR0"
, 0x8845 },
402
{
"TRCCNTVR1"
, 0x884d },
403
{
"TRCCNTVR2"
, 0x8855 },
404
{
"TRCCNTVR3"
, 0x885d },
405
{
"TRCIMSPEC0"
, 0x8807 },
406
{
"TRCIMSPEC1"
, 0x880f },
407
{
"TRCIMSPEC2"
, 0x8817 },
408
{
"TRCIMSPEC3"
, 0x881f },
409
{
"TRCIMSPEC4"
, 0x8827 },
410
{
"TRCIMSPEC5"
, 0x882f },
411
{
"TRCIMSPEC6"
, 0x8837 },
412
{
"TRCIMSPEC7"
, 0x883f },
413
{
"TRCRSCTLR2"
, 0x8890 },
414
{
"TRCRSCTLR3"
, 0x8898 },
415
{
"TRCRSCTLR4"
, 0x88a0 },
416
{
"TRCRSCTLR5"
, 0x88a8 },
417
{
"TRCRSCTLR6"
, 0x88b0 },
418
{
"TRCRSCTLR7"
, 0x88b8 },
419
{
"TRCRSCTLR8"
, 0x88c0 },
420
{
"TRCRSCTLR9"
, 0x88c8 },
421
{
"TRCRSCTLR10"
, 0x88d0 },
422
{
"TRCRSCTLR11"
, 0x88d8 },
423
{
"TRCRSCTLR12"
, 0x88e0 },
424
{
"TRCRSCTLR13"
, 0x88e8 },
425
{
"TRCRSCTLR14"
, 0x88f0 },
426
{
"TRCRSCTLR15"
, 0x88f8 },
427
{
"TRCRSCTLR16"
, 0x8881 },
428
{
"TRCRSCTLR17"
, 0x8889 },
429
{
"TRCRSCTLR18"
, 0x8891 },
430
{
"TRCRSCTLR19"
, 0x8899 },
431
{
"TRCRSCTLR20"
, 0x88a1 },
432
{
"TRCRSCTLR21"
, 0x88a9 },
433
{
"TRCRSCTLR22"
, 0x88b1 },
434
{
"TRCRSCTLR23"
, 0x88b9 },
435
{
"TRCRSCTLR24"
, 0x88c1 },
436
{
"TRCRSCTLR25"
, 0x88c9 },
437
{
"TRCRSCTLR26"
, 0x88d1 },
438
{
"TRCRSCTLR27"
, 0x88d9 },
439
{
"TRCRSCTLR28"
, 0x88e1 },
440
{
"TRCRSCTLR29"
, 0x88e9 },
441
{
"TRCRSCTLR30"
, 0x88f1 },
442
{
"TRCRSCTLR31"
, 0x88f9 },
443
{
"TRCSSCCR0"
, 0x8882 },
444
{
"TRCSSCCR1"
, 0x888a },
445
{
"TRCSSCCR2"
, 0x8892 },
446
{
"TRCSSCCR3"
, 0x889a },
447
{
"TRCSSCCR4"
, 0x88a2 },
448
{
"TRCSSCCR5"
, 0x88aa },
449
{
"TRCSSCCR6"
, 0x88b2 },
450
{
"TRCSSCCR7"
, 0x88ba },
451
{
"TRCSSCSR0"
, 0x88c2 },
452
{
"TRCSSCSR1"
, 0x88ca },
453
{
"TRCSSCSR2"
, 0x88d2 },
454
{
"TRCSSCSR3"
, 0x88da },
455
{
"TRCSSCSR4"
, 0x88e2 },
456
{
"TRCSSCSR5"
, 0x88ea },
457
{
"TRCSSCSR6"
, 0x88f2 },
458
{
"TRCSSCSR7"
, 0x88fa },
459
{
"TRCSSPCICR0"
, 0x8883 },
460
{
"TRCSSPCICR1"
, 0x888b },
461
{
"TRCSSPCICR2"
, 0x8893 },
462
{
"TRCSSPCICR3"
, 0x889b },
463
{
"TRCSSPCICR4"
, 0x88a3 },
464
{
"TRCSSPCICR5"
, 0x88ab },
465
{
"TRCSSPCICR6"
, 0x88b3 },
466
{
"TRCSSPCICR7"
, 0x88bb },
467
{
"TRCPDCR"
, 0x88a4 },
468
{
"TRCACVR0"
, 0x8900 },
469
{
"TRCACVR1"
, 0x8910 },
470
{
"TRCACVR2"
, 0x8920 },
471
{
"TRCACVR3"
, 0x8930 },
472
{
"TRCACVR4"
, 0x8940 },
473
{
"TRCACVR5"
, 0x8950 },
474
{
"TRCACVR6"
, 0x8960 },
475
{
"TRCACVR7"
, 0x8970 },
476
{
"TRCACVR8"
, 0x8901 },
477
{
"TRCACVR9"
, 0x8911 },
478
{
"TRCACVR10"
, 0x8921 },
479
{
"TRCACVR11"
, 0x8931 },
480
{
"TRCACVR12"
, 0x8941 },
481
{
"TRCACVR13"
, 0x8951 },
482
{
"TRCACVR14"
, 0x8961 },
483
{
"TRCACVR15"
, 0x8971 },
484
{
"TRCACATR0"
, 0x8902 },
485
{
"TRCACATR1"
, 0x8912 },
486
{
"TRCACATR2"
, 0x8922 },
487
{
"TRCACATR3"
, 0x8932 },
488
{
"TRCACATR4"
, 0x8942 },
489
{
"TRCACATR5"
, 0x8952 },
490
{
"TRCACATR6"
, 0x8962 },
491
{
"TRCACATR7"
, 0x8972 },
492
{
"TRCACATR8"
, 0x8903 },
493
{
"TRCACATR9"
, 0x8913 },
494
{
"TRCACATR10"
, 0x8923 },
495
{
"TRCACATR11"
, 0x8933 },
496
{
"TRCACATR12"
, 0x8943 },
497
{
"TRCACATR13"
, 0x8953 },
498
{
"TRCACATR14"
, 0x8963 },
499
{
"TRCACATR15"
, 0x8973 },
500
{
"TRCDVCVR0"
, 0x8904 },
501
{
"TRCDVCVR1"
, 0x8924 },
502
{
"TRCDVCVR2"
, 0x8944 },
503
{
"TRCDVCVR3"
, 0x8964 },
504
{
"TRCDVCVR4"
, 0x8905 },
505
{
"TRCDVCVR5"
, 0x8925 },
506
{
"TRCDVCVR6"
, 0x8945 },
507
{
"TRCDVCVR7"
, 0x8965 },
508
{
"TRCDVCMR0"
, 0x8906 },
509
{
"TRCDVCMR1"
, 0x8926 },
510
{
"TRCDVCMR2"
, 0x8946 },
511
{
"TRCDVCMR3"
, 0x8966 },
512
{
"TRCDVCMR4"
, 0x8907 },
513
{
"TRCDVCMR5"
, 0x8927 },
514
{
"TRCDVCMR6"
, 0x8947 },
515
{
"TRCDVCMR7"
, 0x8967 },
516
{
"TRCCIDCVR0"
, 0x8980 },
517
{
"TRCCIDCVR1"
, 0x8990 },
518
{
"TRCCIDCVR2"
, 0x89a0 },
519
{
"TRCCIDCVR3"
, 0x89b0 },
520
{
"TRCCIDCVR4"
, 0x89c0 },
521
{
"TRCCIDCVR5"
, 0x89d0 },
522
{
"TRCCIDCVR6"
, 0x89e0 },
523
{
"TRCCIDCVR7"
, 0x89f0 },
524
{
"TRCVMIDCVR0"
, 0x8981 },
525
{
"TRCVMIDCVR1"
, 0x8991 },
526
{
"TRCVMIDCVR2"
, 0x89a1 },
527
{
"TRCVMIDCVR3"
, 0x89b1 },
528
{
"TRCVMIDCVR4"
, 0x89c1 },
529
{
"TRCVMIDCVR5"
, 0x89d1 },
530
{
"TRCVMIDCVR6"
, 0x89e1 },
531
{
"TRCVMIDCVR7"
, 0x89f1 },
532
{
"TRCCIDCCTLR0"
, 0x8982 },
533
{
"TRCCIDCCTLR1"
, 0x898a },
534
{
"TRCVMIDCCTLR0"
, 0x8992 },
535
{
"TRCVMIDCCTLR1"
, 0x899a },
536
{
"TRCITCTRL"
, 0x8b84 },
537
{
"TRCCLAIMSET"
, 0x8bc6 },
538
{
"TRCCLAIMCLR"
, 0x8bce },
539
{
"TRCCLAIMCLR"
, 0x8bce },
540
{
"TRCCLAIMCLR"
, 0x8bce },
541
{
"ICC_BPR1_EL1"
, 0xc663 },
542
{
"ICC_BPR0_EL1"
, 0xc643 },
543
{
"ICC_PMR_EL1"
, 0xc230 },
544
{
"ICC_CTLR_EL1"
, 0xc664 },
545
{
"ICC_CTLR_EL3"
, 0xf664 },
546
{
"ICC_SRE_EL1"
, 0xc665 },
547
{
"ICC_SRE_EL2"
, 0xe64d },
548
{
"ICC_SRE_EL3"
, 0xf665 },
549
{
"ICC_IGRPEN0_EL1"
, 0xc666 },
550
{
"ICC_IGRPEN1_EL1"
, 0xc667 },
551
{
"ICC_IGRPEN1_EL3"
, 0xf667 },
552
{
"ICC_SEIEN_EL1"
, 0xc668 },
553
{
"ICC_AP0R0_EL1"
, 0xc644 },
554
{
"ICC_AP0R1_EL1"
, 0xc645 },
555
{
"ICC_AP0R2_EL1"
, 0xc646 },
556
{
"ICC_AP0R3_EL1"
, 0xc647 },
557
{
"ICC_AP1R0_EL1"
, 0xc648 },
558
{
"ICC_AP1R1_EL1"
, 0xc649 },
559
{
"ICC_AP1R2_EL1"
, 0xc64a },
560
{
"ICC_AP1R3_EL1"
, 0xc64b },
561
{
"ICH_AP0R0_EL2"
, 0xe640 },
562
{
"ICH_AP0R1_EL2"
, 0xe641 },
563
{
"ICH_AP0R2_EL2"
, 0xe642 },
564
{
"ICH_AP0R3_EL2"
, 0xe643 },
565
{
"ICH_AP1R0_EL2"
, 0xe648 },
566
{
"ICH_AP1R1_EL2"
, 0xe649 },
567
{
"ICH_AP1R2_EL2"
, 0xe64a },
568
{
"ICH_AP1R3_EL2"
, 0xe64b },
569
{
"ICH_HCR_EL2"
, 0xe658 },
570
{
"ICH_MISR_EL2"
, 0xe65a },
571
{
"ICH_VMCR_EL2"
, 0xe65f },
572
{
"ICH_VSEIR_EL2"
, 0xe64c },
573
{
"ICH_LR0_EL2"
, 0xe660 },
574
{
"ICH_LR1_EL2"
, 0xe661 },
575
{
"ICH_LR2_EL2"
, 0xe662 },
576
{
"ICH_LR3_EL2"
, 0xe663 },
577
{
"ICH_LR4_EL2"
, 0xe664 },
578
{
"ICH_LR5_EL2"
, 0xe665 },
579
{
"ICH_LR6_EL2"
, 0xe666 },
580
{
"ICH_LR7_EL2"
, 0xe667 },
581
{
"ICH_LR8_EL2"
, 0xe668 },
582
{
"ICH_LR9_EL2"
, 0xe669 },
583
{
"ICH_LR10_EL2"
, 0xe66a },
584
{
"ICH_LR11_EL2"
, 0xe66b },
585
{
"ICH_LR12_EL2"
, 0xe66c },
586
{
"ICH_LR13_EL2"
, 0xe66d },
587
{
"ICH_LR14_EL2"
, 0xe66e },
588
{
"ICH_LR15_EL2"
, 0xe66f },
589
{
"PAN"
, 0xc213 },
590
{
"LORSA_EL1"
, 0xc520 },
591
{
"LOREA_EL1"
, 0xc521 },
592
{
"LORN_EL1"
, 0xc522 },
593
{
"LORC_EL1"
, 0xc523 },
594
{
"LORID_EL1"
, 0xc527 },
595
{
"TTBR1_EL2"
, 0xe101 },
596
{
"CONTEXTIDR_EL2"
, 0xe681 },
597
{
"CNTHV_TVAL_EL2"
, 0xe718 },
598
{
"CNTHV_CVAL_EL2"
, 0xe71a },
599
{
"CNTHV_CTL_EL2"
, 0xe719 },
600
{
"SCTLR_EL12"
, 0xe880 },
601
{
"CPACR_EL12"
, 0xe882 },
602
{
"TTBR0_EL12"
, 0xe900 },
603
{
"TTBR1_EL12"
, 0xe901 },
604
{
"TCR_EL12"
, 0xe902 },
605
{
"AFSR0_EL12"
, 0xea88 },
606
{
"AFSR1_EL12"
, 0xea89 },
607
{
"ESR_EL12"
, 0xea90 },
608
{
"FAR_EL12"
, 0xeb00 },
609
{
"MAIR_EL12"
, 0xed10 },
610
{
"AMAIR_EL12"
, 0xed18 },
611
{
"VBAR_EL12"
, 0xee00 },
612
{
"CONTEXTIDR_EL12"
, 0xee81 },
613
{
"CNTKCTL_EL12"
, 0xef08 },
614
{
"CNTP_TVAL_EL02"
, 0xef10 },
615
{
"CNTP_CTL_EL02"
, 0xef11 },
616
{
"CNTP_CVAL_EL02"
, 0xef12 },
617
{
"CNTV_TVAL_EL02"
, 0xef18 },
618
{
"CNTV_CTL_EL02"
, 0xef19 },
619
{
"CNTV_CVAL_EL02"
, 0xef1a },
620
{
"SPSR_EL12"
, 0xea00 },
621
{
"ELR_EL12"
, 0xea01 },
622
{
"UAO"
, 0xc214 },
623
{
"PMBLIMITR_EL1"
, 0xc4d0 },
624
{
"PMBPTR_EL1"
, 0xc4d1 },
625
{
"PMBSR_EL1"
, 0xc4d3 },
626
{
"PMBIDR_EL1"
, 0xc4d7 },
627
{
"PMSCR_EL2"
, 0xe4c8 },
628
{
"PMSCR_EL12"
, 0xecc8 },
629
{
"PMSCR_EL1"
, 0xc4c8 },
630
{
"PMSICR_EL1"
, 0xc4ca },
631
{
"PMSIRR_EL1"
, 0xc4cb },
632
{
"PMSFCR_EL1"
, 0xc4cc },
633
{
"PMSEVFR_EL1"
, 0xc4cd },
634
{
"PMSLATFR_EL1"
, 0xc4ce },
635
{
"PMSIDR_EL1"
, 0xc4cf },
636
{
"CPM_IOACC_CTL_EL3"
, 0xff90 },
637
{
NULL
, 0x0000 }
638
};
val
ut16 val
Definition:
armass64_const.h:6
name
const char * name
Definition:
armass64_const.h:5
msr_const
struct @60 msr_const[]
NULL
#define NULL
Definition:
cris-opc.c:27
ut16
uint16_t ut16
Definition:
demangler_util.h:30
librz
asm
arch
arm
armass64_const.h
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