cstool.c File Reference

#include <string.h>
#include <ctype.h>
#include <errno.h>
#include "getopt.h"
#include <capstone/capstone.h>

Go to the source code of this file.

Functions
void	print_insn_detail_x86 (csh ud, cs_mode mode, cs_insn *ins)
void	print_insn_detail_arm (csh handle, cs_insn *ins)
void	print_insn_detail_arm64 (csh handle, cs_insn *ins)
void	print_insn_detail_mips (csh handle, cs_insn *ins)
void	print_insn_detail_ppc (csh handle, cs_insn *ins)
void	print_insn_detail_sparc (csh handle, cs_insn *ins)
void	print_insn_detail_sysz (csh handle, cs_insn *ins)
void	print_insn_detail_xcore (csh handle, cs_insn *ins)
void	print_insn_detail_m68k (csh handle, cs_insn *ins)
void	print_insn_detail_tms320c64x (csh handle, cs_insn *ins)
void	print_insn_detail_m680x (csh handle, cs_insn *ins)
void	print_insn_detail_evm (csh handle, cs_insn *ins)
static void	print_details (csh handle, cs_arch arch, cs_mode md, cs_insn *ins)
void	print_string_hex (const char *comment, unsigned char *str, size_t len)
static uint8_t	char_to_hexnum (char c)
static uint8_t *	preprocess (char *code, size_t *size)
static void	usage (char *prog)
int	main (int argc, char **argv)

Variables
struct {
const char *   name
cs_arch   arch
cs_mode   mode
}	all_archs []

Function Documentation

char_to_hexnum()

static uint8_t char_to_hexnum ( char  c )

static

Definition at line 104 of file cstool.c.

{
    if (c >= '0' && c <= '9') {
        return (uint8_t)(c - '0');
    }
 
    if (c >= 'a' && c <= 'f') {
        return (uint8_t)(10 + c - 'a');
    }
 
    //  c >= 'A' && c <= 'F'
    return (uint8_t)(10 + c - 'A');
}

References c.

Referenced by preprocess().

main()

int main	(	int	argc,
		char **	argv
	)

Definition at line 297 of file cstool.c.

{
    int i, c;
    csh handle;
    char *mode;
    uint8_t *assembly;
    size_t count, size;
    uint64_t address = 0LL;
    cs_insn *insn;
    cs_err err;
    cs_mode md;
    cs_arch arch = CS_ARCH_ALL;
    bool detail_flag = false;
    bool unsigned_flag = false;
    bool skipdata = false;
    int args_left;
 
    while ((c = getopt (argc, argv, "sudhv")) != -1) {
        switch (c) {
            case 's':
                skipdata = true;
                break;
            case 'u':
                unsigned_flag = true;
                break;
            case 'd':
                detail_flag = true;
                break;
            case 'v':
                printf("Cstool for Capstone Disassembler Engine v%u.%u.%u\n", CS_VERSION_MAJOR, CS_VERSION_MINOR, CS_VERSION_EXTRA);
 
                printf("Capstone build: ");
                if (cs_support(CS_ARCH_X86)) {
                    printf("x86=1 ");
                }
 
                if (cs_support(CS_ARCH_ARM)) {
                    printf("arm=1 ");
                }
 
                if (cs_support(CS_ARCH_ARM64)) {
                    printf("arm64=1 ");
                }
 
                if (cs_support(CS_ARCH_MIPS)) {
                    printf("mips=1 ");
                }
 
                if (cs_support(CS_ARCH_PPC)) {
                    printf("ppc=1 ");
                }
 
                if (cs_support(CS_ARCH_SPARC)) {
                    printf("sparc=1 ");
                }
 
                if (cs_support(CS_ARCH_SYSZ)) {
                    printf("sysz=1 ");
                }
 
                if (cs_support(CS_ARCH_XCORE)) {
                    printf("xcore=1 ");
                }
 
                if (cs_support(CS_ARCH_M68K)) {
                    printf("m68k=1 ");
                }
 
                if (cs_support(CS_ARCH_TMS320C64X)) {
                    printf("tms320c64x=1 ");
                }
 
                if (cs_support(CS_ARCH_M680X)) {
                    printf("m680x=1 ");
                }
 
                if (cs_support(CS_ARCH_EVM)) {
                    printf("evm=1 ");
                }
 
                if (cs_support(CS_SUPPORT_DIET)) {
                    printf("diet=1 ");
                }
 
                if (cs_support(CS_SUPPORT_X86_REDUCE)) {
                    printf("x86_reduce=1 ");
                }
 
                printf("\n");
                return 0;
            case 'h':
                usage(argv[0]);
                return 0;
            default:
                usage(argv[0]);
                return -1;
        }
    }
 
    args_left = argc - optind;
    if (args_left < 2 || args_left > 3) {
        usage(argv[0]);
        return -1;
    }
 
    mode = argv[optind];
    assembly = preprocess(argv[optind + 1], &size);
    if (!assembly) {
        usage(argv[0]);
        return -1;
    }
 
    if (args_left == 3) {
        char *temp, *src = argv[optind + 2];
        address = strtoull(src, &temp, 16);
        if (temp == src || *temp != '\0' || errno == ERANGE) {
            printf("ERROR: invalid address argument, quit!\n");
            return -2;
        }
    }
 
    for (i = 0; all_archs[i].name; i++) {
        if (!strcmp(all_archs[i].name, mode)) {
            arch = all_archs[i].arch;
            err = cs_open(all_archs[i].arch, all_archs[i].mode, &handle);
            if (!err) {
                md = all_archs[i].mode;
                if (strstr (mode, "att")) {
                    cs_option(handle, CS_OPT_SYNTAX, CS_OPT_SYNTAX_ATT);
                }
 
                // turn on SKIPDATA mode
                if (skipdata)
                    cs_option(handle, CS_OPT_SKIPDATA, CS_OPT_ON);
            }
            break;
        }
    }
 
    if (arch == CS_ARCH_ALL) {
        printf("ERROR: Invalid <arch+mode>: \"%s\", quit!\n", mode);
        usage(argv[0]);
        return -1;
    }
 
    if (err) {
        printf("ERROR: Failed on cs_open(), quit!\n");
        usage(argv[0]);
        return -1;
    }
 
    if (detail_flag) {
        cs_option(handle, CS_OPT_DETAIL, CS_OPT_ON);
    }
 
    if (unsigned_flag) {
        cs_option(handle, CS_OPT_UNSIGNED, CS_OPT_ON);
    }
 
    count = cs_disasm(handle, assembly, size, address, 0, &insn);
    if (count > 0) {
        size_t i;
 
        for (i = 0; i < count; i++) {
            int j;
 
            printf("%2"PRIx64"  ", insn[i].address);
            for (j = 0; j < insn[i].size; j++) {
                if (j > 0)
                    putchar(' ');
                printf("%02x", insn[i].bytes[j]);
            }
            // X86 and s390 instruction sizes are variable.
            // align assembly instruction after the opcode
            if (arch == CS_ARCH_X86) {
                for (; j < 16; j++) {
                    printf("   ");
                }
            } else if (arch == CS_ARCH_SYSZ) {
                for (; j < 6; j++) {
                    printf("   ");
                }
            }
 
            printf("  %s\t%s\n", insn[i].mnemonic, insn[i].op_str);
 
            if (detail_flag) {
                print_details(handle, arch, md, &insn[i]);
            }
        }
 
        cs_free(insn, count);
    } else {
        printf("ERROR: invalid assembly code\n");
        return(-4);
    }
 
    cs_close(&handle);
    free(assembly);
 
    return 0;
}

References all_archs, arch, argv, bytes, c, count, CS_ARCH_ALL, CS_ARCH_ARM, CS_ARCH_ARM64, CS_ARCH_EVM, CS_ARCH_M680X, CS_ARCH_M68K, CS_ARCH_MIPS, CS_ARCH_PPC, CS_ARCH_SPARC, CS_ARCH_SYSZ, CS_ARCH_TMS320C64X, CS_ARCH_X86, CS_ARCH_XCORE, cs_close(), cs_disasm(), cs_free(), cs_open(), CS_OPT_DETAIL, CS_OPT_ON, CS_OPT_SKIPDATA, CS_OPT_SYNTAX, CS_OPT_SYNTAX_ATT, CS_OPT_UNSIGNED, cs_option(), cs_support(), CS_SUPPORT_DIET, CS_SUPPORT_X86_REDUCE, CS_VERSION_EXTRA, CS_VERSION_MAJOR, CS_VERSION_MINOR, ERANGE, err, free(), getopt(), handle, i, benchmark::md, mode, optind, preprocess(), print_details(), printf(), PRIx64, src, and usage().

preprocess()

static uint8_t* preprocess ( char *  code, size_t *  size  )

static

Definition at line 120 of file cstool.c.

{
    size_t i = 0, j = 0;
    uint8_t high, low;
    uint8_t *result;
 
    if (strlen(code) == 0)
        return NULL;
 
    result = (uint8_t *)malloc(strlen(code));
    if (result != NULL) {
        while (code[i] != '\0') {
            if (isxdigit(code[i]) && isxdigit(code[i+1])) {
                high = 16 * char_to_hexnum(code[i]);
                low = char_to_hexnum(code[i+1]);
                result[j] = high + low;
                i++;
                j++;
            }
            i++;
        }
        *size = j;
    }
 
    return result;
}

References char_to_hexnum(), i, isxdigit, malloc(), and NULL.

Referenced by main().

print_details()

static void print_details ( csh  handle, cs_arch  arch, cs_mode  md, cs_insn *  ins  )

static

Definition at line 240 of file cstool.c.

{
    printf("\tID: %u (%s)\n", ins->id, cs_insn_name(handle, ins->id));
 
    switch(arch) {
        case CS_ARCH_X86:
            print_insn_detail_x86(handle, md, ins);
            break;
        case CS_ARCH_ARM:
            print_insn_detail_arm(handle, ins);
            break;
        case CS_ARCH_ARM64:
            print_insn_detail_arm64(handle, ins);
            break;
        case CS_ARCH_MIPS:
            print_insn_detail_mips(handle, ins);
            break;
        case CS_ARCH_PPC:
            print_insn_detail_ppc(handle, ins);
            break;
        case CS_ARCH_SPARC:
            print_insn_detail_sparc(handle, ins);
            break;
        case CS_ARCH_SYSZ:
            print_insn_detail_sysz(handle, ins);
            break;
        case CS_ARCH_XCORE:
            print_insn_detail_xcore(handle, ins);
            break;
        case CS_ARCH_M68K:
            print_insn_detail_m68k(handle, ins);
            break;
        case CS_ARCH_TMS320C64X:
            print_insn_detail_tms320c64x(handle, ins);
            break;
        case CS_ARCH_M680X:
            print_insn_detail_m680x(handle, ins);
            break;
        case CS_ARCH_EVM:
            print_insn_detail_evm(handle, ins);
            break;
        default: break;
    }
 
    if (ins->detail->groups_count) {
        int j;
 
        printf("\tGroups: ");
        for(j = 0; j < ins->detail->groups_count; j++) {
            printf("%s ", cs_group_name(handle, ins->detail->groups[j]));
        }
        printf("\n");
    }
 
    printf("\n");
}

References arch, CS_ARCH_ARM, CS_ARCH_ARM64, CS_ARCH_EVM, CS_ARCH_M680X, CS_ARCH_M68K, CS_ARCH_MIPS, CS_ARCH_PPC, CS_ARCH_SPARC, CS_ARCH_SYSZ, CS_ARCH_TMS320C64X, CS_ARCH_X86, CS_ARCH_XCORE, cs_group_name(), cs_insn_name(), handle, benchmark::md, print_insn_detail_arm(), print_insn_detail_arm64(), print_insn_detail_evm(), print_insn_detail_m680x(), print_insn_detail_m68k(), print_insn_detail_mips(), print_insn_detail_ppc(), print_insn_detail_sparc(), print_insn_detail_sysz(), print_insn_detail_tms320c64x(), print_insn_detail_x86(), print_insn_detail_xcore(), and printf().

Referenced by main().

print_insn_detail_arm()

void print_insn_detail_arm	(	csh	handle,
		cs_insn *	ins
	)

Definition at line 8 of file cstool_arm.c.

{
    cs_arm *arm;
    int i;
    cs_regs regs_read, regs_write;
    uint8_t regs_read_count, regs_write_count;
 
    // detail can be NULL on "data" instruction if SKIPDATA option is turned ON
    if (ins->detail == NULL)
        return;
 
    arm = &(ins->detail->arm);
 
    if (arm->op_count)
        printf("\top_count: %u\n", arm->op_count);
 
    for (i = 0; i < arm->op_count; i++) {
        cs_arm_op *op = &(arm->operands[i]);
        switch((int)op->type) {
            default:
                break;
            case ARM_OP_REG:
                printf("\t\toperands[%u].type: REG = %s\n", i, cs_reg_name(handle, op->reg));
                break;
            case ARM_OP_IMM:
                printf("\t\toperands[%u].type: IMM = 0x%x\n", i, op->imm);
                break;
            case ARM_OP_FP:
#if defined(_KERNEL_MODE)
                // Issue #681: Windows kernel does not support formatting float point
                printf("\t\toperands[%u].type: FP = <float_point_unsupported>\n", i);
#else
                printf("\t\toperands[%u].type: FP = %f\n", i, op->fp);
#endif
                break;
            case ARM_OP_MEM:
                printf("\t\toperands[%u].type: MEM\n", i);
                if (op->mem.base != ARM_REG_INVALID)
                    printf("\t\t\toperands[%u].mem.base: REG = %s\n",
                            i, cs_reg_name(handle, op->mem.base));
                if (op->mem.index != ARM_REG_INVALID)
                    printf("\t\t\toperands[%u].mem.index: REG = %s\n",
                            i, cs_reg_name(handle, op->mem.index));
                if (op->mem.scale != 1)
                    printf("\t\t\toperands[%u].mem.scale: %d\n", i, op->mem.scale);
                if (op->mem.disp != 0)
                    printf("\t\t\toperands[%u].mem.disp: 0x%x\n", i, op->mem.disp);
                if (op->mem.lshift != 0)
                    printf("\t\t\toperands[%u].mem.lshift: 0x%x\n", i, op->mem.lshift);
 
                break;
            case ARM_OP_PIMM:
                printf("\t\toperands[%u].type: P-IMM = %u\n", i, op->imm);
                break;
            case ARM_OP_CIMM:
                printf("\t\toperands[%u].type: C-IMM = %u\n", i, op->imm);
                break;
            case ARM_OP_SETEND:
                printf("\t\toperands[%u].type: SETEND = %s\n", i, op->setend == ARM_SETEND_BE? "be" : "le");
                break;
            case ARM_OP_SYSREG:
                printf("\t\toperands[%u].type: SYSREG = %u\n", i, op->reg);
                break;
        }
 
        if (op->neon_lane != -1) {
            printf("\t\toperands[%u].neon_lane = %u\n", i, op->neon_lane);
        }
 
        switch(op->access) {
            default:
                break;
            case CS_AC_READ:
                printf("\t\toperands[%u].access: READ\n", i);
                break;
            case CS_AC_WRITE:
                printf("\t\toperands[%u].access: WRITE\n", i);
                break;
            case CS_AC_READ | CS_AC_WRITE:
                printf("\t\toperands[%u].access: READ | WRITE\n", i);
                break;
        }
 
        if (op->shift.type != ARM_SFT_INVALID && op->shift.value) {
            if (op->shift.type < ARM_SFT_ASR_REG)
                // shift with constant value
                printf("\t\t\tShift: %u = %u\n", op->shift.type, op->shift.value);
            else
                // shift with register
                printf("\t\t\tShift: %u = %s\n", op->shift.type,
                        cs_reg_name(handle, op->shift.value));
        }
 
        if (op->vector_index != -1) {
            printf("\t\toperands[%u].vector_index = %u\n", i, op->vector_index);
        }
 
        if (op->subtracted)
            printf("\t\tSubtracted: True\n");
    }
 
    if (arm->cc != ARM_CC_AL && arm->cc != ARM_CC_INVALID)
        printf("\tCode condition: %u\n", arm->cc);
 
    if (arm->update_flags)
        printf("\tUpdate-flags: True\n");
 
    if (arm->writeback)
        printf("\tWrite-back: True\n");
 
    if (arm->cps_mode)
        printf("\tCPSI-mode: %u\n", arm->cps_mode);
 
    if (arm->cps_flag)
        printf("\tCPSI-flag: %u\n", arm->cps_flag);
 
    if (arm->vector_data)
        printf("\tVector-data: %u\n", arm->vector_data);
 
    if (arm->vector_size)
        printf("\tVector-size: %u\n", arm->vector_size);
 
    if (arm->usermode)
        printf("\tUser-mode: True\n");
 
    if (arm->mem_barrier)
        printf("\tMemory-barrier: %u\n", arm->mem_barrier);
 
    // Print out all registers accessed by this instruction (either implicit or explicit)
    if (!cs_regs_access(handle, ins,
                regs_read, &regs_read_count,
                regs_write, &regs_write_count)) {
        if (regs_read_count) {
            printf("\tRegisters read:");
            for(i = 0; i < regs_read_count; i++) {
                printf(" %s", cs_reg_name(handle, regs_read[i]));
            }
            printf("\n");
        }
 
        if (regs_write_count) {
            printf("\tRegisters modified:");
            for(i = 0; i < regs_write_count; i++) {
                printf(" %s", cs_reg_name(handle, regs_write[i]));
            }
            printf("\n");
        }
    }
}

References ARM_CC_AL, ARM_CC_INVALID, ARM_OP_CIMM, ARM_OP_FP, ARM_OP_IMM, ARM_OP_MEM, ARM_OP_PIMM, ARM_OP_REG, ARM_OP_SETEND, ARM_OP_SYSREG, ARM_REG_INVALID, ARM_SETEND_BE, ARM_SFT_ASR_REG, ARM_SFT_INVALID, CS_AC_READ, CS_AC_WRITE, cs_reg_name(), cs_regs_access(), handle, i, NULL, and printf().

Referenced by print_details().

print_insn_detail_arm64()

void print_insn_detail_arm64	(	csh	handle,
		cs_insn *	ins
	)

Definition at line 11 of file cstool_arm64.c.

{
    cs_arm64 *arm64;
    int i;
    cs_regs regs_read, regs_write;
    uint8_t regs_read_count, regs_write_count;
    uint8_t access;
    
    // detail can be NULL if SKIPDATA option is turned ON
    if (ins->detail == NULL)
        return;
 
    arm64 = &(ins->detail->arm64);
    if (arm64->op_count)
        printf("\top_count: %u\n", arm64->op_count);
 
    for (i = 0; i < arm64->op_count; i++) {
        cs_arm64_op *op = &(arm64->operands[i]);
        switch(op->type) {
            default:
                break;
            case ARM64_OP_REG:
                printf("\t\toperands[%u].type: REG = %s\n", i, cs_reg_name(handle, op->reg));
                break;
            case ARM64_OP_IMM:
                printf("\t\toperands[%u].type: IMM = 0x%" PRIx64 "\n", i, op->imm);
                break;
            case ARM64_OP_FP:
#if defined(_KERNEL_MODE)
                // Issue #681: Windows kernel does not support formatting float point
                printf("\t\toperands[%u].type: FP = <float_point_unsupported>\n", i);
#else
                printf("\t\toperands[%u].type: FP = %f\n", i, op->fp);
#endif
                break;
            case ARM64_OP_MEM:
                printf("\t\toperands[%u].type: MEM\n", i);
                if (op->mem.base != ARM64_REG_INVALID)
                    printf("\t\t\toperands[%u].mem.base: REG = %s\n", i, cs_reg_name(handle, op->mem.base));
                if (op->mem.index != ARM64_REG_INVALID)
                    printf("\t\t\toperands[%u].mem.index: REG = %s\n", i, cs_reg_name(handle, op->mem.index));
                if (op->mem.disp != 0)
                    printf("\t\t\toperands[%u].mem.disp: 0x%x\n", i, op->mem.disp);
 
                break;
            case ARM64_OP_CIMM:
                printf("\t\toperands[%u].type: C-IMM = %u\n", i, (int)op->imm);
                break;
            case ARM64_OP_REG_MRS:
                printf("\t\toperands[%u].type: REG_MRS = 0x%x\n", i, op->reg);
                break;
            case ARM64_OP_REG_MSR:
                printf("\t\toperands[%u].type: REG_MSR = 0x%x\n", i, op->reg);
                break;
            case ARM64_OP_PSTATE:
                printf("\t\toperands[%u].type: PSTATE = 0x%x\n", i, op->pstate);
                break;
            case ARM64_OP_SYS:
                printf("\t\toperands[%u].type: SYS = 0x%x\n", i, op->sys);
                break;
            case ARM64_OP_PREFETCH:
                printf("\t\toperands[%u].type: PREFETCH = 0x%x\n", i, op->prefetch);
                break;
            case ARM64_OP_BARRIER:
                printf("\t\toperands[%u].type: BARRIER = 0x%x\n", i, op->barrier);
                break;
        }
        
        access = op->access;
        switch(access) {
            default:
                break;
            case CS_AC_READ:
                printf("\t\toperands[%u].access: READ\n", i);
                break;
            case CS_AC_WRITE:
                printf("\t\toperands[%u].access: WRITE\n", i);
                break;
            case CS_AC_READ | CS_AC_WRITE:
                printf("\t\toperands[%u].access: READ | WRITE\n", i);
                break;
        }
        
        if (op->shift.type != ARM64_SFT_INVALID &&
            op->shift.value)
            printf("\t\t\tShift: type = %u, value = %u\n",
                   op->shift.type, op->shift.value);
 
        if (op->ext != ARM64_EXT_INVALID)
            printf("\t\t\tExt: %u\n", op->ext);
 
        if (op->vas != ARM64_VAS_INVALID)
            printf("\t\t\tVector Arrangement Specifier: 0x%x\n", op->vas);
 
        if (op->vess != ARM64_VESS_INVALID)
            printf("\t\t\tVector Element Size Specifier: %u\n", op->vess);
 
        if (op->vector_index != -1)
            printf("\t\t\tVector Index: %u\n", op->vector_index);
    }
 
    if (arm64->update_flags)
        printf("\tUpdate-flags: True\n");
 
    if (arm64->writeback)
        printf("\tWrite-back: True\n");
 
    if (arm64->cc)
        printf("\tCode-condition: %u\n", arm64->cc);
 
    // Print out all registers accessed by this instruction (either implicit or explicit)
    if (!cs_regs_access(handle, ins,
                        regs_read, &regs_read_count,
                        regs_write, &regs_write_count)) {
        if (regs_read_count) {
            printf("\tRegisters read:");
            for(i = 0; i < regs_read_count; i++) {
                printf(" %s", cs_reg_name(handle, regs_read[i]));
            }
            printf("\n");
        }
        
        if (regs_write_count) {
            printf("\tRegisters modified:");
            for(i = 0; i < regs_write_count; i++) {
                printf(" %s", cs_reg_name(handle, regs_write[i]));
            }
            printf("\n");
        }
    }
}

References access, ARM64_EXT_INVALID, ARM64_OP_BARRIER, ARM64_OP_CIMM, ARM64_OP_FP, ARM64_OP_IMM, ARM64_OP_MEM, ARM64_OP_PREFETCH, ARM64_OP_PSTATE, ARM64_OP_REG, ARM64_OP_REG_MRS, ARM64_OP_REG_MSR, ARM64_OP_SYS, ARM64_REG_INVALID, ARM64_SFT_INVALID, ARM64_VAS_INVALID, ARM64_VESS_INVALID, CS_AC_READ, CS_AC_WRITE, cs_reg_name(), cs_regs_access(), handle, i, NULL, printf(), and PRIx64.

Referenced by print_details().

print_insn_detail_evm()

void print_insn_detail_evm	(	csh	handle,
		cs_insn *	ins
	)

Definition at line 8 of file cstool_evm.c.

{
    cs_evm *evm;
 
    // detail can be NULL on "data" instruction if SKIPDATA option is turned ON
    if (ins->detail == NULL)
        return;
 
    evm = &(ins->detail->evm);
 
    if (evm->pop)
        printf("\tPop:     %u\n", evm->pop);
 
    if (evm->push)
        printf("\tPush:    %u\n", evm->push);
 
    if (evm->fee)
        printf("\tGas fee: %u\n", evm->fee);
}

References cs_evm::fee, NULL, cs_evm::pop, printf(), and cs_evm::push.

Referenced by print_details().

print_insn_detail_m680x()

void print_insn_detail_m680x	(	csh	handle,
		cs_insn *	ins
	)

Definition at line 45 of file cstool_m680x.c.

{
    cs_detail *detail = insn->detail;
    cs_m680x *m680x = NULL;
    int i;
 
    // detail can be NULL on "data" instruction if SKIPDATA option is
    // turned ON
    if (detail == NULL)
        return;
 
    m680x = &detail->m680x;
 
    if (m680x->op_count)
        printf("\top_count: %u\n", m680x->op_count);
 
    for (i = 0; i < m680x->op_count; i++) {
        cs_m680x_op *op = &(m680x->operands[i]);
        const char *comment;
 
        switch ((int)op->type) {
        default:
            break;
 
        case M680X_OP_REGISTER:
            comment = "";
 
            if ((i == 0 && m680x->flags & M680X_FIRST_OP_IN_MNEM) ||
                (i == 1 && m680x->flags &
                    M680X_SECOND_OP_IN_MNEM))
                comment = " (in mnemonic)";
 
            printf("\t\toperands[%u].type: REGISTER = %s%s\n", i,
                cs_reg_name(handle, op->reg), comment);
            break;
 
        case M680X_OP_CONSTANT:
            printf("\t\toperands[%u].type: CONSTANT = %u\n", i,
                op->const_val);
            break;
 
        case M680X_OP_IMMEDIATE:
            printf("\t\toperands[%u].type: IMMEDIATE = #%d\n", i,
                op->imm);
            break;
 
        case M680X_OP_DIRECT:
            printf("\t\toperands[%u].type: DIRECT = 0x%02x\n", i,
                op->direct_addr);
            break;
 
        case M680X_OP_EXTENDED:
            printf("\t\toperands[%u].type: EXTENDED %s = 0x%04x\n",
                i, op->ext.indirect ? "INDIRECT" : "",
                op->ext.address);
            break;
 
        case M680X_OP_RELATIVE:
            printf("\t\toperands[%u].type: RELATIVE = 0x%04x\n", i,
                op->rel.address);
            break;
 
        case M680X_OP_INDEXED:
            printf("\t\toperands[%u].type: INDEXED%s\n", i,
                (op->idx.flags & M680X_IDX_INDIRECT) ?
                " INDIRECT" : "");
 
            if (op->idx.base_reg != M680X_REG_INVALID)
                printf("\t\t\tbase register: %s\n",
                    cs_reg_name(handle, op->idx.base_reg));
 
            if (op->idx.offset_reg != M680X_REG_INVALID)
                printf("\t\t\toffset register: %s\n",
                    cs_reg_name(handle, op->idx.offset_reg));
 
            if ((op->idx.offset_bits != 0) &&
                (op->idx.offset_reg == M680X_REG_INVALID) &&
                !op->idx.inc_dec) {
                printf("\t\t\toffset: %d\n", op->idx.offset);
 
                if (op->idx.base_reg == M680X_REG_PC)
                    printf("\t\t\toffset address: 0x%x\n",
                        op->idx.offset_addr);
 
                printf("\t\t\toffset bits: %u\n",
                    op->idx.offset_bits);
            }
 
            if (op->idx.inc_dec) {
                const char *post_pre = op->idx.flags &
                    M680X_IDX_POST_INC_DEC ? "post" : "pre";
                const char *inc_dec = (op->idx.inc_dec > 0) ?
                    "increment" : "decrement";
 
                printf("\t\t\t%s %s: %d\n", post_pre, inc_dec,
                    abs(op->idx.inc_dec));
            }
 
            break;
        }
 
        if (op->size != 0)
            printf("\t\t\tsize: %u\n", op->size);
 
        if (op->access != CS_AC_INVALID)
            printf("\t\t\taccess: %s\n", s_access[op->access]);
    }
 
    print_read_write_regs(handle, detail);
}

References CS_AC_INVALID, cs_reg_name(), cs_m680x::flags, handle, i, M680X_FIRST_OP_IN_MNEM, M680X_IDX_INDIRECT, M680X_IDX_POST_INC_DEC, M680X_OP_CONSTANT, M680X_OP_DIRECT, M680X_OP_EXTENDED, M680X_OP_IMMEDIATE, M680X_OP_INDEXED, M680X_OP_REGISTER, M680X_OP_RELATIVE, M680X_REG_INVALID, M680X_REG_PC, M680X_SECOND_OP_IN_MNEM, NULL, cs_m680x::op_count, cs_m680x::operands, print_read_write_regs(), printf(), and s_access.

Referenced by print_details().

print_insn_detail_m68k()

void print_insn_detail_m68k	(	csh	handle,
		cs_insn *	ins
	)

Definition at line 61 of file cstool_m68k.c.

{
    cs_m68k* m68k;
    cs_detail* detail;
    int i;
 
    // detail can be NULL on "data" instruction if SKIPDATA option is turned ON
    if (ins->detail == NULL)
        return;
 
    detail = ins->detail;
    m68k = &detail->m68k;
    if (m68k->op_count)
        printf("\top_count: %u\n", m68k->op_count);
 
    print_read_write_regs(detail, handle);
 
    printf("\tgroups_count: %u\n", detail->groups_count);
 
    for (i = 0; i < m68k->op_count; i++) {
        cs_m68k_op* op = &(m68k->operands[i]);
 
        switch((int)op->type) {
            default:
                break;
            case M68K_OP_REG:
                printf("\t\toperands[%u].type: REG = %s\n", i, cs_reg_name(handle, op->reg));
                break;
            case M68K_OP_IMM:
                printf("\t\toperands[%u].type: IMM = 0x%x\n", i, (int)op->imm);
                break;
            case M68K_OP_MEM:
                printf("\t\toperands[%u].type: MEM\n", i);
                if (op->mem.base_reg != M68K_REG_INVALID)
                    printf("\t\t\toperands[%u].mem.base: REG = %s\n",
                            i, cs_reg_name(handle, op->mem.base_reg));
                if (op->mem.index_reg != M68K_REG_INVALID) {
                    printf("\t\t\toperands[%u].mem.index: REG = %s\n",
                            i, cs_reg_name(handle, op->mem.index_reg));
                    printf("\t\t\toperands[%u].mem.index: size = %c\n",
                            i, op->mem.index_size ? 'l' : 'w');
                }
                if (op->mem.disp != 0)
                    printf("\t\t\toperands[%u].mem.disp: 0x%x\n", i, op->mem.disp);
                if (op->mem.scale != 0)
                    printf("\t\t\toperands[%u].mem.scale: %d\n", i, op->mem.scale);
 
                printf("\t\taddress mode: %s\n", s_addressing_modes[op->address_mode]);
                break;
            case M68K_OP_FP_SINGLE:
                printf("\t\toperands[%u].type: FP_SINGLE\n", i);
                printf("\t\t\toperands[%u].simm: %f\n", i, op->simm);
                break;
            case M68K_OP_FP_DOUBLE:
                printf("\t\toperands[%u].type: FP_DOUBLE\n", i);
                printf("\t\t\toperands[%u].dimm: %lf\n", i, op->dimm);
                break;
        }
    }
}

References cs_reg_name(), test_evm::detail, handle, i, M68K_OP_FP_DOUBLE, M68K_OP_FP_SINGLE, M68K_OP_IMM, M68K_OP_MEM, M68K_OP_REG, M68K_REG_INVALID, NULL, print_read_write_regs(), printf(), and s_addressing_modes.

Referenced by print_details().

print_insn_detail_mips()

void print_insn_detail_mips	(	csh	handle,
		cs_insn *	ins
	)

Definition at line 11 of file cstool_mips.c.

{
    int i;
    cs_mips *mips;
 
    // detail can be NULL on "data" instruction if SKIPDATA option is turned ON
    if (ins->detail == NULL)
        return;
 
    mips = &(ins->detail->mips);
    if (mips->op_count)
        printf("\top_count: %u\n", mips->op_count);
 
    for (i = 0; i < mips->op_count; i++) {
        cs_mips_op *op = &(mips->operands[i]);
        switch((int)op->type) {
            default:
                break;
            case MIPS_OP_REG:
                printf("\t\toperands[%u].type: REG = %s\n", i, cs_reg_name(handle, op->reg));
                break;
            case MIPS_OP_IMM:
                printf("\t\toperands[%u].type: IMM = 0x%" PRIx64 "\n", i, op->imm);
                break;
            case MIPS_OP_MEM:
                printf("\t\toperands[%u].type: MEM\n", i);
                if (op->mem.base != MIPS_REG_INVALID)
                    printf("\t\t\toperands[%u].mem.base: REG = %s\n",
                           i, cs_reg_name(handle, op->mem.base));
                if (op->mem.disp != 0)
                    printf("\t\t\toperands[%u].mem.disp: 0x%" PRIx64 "\n", i, op->mem.disp);
 
                break;
        }
 
    }
}

References cs_reg_name(), handle, i, MIPS_OP_IMM, MIPS_OP_MEM, MIPS_OP_REG, MIPS_REG_INVALID, NULL, printf(), and PRIx64.

Referenced by print_details().

print_insn_detail_ppc()

void print_insn_detail_ppc	(	csh	handle,
		cs_insn *	ins
	)

Definition at line 39 of file cstool_ppc.c.

{
    cs_ppc *ppc;
    int i;
 
    // detail can be NULL on "data" instruction if SKIPDATA option is turned ON
    if (ins->detail == NULL)
        return;
 
    ppc = &(ins->detail->ppc);
    if (ppc->op_count)
        printf("\top_count: %u\n", ppc->op_count);
 
    for (i = 0; i < ppc->op_count; i++) {
        cs_ppc_op *op = &(ppc->operands[i]);
        switch((int)op->type) {
            default:
                break;
            case PPC_OP_REG:
                printf("\t\toperands[%u].type: REG = %s\n", i, cs_reg_name(handle, op->reg));
                break;
            case PPC_OP_IMM:
                printf("\t\toperands[%u].type: IMM = 0x%"PRIx64"\n", i, op->imm);
                break;
            case PPC_OP_MEM:
                printf("\t\toperands[%u].type: MEM\n", i);
                if (op->mem.base != PPC_REG_INVALID)
                    printf("\t\t\toperands[%u].mem.base: REG = %s\n",
                            i, cs_reg_name(handle, op->mem.base));
                if (op->mem.disp != 0)
                    printf("\t\t\toperands[%u].mem.disp: 0x%x\n", i, op->mem.disp);
 
                break;
            case PPC_OP_CRX:
                printf("\t\toperands[%u].type: CRX\n", i);
                printf("\t\t\toperands[%u].crx.scale: %d\n", i, op->crx.scale);
                printf("\t\t\toperands[%u].crx.reg: %s\n", i, cs_reg_name(handle, op->crx.reg));
                printf("\t\t\toperands[%u].crx.cond: %s\n", i, get_bc_name(op->crx.cond));
                break;
        }
    }
 
    if (ppc->bc != 0)
        printf("\tBranch code: %u\n", ppc->bc);
 
    if (ppc->bh != 0)
        printf("\tBranch hint: %u\n", ppc->bh);
 
    if (ppc->update_cr0)
        printf("\tUpdate-CR0: True\n");
}

References cs_reg_name(), get_bc_name(), handle, i, NULL, PPC_OP_CRX, PPC_OP_IMM, PPC_OP_MEM, PPC_OP_REG, PPC_REG_INVALID, printf(), and PRIx64.

Referenced by print_details().

print_insn_detail_sparc()

void print_insn_detail_sparc	(	csh	handle,
		cs_insn *	ins
	)

Definition at line 10 of file cstool_sparc.c.

{
    cs_sparc *sparc;
    int i;
 
    // detail can be NULL on "data" instruction if SKIPDATA option is turned ON
    if (ins->detail == NULL)
        return;
 
    sparc = &(ins->detail->sparc);
    if (sparc->op_count)
        printf("\top_count: %u\n", sparc->op_count);
 
    for (i = 0; i < sparc->op_count; i++) {
        cs_sparc_op *op = &(sparc->operands[i]);
        switch((int)op->type) {
            default:
                break;
            case SPARC_OP_REG:
                printf("\t\toperands[%u].type: REG = %s\n", i, cs_reg_name(handle, op->reg));
                break;
            case SPARC_OP_IMM:
                printf("\t\toperands[%u].type: IMM = 0x%" PRIx64 "\n", i, op->imm);
                break;
            case SPARC_OP_MEM:
                printf("\t\toperands[%u].type: MEM\n", i);
                if (op->mem.base != X86_REG_INVALID)
                    printf("\t\t\toperands[%u].mem.base: REG = %s\n",
                            i, cs_reg_name(handle, op->mem.base));
                if (op->mem.index != X86_REG_INVALID)
                    printf("\t\t\toperands[%u].mem.index: REG = %s\n",
                            i, cs_reg_name(handle, op->mem.index));
                if (op->mem.disp != 0)
                    printf("\t\t\toperands[%u].mem.disp: 0x%x\n", i, op->mem.disp);
 
                break;
        }
    }
 
    if (sparc->cc != 0)
        printf("\tCode condition: %u\n", sparc->cc);
 
    if (sparc->hint != 0)
        printf("\tHint code: %u\n", sparc->hint);
}

References cs_reg_name(), handle, i, NULL, printf(), PRIx64, SPARC_OP_IMM, SPARC_OP_MEM, SPARC_OP_REG, and X86_REG_INVALID.

Referenced by print_details().

print_insn_detail_sysz()

void print_insn_detail_sysz	(	csh	handle,
		cs_insn *	ins
	)

Definition at line 10 of file cstool_systemz.c.

{
    cs_sysz *sysz;
    int i;
 
    // detail can be NULL on "data" instruction if SKIPDATA option is turned ON
    if (ins->detail == NULL)
        return;
 
    sysz = &(ins->detail->sysz);
    if (sysz->op_count)
        printf("\top_count: %u\n", sysz->op_count);
 
    for (i = 0; i < sysz->op_count; i++) {
        cs_sysz_op *op = &(sysz->operands[i]);
        switch((int)op->type) {
            default:
                break;
            case SYSZ_OP_REG:
                printf("\t\toperands[%u].type: REG = %s\n", i, cs_reg_name(handle, op->reg));
                break;
            case SYSZ_OP_ACREG:
                printf("\t\toperands[%u].type: ACREG = %u\n", i, op->reg);
                break;
            case SYSZ_OP_IMM:
                printf("\t\toperands[%u].type: IMM = 0x%" PRIx64 "\n", i, op->imm);
                break;
            case SYSZ_OP_MEM:
                printf("\t\toperands[%u].type: MEM\n", i);
                if (op->mem.base != SYSZ_REG_INVALID)
                    printf("\t\t\toperands[%u].mem.base: REG = %s\n",
                            i, cs_reg_name(handle, op->mem.base));
                if (op->mem.index != SYSZ_REG_INVALID)
                    printf("\t\t\toperands[%u].mem.index: REG = %s\n",
                            i, cs_reg_name(handle, op->mem.index));
                if (op->mem.length != 0)
                    printf("\t\t\toperands[%u].mem.length: 0x%" PRIx64 "\n", i, op->mem.length);
                if (op->mem.disp != 0)
                    printf("\t\t\toperands[%u].mem.disp: 0x%" PRIx64 "\n", i, op->mem.disp);
 
                break;
        }
    }
 
    if (sysz->cc != 0)
        printf("\tCode condition: %u\n", sysz->cc);
}

References cs_sysz::cc, cs_reg_name(), handle, i, NULL, cs_sysz::op_count, cs_sysz::operands, printf(), PRIx64, SYSZ_OP_ACREG, SYSZ_OP_IMM, SYSZ_OP_MEM, SYSZ_OP_REG, and SYSZ_REG_INVALID.

Referenced by print_details().

print_insn_detail_tms320c64x()

void print_insn_detail_tms320c64x	(	csh	handle,
		cs_insn *	ins
	)

Definition at line 9 of file cstool_tms320c64x.c.

{
    cs_tms320c64x *tms320c64x;
    int i;
 
    // detail can be NULL on "data" instruction if SKIPDATA option is turned ON
    if (ins->detail == NULL)
        return;
 
    tms320c64x = &(ins->detail->tms320c64x);
    if (tms320c64x->op_count)
        printf("\top_count: %u\n", tms320c64x->op_count);
 
    for (i = 0; i < tms320c64x->op_count; i++) {
        cs_tms320c64x_op *op = &(tms320c64x->operands[i]);
        switch((int)op->type) {
            default:
                break;
            case TMS320C64X_OP_REG:
                printf("\t\toperands[%u].type: REG = %s\n", i, cs_reg_name(handle, op->reg));
                break;
            case TMS320C64X_OP_IMM:
                printf("\t\toperands[%u].type: IMM = 0x%x\n", i, op->imm);
                break;
            case TMS320C64X_OP_MEM:
                printf("\t\toperands[%u].type: MEM\n", i);
                if (op->mem.base != TMS320C64X_REG_INVALID)
                    printf("\t\t\toperands[%u].mem.base: REG = %s\n",
                            i, cs_reg_name(handle, op->mem.base));
                printf("\t\t\toperands[%u].mem.disptype: ", i);
                if(op->mem.disptype == TMS320C64X_MEM_DISP_INVALID) {
                    printf("Invalid\n");
                    printf("\t\t\toperands[%u].mem.disp: %u\n", i, op->mem.disp);
                }
                if(op->mem.disptype == TMS320C64X_MEM_DISP_CONSTANT) {
                    printf("Constant\n");
                    printf("\t\t\toperands[%u].mem.disp: %u\n", i, op->mem.disp);
                }
                if(op->mem.disptype == TMS320C64X_MEM_DISP_REGISTER) {
                    printf("Register\n");
                    printf("\t\t\toperands[%u].mem.disp: %s\n", i, cs_reg_name(handle, op->mem.disp));
                }
                printf("\t\t\toperands[%u].mem.unit: %u\n", i, op->mem.unit);
                printf("\t\t\toperands[%u].mem.direction: ", i);
                if(op->mem.direction == TMS320C64X_MEM_DIR_INVALID)
                    printf("Invalid\n");
                if(op->mem.direction == TMS320C64X_MEM_DIR_FW)
                    printf("Forward\n");
                if(op->mem.direction == TMS320C64X_MEM_DIR_BW)
                    printf("Backward\n");
                printf("\t\t\toperands[%u].mem.modify: ", i);
                if(op->mem.modify == TMS320C64X_MEM_MOD_INVALID)
                    printf("Invalid\n");
                if(op->mem.modify == TMS320C64X_MEM_MOD_NO)
                    printf("No\n");
                if(op->mem.modify == TMS320C64X_MEM_MOD_PRE)
                    printf("Pre\n");
                if(op->mem.modify == TMS320C64X_MEM_MOD_POST)
                    printf("Post\n");
                printf("\t\t\toperands[%u].mem.scaled: %u\n", i, op->mem.scaled);
 
                break;
            case TMS320C64X_OP_REGPAIR:
                printf("\t\toperands[%u].type: REGPAIR = %s:%s\n", i, cs_reg_name(handle, op->reg + 1), cs_reg_name(handle, op->reg));
                break;
        }
    }
 
    printf("\tFunctional unit: ");
    switch(tms320c64x->funit.unit) {
        case TMS320C64X_FUNIT_D:
            printf("D%u\n", tms320c64x->funit.side);
            break;
        case TMS320C64X_FUNIT_L:
            printf("L%u\n", tms320c64x->funit.side);
            break;
        case TMS320C64X_FUNIT_M:
            printf("M%u\n", tms320c64x->funit.side);
            break;
        case TMS320C64X_FUNIT_S:
            printf("S%u\n", tms320c64x->funit.side);
            break;
        case TMS320C64X_FUNIT_NO:
            printf("No Functional Unit\n");
            break;
        default:
            printf("Unknown (Unit %u, Side %u)\n", tms320c64x->funit.unit, tms320c64x->funit.side);
            break;
    }
    if(tms320c64x->funit.crosspath == 1)
        printf("\tCrosspath: 1\n");
 
    if(tms320c64x->condition.reg != TMS320C64X_REG_INVALID)
        printf("\tCondition: [%c%s]\n", (tms320c64x->condition.zero == 1) ? '!' : ' ', cs_reg_name(handle, tms320c64x->condition.reg));
    printf("\tParallel: %s\n", (tms320c64x->parallel == 1) ? "true" : "false");
 
    printf("\n");
}

References cs_tms320c64x::condition, cs_tms320c64x::crosspath, cs_reg_name(), cs_tms320c64x::funit, handle, i, NULL, cs_tms320c64x::op_count, cs_tms320c64x::operands, cs_tms320c64x::parallel, printf(), cs_tms320c64x::reg, cs_tms320c64x::side, TMS320C64X_FUNIT_D, TMS320C64X_FUNIT_L, TMS320C64X_FUNIT_M, TMS320C64X_FUNIT_NO, TMS320C64X_FUNIT_S, TMS320C64X_MEM_DIR_BW, TMS320C64X_MEM_DIR_FW, TMS320C64X_MEM_DIR_INVALID, TMS320C64X_MEM_DISP_CONSTANT, TMS320C64X_MEM_DISP_INVALID, TMS320C64X_MEM_DISP_REGISTER, TMS320C64X_MEM_MOD_INVALID, TMS320C64X_MEM_MOD_NO, TMS320C64X_MEM_MOD_POST, TMS320C64X_MEM_MOD_PRE, TMS320C64X_OP_IMM, TMS320C64X_OP_MEM, TMS320C64X_OP_REG, TMS320C64X_OP_REGPAIR, TMS320C64X_REG_INVALID, cs_tms320c64x::unit, and cs_tms320c64x::zero.

Referenced by print_details().

print_insn_detail_x86()

void print_insn_detail_x86	(	csh	ud,
		cs_mode	mode,
		cs_insn *	ins
	)

Definition at line 180 of file cstool_x86.c.

{
    int count, i;
    cs_x86 *x86;
    cs_regs regs_read, regs_write;
    uint8_t regs_read_count, regs_write_count;
    
    // detail can be NULL on "data" instruction if SKIPDATA option is turned ON
    if (ins->detail == NULL)
        return;
 
    x86 = &(ins->detail->x86);
 
    print_string_hex("\tPrefix:", x86->prefix, 4);
    print_string_hex("\tOpcode:", x86->opcode, 4);
    printf("\trex: 0x%x\n", x86->rex);
    printf("\taddr_size: %u\n", x86->addr_size);
    printf("\tmodrm: 0x%x\n", x86->modrm);
    printf("\tdisp: 0x%" PRIx64 "\n", x86->disp);
 
    // SIB is not available in 16-bit mode
    if ((mode & CS_MODE_16) == 0) {
        printf("\tsib: 0x%x\n", x86->sib);
        if (x86->sib_base != X86_REG_INVALID)
            printf("\t\tsib_base: %s\n", cs_reg_name(ud, x86->sib_base));
        if (x86->sib_index != X86_REG_INVALID)
            printf("\t\tsib_index: %s\n", cs_reg_name(ud, x86->sib_index));
        if (x86->sib_scale != 0)
            printf("\t\tsib_scale: %d\n", x86->sib_scale);
    }
 
    // XOP code condition
    if (x86->xop_cc != X86_XOP_CC_INVALID) {
        printf("\txop_cc: %u\n", x86->xop_cc);
    }
 
    // SSE code condition
    if (x86->sse_cc != X86_SSE_CC_INVALID) {
        printf("\tsse_cc: %u\n", x86->sse_cc);
    }
 
    // AVX code condition
    if (x86->avx_cc != X86_AVX_CC_INVALID) {
        printf("\tavx_cc: %u\n", x86->avx_cc);
    }
 
    // AVX Suppress All Exception
    if (x86->avx_sae) {
        printf("\tavx_sae: %u\n", x86->avx_sae);
    }
 
    // AVX Rounding Mode
    if (x86->avx_rm != X86_AVX_RM_INVALID) {
        printf("\tavx_rm: %u\n", x86->avx_rm);
    }
 
    // Print out all immediate operands
    count = cs_op_count(ud, ins, X86_OP_IMM);
    if (count > 0) {
        printf("\timm_count: %u\n", count);
        for (i = 1; i < count + 1; i++) {
            int index = cs_op_index(ud, ins, X86_OP_IMM, i);
            printf("\t\timms[%u]: 0x%" PRIx64 "\n", i, x86->operands[index].imm);
        }
    }
 
    if (x86->op_count)
        printf("\top_count: %u\n", x86->op_count);
 
    // Print out all operands
    for (i = 0; i < x86->op_count; i++) {
        cs_x86_op *op = &(x86->operands[i]);
 
        switch((int)op->type) {
            case X86_OP_REG:
                printf("\t\toperands[%u].type: REG = %s\n", i, cs_reg_name(ud, op->reg));
                break;
            case X86_OP_IMM:
                printf("\t\toperands[%u].type: IMM = 0x%" PRIx64 "\n", i, op->imm);
                break;
            case X86_OP_MEM:
                printf("\t\toperands[%u].type: MEM\n", i);
                if (op->mem.segment != X86_REG_INVALID)
                    printf("\t\t\toperands[%u].mem.segment: REG = %s\n", i, cs_reg_name(ud, op->mem.segment));
                if (op->mem.base != X86_REG_INVALID)
                    printf("\t\t\toperands[%u].mem.base: REG = %s\n", i, cs_reg_name(ud, op->mem.base));
                if (op->mem.index != X86_REG_INVALID)
                    printf("\t\t\toperands[%u].mem.index: REG = %s\n", i, cs_reg_name(ud, op->mem.index));
                if (op->mem.scale != 1)
                    printf("\t\t\toperands[%u].mem.scale: %u\n", i, op->mem.scale);
                if (op->mem.disp != 0)
                    printf("\t\t\toperands[%u].mem.disp: 0x%" PRIx64 "\n", i, op->mem.disp);
                break;
            default:
                break;
        }
 
        // AVX broadcast type
        if (op->avx_bcast != X86_AVX_BCAST_INVALID)
            printf("\t\toperands[%u].avx_bcast: %u\n", i, op->avx_bcast);
 
        // AVX zero opmask {z}
        if (op->avx_zero_opmask != false)
            printf("\t\toperands[%u].avx_zero_opmask: TRUE\n", i);
 
        printf("\t\toperands[%u].size: %u\n", i, op->size);
 
        switch(op->access) {
            default:
                break;
            case CS_AC_READ:
                printf("\t\toperands[%u].access: READ\n", i);
                break;
            case CS_AC_WRITE:
                printf("\t\toperands[%u].access: WRITE\n", i);
                break;
            case CS_AC_READ | CS_AC_WRITE:
                printf("\t\toperands[%u].access: READ | WRITE\n", i);
                break;
        }
    }
 
    // Print out all registers accessed by this instruction (either implicit or explicit)
    if (!cs_regs_access(ud, ins,
                        regs_read, &regs_read_count,
                        regs_write, &regs_write_count)) {
        if (regs_read_count) {
            printf("\tRegisters read:");
            for(i = 0; i < regs_read_count; i++) {
                printf(" %s", cs_reg_name(ud, regs_read[i]));
            }
            printf("\n");
        }
 
        if (regs_write_count) {
            printf("\tRegisters modified:");
            for(i = 0; i < regs_write_count; i++) {
                printf(" %s", cs_reg_name(ud, regs_write[i]));
            }
            printf("\n");
        }
    }
 
    if (x86->eflags || x86->fpu_flags) {
        for(i = 0; i < ins->detail->groups_count; i++) {
            if (ins->detail->groups[i] == X86_GRP_FPU) {
                printf("\tFPU_FLAGS:");
                for(i = 0; i <= 63; i++)
                    if (x86->fpu_flags & ((uint64_t)1 << i)) {
                        printf(" %s", get_fpu_flag_name((uint64_t)1 << i));
                    }
                printf("\n");
                break;
            }
        }
 
        if (i == ins->detail->groups_count) {
            printf("\tEFLAGS:");
            for(i = 0; i <= 63; i++)
                if (x86->eflags & ((uint64_t)1 << i)) {
                    printf(" %s", get_eflag_name((uint64_t)1 << i));
                }
            printf("\n");
        }
    }
}

References count, CS_AC_READ, CS_AC_WRITE, CS_MODE_16, cs_op_count(), cs_op_index(), cs_reg_name(), cs_regs_access(), get_eflag_name(), get_fpu_flag_name(), i, NULL, print_string_hex(), printf(), PRIx64, X86_AVX_BCAST_INVALID, X86_AVX_CC_INVALID, X86_AVX_RM_INVALID, X86_GRP_FPU, X86_OP_IMM, X86_OP_MEM, X86_OP_REG, X86_REG_INVALID, X86_SSE_CC_INVALID, and X86_XOP_CC_INVALID.

Referenced by print_details().

print_insn_detail_xcore()

void print_insn_detail_xcore	(	csh	handle,
		cs_insn *	ins
	)

Definition at line 9 of file cstool_xcore.c.

{
    cs_xcore *xcore;
    int i;
 
    // detail can be NULL on "data" instruction if SKIPDATA option is turned ON
    if (ins->detail == NULL)
        return;
 
    xcore = &(ins->detail->xcore);
    if (xcore->op_count)
        printf("\top_count: %u\n", xcore->op_count);
 
    for (i = 0; i < xcore->op_count; i++) {
        cs_xcore_op *op = &(xcore->operands[i]);
        switch((int)op->type) {
            default:
                break;
            case XCORE_OP_REG:
                printf("\t\toperands[%u].type: REG = %s\n", i, cs_reg_name(handle, op->reg));
                break;
            case XCORE_OP_IMM:
                printf("\t\toperands[%u].type: IMM = 0x%x\n", i, op->imm);
                break;
            case XCORE_OP_MEM:
                printf("\t\toperands[%u].type: MEM\n", i);
                if (op->mem.base != XCORE_REG_INVALID)
                    printf("\t\t\toperands[%u].mem.base: REG = %s\n",
                            i, cs_reg_name(handle, op->mem.base));
                if (op->mem.index != XCORE_REG_INVALID)
                    printf("\t\t\toperands[%u].mem.index: REG = %s\n",
                            i, cs_reg_name(handle, op->mem.index));
                if (op->mem.disp != 0)
                    printf("\t\t\toperands[%u].mem.disp: 0x%x\n", i, op->mem.disp);
                if (op->mem.direct != 1)
                    printf("\t\t\toperands[%u].mem.direct: -1\n", i);
 
 
                break;
        }
    }
 
    printf("\n");
}

References cs_reg_name(), handle, i, NULL, printf(), XCORE_OP_IMM, XCORE_OP_MEM, XCORE_OP_REG, and XCORE_REG_INVALID.

Referenced by print_details().

print_string_hex()

void print_string_hex	(	const char *	comment,
		unsigned char *	str,
		size_t	len
	)

Definition at line 91 of file cstool.c.

{
    unsigned char *c;
 
    printf("%s", comment);
    for (c = str; c < str + len; c++) {
        printf("0x%02x ", *c & 0xff);
    }
 
    printf("\n");
}

References c, len, printf(), and cmd_descs_generate::str.

Referenced by test_x86::print_insn_detail(), and print_insn_detail_x86().

usage()

static void usage ( char *  prog )

static

Definition at line 147 of file cstool.c.

{
    printf("Cstool for Capstone Disassembler Engine v%u.%u.%u\n\n", CS_VERSION_MAJOR, CS_VERSION_MINOR, CS_VERSION_EXTRA);
    printf("Syntax: %s [-d|-s|-u|-v] <arch+mode> <assembly-hexstring> [start-address-in-hex-format]\n", prog);
    printf("\nThe following <arch+mode> options are supported:\n");
 
    if (cs_support(CS_ARCH_X86)) {
        printf("        x16:        16-bit mode (X86)\n");
        printf("        x32:        32-bit mode (X86)\n");
        printf("        x64:        64-bit mode (X86)\n");
        printf("        x16att:     16-bit mode (X86) syntax-att\n");
        printf("        x32att:     32-bit mode (X86) syntax-att\n");
        printf("        x64att:     64-bit mode (X86) syntax-att\n");
    }
 
    if (cs_support(CS_ARCH_ARM)) {
        printf("        arm:        arm\n");
        printf("        armbe:      arm + big endian\n");
        printf("        thumb:      thumb mode\n");
        printf("        thumbbe:    thumb + big endian\n");
        printf("        cortexm:    thumb + cortex-m extensions\n");
        printf("        armv8:      arm v8\n");
        printf("        thumbv8:    thumb v8\n");
    }
 
    if (cs_support(CS_ARCH_ARM64)) {
        printf("        arm64:      aarch64 mode\n");
        printf("        arm64be:    aarch64 + big endian\n");
    }
 
    if (cs_support(CS_ARCH_MIPS)) {
        printf("        mips:       mips32 + little endian\n");
        printf("        mipsbe:     mips32 + big endian\n");
        printf("        mips64:     mips64 + little endian\n");
        printf("        mips64be:   mips64 + big endian\n");
    }
 
    if (cs_support(CS_ARCH_PPC)) {
        printf("        ppc32:      ppc32 + little endian\n");
        printf("        ppc32be:    ppc32 + big endian\n");
        printf("        ppc32qpx:   ppc32 + qpx + little endian\n");
        printf("        ppc32beqpx: ppc32 + qpx + big endian\n");
        printf("        ppc64:      ppc64 + little endian\n");
        printf("        ppc64be:    ppc64 + big endian\n");
        printf("        ppc64qpx:   ppc64 + qpx + little endian\n");
        printf("        ppc64beqpx: ppc64 + qpx + big endian\n");
    }
 
    if (cs_support(CS_ARCH_SPARC)) {
        printf("        sparc:      sparc\n");
    }
 
    if (cs_support(CS_ARCH_SYSZ)) {
        printf("        systemz:    systemz (s390x)\n");
    }
 
    if (cs_support(CS_ARCH_XCORE)) {
        printf("        xcore:      xcore\n");
    }
 
    if (cs_support(CS_ARCH_M68K)) {
        printf("        m68k:       m68k + big endian\n");
        printf("        m68k40:     m68k_040\n");
    }
 
    if (cs_support(CS_ARCH_TMS320C64X)) {
        printf("        tms320c64x: TMS320C64x\n");
    }
 
    if (cs_support(CS_ARCH_M680X)) {
        printf("        m6800:      M6800/2\n");
        printf("        m6801:      M6801/3\n");
        printf("        m6805:      M6805\n");
        printf("        m6808:      M68HC08\n");
        printf("        m6809:      M6809\n");
        printf("        m6811:      M68HC11\n");
        printf("        cpu12:      M68HC12/HCS12\n");
        printf("        hd6301:     HD6301/3\n");
        printf("        hd6309:     HD6309\n");
        printf("        hcs08:      HCS08\n");
    }
 
    if (cs_support(CS_ARCH_EVM)) {
        printf("        evm:        Ethereum Virtual Machine\n");
    }
 
    printf("\nExtra options:\n");
    printf("        -d show detailed information of the instructions\n");
    printf("        -s decode in SKIPDATA mode\n");
    printf("        -u show immediates as unsigned\n");
    printf("        -v show version & Capstone core build info\n\n");
}

References CS_ARCH_ARM, CS_ARCH_ARM64, CS_ARCH_EVM, CS_ARCH_M680X, CS_ARCH_M68K, CS_ARCH_MIPS, CS_ARCH_PPC, CS_ARCH_SPARC, CS_ARCH_SYSZ, CS_ARCH_TMS320C64X, CS_ARCH_X86, CS_ARCH_XCORE, cs_support(), CS_VERSION_EXTRA, CS_VERSION_MAJOR, CS_VERSION_MINOR, printf(), and prog.

Referenced by main().

Variable Documentation

struct { ... } all_archs[]

Referenced by main().

arch

cs_arch arch

Definition at line 13 of file cstool.c.

Referenced by _cs_disasm(), _resolve_arch(), arch_destroys_dst(), arch_hint_acc_cb(), bs_open(), core_bin_file_print(), cpu_reload_needed(), create(), cs_fuzz_arch(), cs_open(), does_arch_destroys_dst(), ds_print_fcn_name(), ds_print_ptr(), entries(), extract(), extract_binobj(), gdbr_get_reg_profile(), gdbr_set_architecture(), get_cpu_mips(), get_dwarf_reg_name(), get_entrypoint(), info(), is_apple_target(), LLVMFuzzerTestOneInput(), main(), TestBasic::main(), ocaml_cs_disasm(), ocaml_cs_disasm_internal(), ocaml_open(), oneshot_buffer(), opiscall(), parse_asm_path(), print_arch_hint_cb(), print_assembly_output(), print_details(), rz_analysis_hint_get(), rz_analysis_hint_set_arch(), rz_analysis_hint_set_arch_handler(), rz_analysis_set_triplet(), rz_asm_setup(), rz_bin_arch_options_init(), rz_bin_file_find_by_arch_bits(), rz_bin_object_find_by_arch_bits(), rz_bin_pe_get_arch(), rz_bin_pe_is_big_endian(), rz_bin_select(), rz_bin_select_object(), rz_bin_te_get_arch(), rz_bin_use_arch(), rz_coff_supported_arch(), rz_core_analysis_esil(), rz_core_analysis_hint_print(), rz_core_analysis_search(), rz_core_analysis_sigdb_apply(), rz_core_arch_bits_at(), rz_core_asm_plugins_print(), rz_core_bin_apply_all_info(), rz_core_bin_load(), rz_core_bin_set_arch_bits(), rz_core_bin_update_arch_bits(), rz_core_egg_setup(), rz_core_flirt_arch_from_id(), rz_core_flirt_arch_from_name(), rz_core_rtr_gdb_run(), rz_core_search_rop(), rz_core_seek_arch_bits(), rz_core_set_asm_configs(), rz_debug_gdb_attach(), rz_debug_gdb_reg_profile(), rz_debug_qnx_attach(), rz_debug_qnx_reg_profile(), rz_debug_set_arch(), rz_egg_Cfile_armOrMips(), rz_egg_Cfile_parser(), rz_egg_Cfile_set_cEnv(), rz_egg_load_file(), rz_egg_setup(), rz_flirt_scan_handler(), rz_main_rz_asm(), rz_main_rz_bin(), rz_main_rz_gg(), rz_open_arch_bits_handler(), rz_platform_profiles_init(), rz_platform_target_index_init(), rz_sys_arch_id(), rz_sys_arch_match(), rz_sys_arch_str(), rz_syscall_setup(), rz_sysreg_set_arch(), rz_test_load_asm_test_file(), rz_type_db_init(), sections(), set_tmp_arch(), setab(), symbols(), syscall_reload_needed(), sysregs_reload_needed(), test(), update_asmcpu_options(), and xtr_metadata_match().

mode

cs_mode mode

Definition at line 14 of file cstool.c.

Referenced by main().

name

const char* name

Definition at line 12 of file cstool.c.