cs_x86 Struct Reference

Instruction structure. More...

#include <x86.h>

Public Attributes
uint8_t	prefix [4]
uint8_t	opcode [4]
uint8_t	rex
	REX prefix: only a non-zero value is relevant for x86_64. More...
uint8_t	addr_size
	Address size, which can be overridden with above prefix[5]. More...
uint8_t	modrm
	ModR/M byte. More...
uint8_t	sib
	SIB value, or 0 when irrelevant. More...
int64_t	disp
	Displacement value, valid if encoding.disp_offset != 0. More...
x86_reg	sib_index
	SIB index register, or X86_REG_INVALID when irrelevant. More...
int8_t	sib_scale
	SIB scale, only applicable if sib_index is valid. More...
x86_reg	sib_base
	SIB base register, or X86_REG_INVALID when irrelevant. More...
x86_xop_cc	xop_cc
	XOP Code Condition. More...
x86_sse_cc	sse_cc
	SSE Code Condition. More...
x86_avx_cc	avx_cc
	AVX Code Condition. More...
bool	avx_sae
	AVX Suppress all Exception. More...
x86_avx_rm	avx_rm
	AVX static rounding mode. More...
union {
uint64_t   eflags
uint64_t   fpu_flags
};
uint8_t	op_count
cs_x86_op	operands [8]
	operands for this instruction. More...
cs_x86_encoding	encoding
	encoding information More...

Detailed Description

Instruction structure.

Definition at line 312 of file x86.h.

Member Data Documentation

union { ... }

addr_size

uint8_t cs_x86::addr_size

Address size, which can be overridden with above prefix[5].

Definition at line 331 of file x86.h.

Referenced by capstone.CsInsn::__gen_detail().

avx_cc

x86_avx_cc cs_x86::avx_cc

AVX Code Condition.

Definition at line 356 of file x86.h.

Referenced by capstone.CsInsn::__gen_detail().

avx_rm

x86_avx_rm cs_x86::avx_rm

AVX static rounding mode.

Definition at line 362 of file x86.h.

Referenced by capstone.CsInsn::__gen_detail().

avx_sae

bool cs_x86::avx_sae

AVX Suppress all Exception.

Definition at line 359 of file x86.h.

Referenced by capstone.CsInsn::__gen_detail().

disp

int64_t cs_x86::disp

Displacement value, valid if encoding.disp_offset != 0.

Definition at line 340 of file x86.h.

Referenced by capstone.CsInsn::__gen_detail().

eflags

uint64_t cs_x86::eflags

EFLAGS updated by this instruction. This can be formed from OR combination of X86_EFLAGS_* symbols in x86.h

Definition at line 368 of file x86.h.

Referenced by capstone.CsInsn::__gen_detail().

encoding

cs_x86_encoding cs_x86::encoding

encoding information

Definition at line 380 of file x86.h.

fpu_flags

uint64_t cs_x86::fpu_flags

FPU_FLAGS updated by this instruction. This can be formed from OR combination of X86_FPU_FLAGS_* symbols in x86.h

Definition at line 371 of file x86.h.

modrm

uint8_t cs_x86::modrm

ModR/M byte.

Definition at line 334 of file x86.h.

Referenced by capstone.CsInsn::__gen_detail().

op_count

uint8_t cs_x86::op_count

Number of operands of this instruction, or 0 when instruction has no operand.

Definition at line 376 of file x86.h.

opcode

uint8_t cs_x86::opcode[4]

Instruction opcode, which can be from 1 to 4 bytes in size. This contains VEX opcode as well. An trailing opcode byte gets value 0 when irrelevant.

Definition at line 325 of file x86.h.

Referenced by capstone.CsInsn::__gen_detail().

operands

cs_x86_op cs_x86::operands[8]

operands for this instruction.

Definition at line 378 of file x86.h.

Referenced by capstone.CsInsn::__gen_detail(), capstone.CsInsn::op_count(), and capstone.CsInsn::op_find().

prefix

uint8_t cs_x86::prefix[4]

Instruction prefix, which can be up to 4 bytes. A prefix byte gets value 0 when irrelevant. prefix[0] indicates REP/REPNE/LOCK prefix (See X86_PREFIX_REP/REPNE/LOCK above) prefix[1] indicates segment override (irrelevant for x86_64): See X86_PREFIX_CS/SS/DS/ES/FS/GS above. prefix[2] indicates operand-size override (X86_PREFIX_OPSIZE) prefix[3] indicates address-size override (X86_PREFIX_ADDRSIZE)

Definition at line 320 of file x86.h.

Referenced by capstone.CsInsn::__gen_detail().

rex

uint8_t cs_x86::rex

REX prefix: only a non-zero value is relevant for x86_64.

Definition at line 328 of file x86.h.

Referenced by capstone.CsInsn::__gen_detail().

sib

uint8_t cs_x86::sib

SIB value, or 0 when irrelevant.

Definition at line 337 of file x86.h.

Referenced by capstone.CsInsn::__gen_detail().

sib_base

x86_reg cs_x86::sib_base

SIB base register, or X86_REG_INVALID when irrelevant.

Definition at line 347 of file x86.h.

Referenced by capstone.CsInsn::__gen_detail().

sib_index

x86_reg cs_x86::sib_index

SIB index register, or X86_REG_INVALID when irrelevant.

Definition at line 343 of file x86.h.

Referenced by capstone.CsInsn::__gen_detail().

sib_scale

int8_t cs_x86::sib_scale

SIB scale, only applicable if sib_index is valid.

Definition at line 345 of file x86.h.

Referenced by capstone.CsInsn::__gen_detail().

sse_cc

x86_sse_cc cs_x86::sse_cc

SSE Code Condition.

Definition at line 353 of file x86.h.

Referenced by capstone.CsInsn::__gen_detail().

xop_cc

x86_xop_cc cs_x86::xop_cc

XOP Code Condition.

Definition at line 350 of file x86.h.

Referenced by capstone.CsInsn::__gen_detail().

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The documentation for this struct was generated from the following file:

• subprojects/capstone-bundled/include/capstone/x86.h