7 #include <capstone/platform.h>
8 #include <capstone/capstone.h>
37 cs_regs regs_read, regs_write;
38 uint8_t regs_read_count, regs_write_count;
41 if (ins->detail ==
NULL)
44 arm = &(ins->detail->arm);
47 printf(
"\top_count: %u\n",
arm->op_count);
49 for (
i = 0;
i <
arm->op_count;
i++) {
51 switch((
int)
op->type) {
58 printf(
"\t\toperands[%u].type: IMM = 0x%x\n",
i,
op->imm);
61 #if defined(_KERNEL_MODE)
63 printf(
"\t\toperands[%u].type: FP = <float_point_unsupported>\n",
i);
65 printf(
"\t\toperands[%u].type: FP = %f\n",
i,
op->fp);
69 printf(
"\t\toperands[%u].type: MEM\n",
i);
71 printf(
"\t\t\toperands[%u].mem.base: REG = %s\n",
74 printf(
"\t\t\toperands[%u].mem.index: REG = %s\n",
76 if (
op->mem.scale != 1)
77 printf(
"\t\t\toperands[%u].mem.scale: %u\n",
i,
op->mem.scale);
78 if (
op->mem.disp != 0)
79 printf(
"\t\t\toperands[%u].mem.disp: 0x%x\n",
i,
op->mem.disp);
80 if (
op->mem.lshift != 0)
81 printf(
"\t\t\toperands[%u].mem.lshift: 0x%x\n",
i,
op->mem.lshift);
85 printf(
"\t\toperands[%u].type: P-IMM = %u\n",
i,
op->imm);
88 printf(
"\t\toperands[%u].type: C-IMM = %u\n",
i,
op->imm);
94 printf(
"\t\toperands[%u].type: SYSREG = %u\n",
i,
op->reg);
98 if (
op->neon_lane != -1) {
99 printf(
"\t\toperands[%u].neon_lane = %u\n",
i,
op->neon_lane);
106 printf(
"\t\toperands[%u].access: READ\n",
i);
109 printf(
"\t\toperands[%u].access: WRITE\n",
i);
112 printf(
"\t\toperands[%u].access: READ | WRITE\n",
i);
119 printf(
"\t\t\tShift: %u = %u\n",
op->shift.type,
op->shift.value);
122 printf(
"\t\t\tShift: %u = %s\n",
op->shift.type,
126 if (
op->vector_index != -1) {
127 printf(
"\t\toperands[%u].vector_index = %u\n",
i,
op->vector_index);
131 printf(
"\t\tSubtracted: True\n");
135 printf(
"\tCode condition: %u\n",
arm->cc);
137 if (
arm->update_flags)
138 printf(
"\tUpdate-flags: True\n");
141 printf(
"\tWrite-back: True\n");
144 printf(
"\tCPSI-mode: %u\n",
arm->cps_mode);
147 printf(
"\tCPSI-flag: %u\n",
arm->cps_flag);
149 if (
arm->vector_data)
150 printf(
"\tVector-data: %u\n",
arm->vector_data);
152 if (
arm->vector_size)
153 printf(
"\tVector-size: %u\n",
arm->vector_size);
156 printf(
"\tUser-mode: True\n");
158 if (
arm->mem_barrier)
159 printf(
"\tMemory-barrier: %u\n",
arm->mem_barrier);
163 regs_read, ®s_read_count,
164 regs_write, ®s_write_count)) {
165 if (regs_read_count) {
166 printf(
"\tRegisters read:");
167 for(
i = 0;
i < regs_read_count;
i++) {
173 if (regs_write_count) {
174 printf(
"\tRegisters modified:");
175 for(
i = 0;
i < regs_write_count;
i++) {
187 #define ARM_CODE "\x86\x48\x60\xf4\x4d\x0f\xe2\xf4\xED\xFF\xFF\xEB\x04\xe0\x2d\xe5\x00\x00\x00\x00\xe0\x83\x22\xe5\xf1\x02\x03\x0e\x00\x00\xa0\xe3\x02\x30\xc1\xe7\x00\x00\x53\xe3\x00\x02\x01\xf1\x05\x40\xd0\xe8\xf4\x80\x00\x00"
188 #define ARM_CODE2 "\xd1\xe8\x00\xf0\xf0\x24\x04\x07\x1f\x3c\xf2\xc0\x00\x00\x4f\xf0\x00\x01\x46\x6c"
189 #define THUMB_CODE "\x60\xf9\x1f\x04\xe0\xf9\x4f\x07\x70\x47\x00\xf0\x10\xe8\xeb\x46\x83\xb0\xc9\x68\x1f\xb1\x30\xbf\xaf\xf3\x20\x84\x52\xf8\x23\xf0"
190 #define THUMB_CODE2 "\x4f\xf0\x00\x01\xbd\xe8\x00\x88\xd1\xe8\x00\xf0\x18\xbf\xad\xbf\xf3\xff\x0b\x0c\x86\xf3\x00\x89\x80\xf3\x00\x8c\x4f\xfa\x99\xf6\xd0\xff\xa2\x01"
191 #define THUMB_MCLASS "\xef\xf3\x02\x80"
192 #define ARMV8 "\xe0\x3b\xb2\xee\x42\x00\x01\xe1\x51\xf0\x7f\xf5"
221 "Thumb-2 & register named with numbers",
234 (
unsigned char*)
ARMV8,
248 printf(
"Failed on cs_open() with error returned: %u\n",
err);
260 printf(
"****************\n");
265 for (j = 0; j <
count; j++) {
274 printf(
"****************\n");
277 printf(
"ERROR: Failed to disasm given code!\n");
@ ARM_SFT_ASR_REG
shift with register
@ ARM_SETEND_BE
BE operand.
@ ARM_OP_IMM
= CS_OP_IMM (Immediate operand).
@ ARM_OP_REG
= CS_OP_REG (Register operand).
@ ARM_OP_CIMM
C-Immediate (coprocessor registers)
@ ARM_OP_SETEND
operand for SETEND instruction
@ ARM_OP_PIMM
P-Immediate (coprocessor registers)
@ ARM_OP_MEM
= CS_OP_MEM (Memory operand).
@ ARM_OP_FP
= CS_OP_FP (Floating-Point operand).
@ ARM_OP_SYSREG
MSR/MRS special register operand.
@ ARM_CC_AL
Always (unconditional) Always (unconditional)
cs_arch
Architecture type.
@ CS_ARCH_ARM
ARM architecture (including Thumb, Thumb-2)
@ CS_MODE_MCLASS
ARM's Cortex-M series.
@ CS_MODE_V8
ARMv8 A32 encodings for ARM.
@ CS_MODE_THUMB
ARM's Thumb mode, including Thumb-2.
@ CS_OPT_DETAIL
Break down instruction structure into details.
@ CS_OPT_SYNTAX
Assembly output syntax.
@ CS_OPT_SYNTAX_NOREGNAME
Prints register name with only number (CS_OPT_SYNTAX)
@ CS_OPT_ON
Turn ON an option (CS_OPT_DETAIL, CS_OPT_SKIPDATA).
@ CS_AC_READ
Operand read from memory or register.
@ CS_AC_WRITE
Operand write to memory or register.
CAPSTONE_EXPORT cs_err CAPSTONE_API cs_regs_access(csh ud, const cs_insn *insn, cs_regs regs_read, uint8_t *regs_read_count, cs_regs regs_write, uint8_t *regs_write_count)
CAPSTONE_EXPORT size_t CAPSTONE_API cs_disasm(csh ud, const uint8_t *buffer, size_t size, uint64_t offset, size_t count, cs_insn **insn)
CAPSTONE_EXPORT cs_err CAPSTONE_API cs_open(cs_arch arch, cs_mode mode, csh *handle)
CAPSTONE_EXPORT void CAPSTONE_API cs_free(cs_insn *insn, size_t count)
CAPSTONE_EXPORT const char *CAPSTONE_API cs_reg_name(csh ud, unsigned int reg)
CAPSTONE_EXPORT cs_err CAPSTONE_API cs_close(csh *handle)
CAPSTONE_EXPORT cs_err CAPSTONE_API cs_option(csh ud, cs_opt_type type, size_t value)
_Use_decl_annotations_ int __cdecl printf(const char *const _Format,...)
static static sync static getppid static getegid const char static filename char static len const char char static bufsiz static mask static vfork const void static prot static getpgrp const char static swapflags static arg static fd static protocol static who struct sockaddr static addrlen static backlog struct timeval struct timezone static tz const struct iovec static count static mode const void const struct sockaddr static tolen const char static pathname void count
struct platform platforms[]
static void print_string_hex(const char *comment, unsigned char *str, size_t len)
static void print_insn_detail(csh cs_handle, cs_insn *ins)