assembler.h File Reference

#include "common.h"
#include "disassembler.h"

Go to the source code of this file.

Functions
RZ_IPI ut16	sh_assembler (RZ_NONNULL const char *buffer, ut64 pc, RZ_NULLABLE bool *success)
	Assemble instruction from SuperH-4 ISA FPU instructions not implemented yet. More...

Function Documentation

sh_assembler()

RZ_IPI ut16 sh_assembler	(	RZ_NONNULL const char *	buffer,
		ut64	pc,
		RZ_NULLABLE bool *	success
	)

Assemble instruction from SuperH-4 ISA FPU instructions not implemented yet.

Parameters

buffer	Instruction string buffer
pc	Current value of program counter
success	Store bool whether the assembler succeeded or not (RZ_NULLABLE)

Returns

ut16 Opcode for the given instruction

Definition at line 402 of file assembler.c.

                                                                                            {
    rz_return_val_if_fail(buffer, -1);
    if (success) {
        *success = true;
    }
 
    char *mnem = NULL;
    ut16 opcode = 0;
    char *spaced = sh_op_space_params(buffer);
    RzList *tokens = rz_str_split_duplist(spaced, " ", true);
    free(spaced);
    if (!tokens) {
        goto bye;
    }
    RzListIter *itr, *tmp;
    char *tok;
    rz_list_foreach_safe (tokens, itr, tmp, tok) {
        if (rz_str_is_whitespace(tok)) {
            rz_list_delete(tokens, itr);
        }
    }
    ut32 token_num = rz_list_length(tokens);
    if (token_num == 0 || token_num > 3) {
        RZ_LOG_ERROR("SuperH: Invalid number of operands in the instruction\n")
        goto bye;
    }
 
    mnem = (char *)rz_list_pop_head(tokens);
    SHAddrHelper sham[2] = { { SH_ADDR_INVALID, SH_REG_IND_SIZE }, { SH_ADDR_INVALID, SH_REG_IND_SIZE } };
    ut8 j = 0;
    rz_list_foreach (tokens, itr, tok) {
        sham[j] = sh_op_get_addr_mode(tok);
        j++;
    }
 
    for (ut16 i = 0; i < OPCODE_NUM; i++) {
        if (!sh_op_compare(sh_op_lookup[i], mnem, sham)) {
            continue;
        }
 
        SHOpRaw raw = sh_op_lookup[i];
        opcode = raw.opcode ^ raw.mask;
        /* Now opcode only has the bits corresponding to the instruction
        The bits corresponding to the operands are supposed to be calculated */
 
        // check for "weird" MOVL
        if (raw.opcode == MOVL) {
            char *reg_direct = rz_list_pop_head(tokens);
            char *reg_disp_indirect = rz_list_pop_head(tokens);
 
            opcode |= sh_op_movl_param_bits(reg_direct, reg_disp_indirect);
 
            free(reg_direct);
            free(reg_disp_indirect);
            goto return_opcode;
        }
 
        RzListIter *itr;
        char *param;
        j = 0;
        rz_list_foreach (tokens, itr, param) {
            opcode |= sh_op_param_bits(raw.param_builder[j], param, raw.scaling, pc);
            j++;
        }
 
    return_opcode:
        rz_list_free(tokens);
        free(mnem);
        return opcode;
    }
 
    RZ_LOG_ERROR("SuperH: Failed to assemble: \"%s\"\n", buffer);
 
bye:
    if (success) {
        success = false;
    }
    rz_list_free(tokens);
    free(mnem);
    return 0;
}

References bye(), free(), i, sh_op_raw_t::mask, mnem, MOVL, NULL, sh_op_raw_t::opcode, OPCODE_NUM, sh_op_raw_t::param_builder, pc, rz_list_delete(), rz_list_free(), rz_list_length(), rz_list_pop_head(), RZ_LOG_ERROR, rz_return_val_if_fail, rz_str_is_whitespace(), rz_str_split_duplist(), sh_op_raw_t::scaling, SH_ADDR_INVALID, sh_op_compare(), sh_op_get_addr_mode(), sh_op_lookup, sh_op_movl_param_bits(), sh_op_param_bits(), sh_op_space_params(), SH_REG_IND_SIZE, and autogen_x86imm::tmp.

Referenced by assemble().