8 #include "../arch/sh/disassembler.h"
9 #include "../arch/sh/assembler.h"
45 .desc =
"SuperH-4 CPU",
50 #ifndef RZ_PLUGIN_INCORE
RzAsmPlugin rz_asm_plugin_sh
static int assemble(RzAsm *a, RzAsmOp *ao, const char *str)
RZ_API RzLibStruct rizin_plugin
static int disassemble(RzAsm *a, RzAsmOp *op, const ut8 *buf, int len)
RZ_API void Ht_() free(HtName_(Ht) *ht)
static ut16 rz_read_ble16(const void *src, bool big_endian)
static void rz_write_ble16(void *dest, ut16 val, bool big_endian)
RZ_API const char * rz_strbuf_set(RzStrBuf *sb, const char *s)
RZ_API bool rz_strbuf_setbin(RzStrBuf *sb, const ut8 *s, size_t len)
#define RZ_SYS_ENDIAN_BIG
#define RZ_SYS_ENDIAN_LITTLE
RZ_IPI ut16 sh_assembler(RZ_NONNULL const char *buffer, ut64 pc, RZ_NULLABLE bool *success)
Assemble instruction from SuperH-4 ISA FPU instructions not implemented yet.
RZ_IPI RZ_OWN SHOp * sh_disassembler(ut16 opcode)
Disassemble opcode and return a SHOp.
RZ_IPI RZ_OWN char * sh_op_to_str(RZ_NONNULL const SHOp *op, ut64 pc)
Return string representation of disassembled op.