Rizin
unix-like reverse engineering framework and cli tools
analysis_v810.c
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1 // SPDX-FileCopyrightText: 2015 danielps
2 // SPDX-License-Identifier: LGPL-3.0-only
3 
4 #include <string.h>
5 #include <rz_types.h>
6 #include <rz_lib.h>
7 #include <rz_asm.h>
8 #include <rz_analysis.h>
9 #include <rz_util.h>
10 
11 #include <v810_disas.h>
12 
13 enum {
14  V810_FLAG_CY = 1,
15  V810_FLAG_OV = 2,
16  V810_FLAG_S = 4,
17  V810_FLAG_Z = 8,
18 };
19 
20 static void update_flags(RzAnalysisOp *op, int flags) {
21  if (flags & V810_FLAG_CY) {
22  rz_strbuf_append(&op->esil, ",31,$c,cy,:=");
23  }
24  if (flags & V810_FLAG_OV) {
25  rz_strbuf_append(&op->esil, ",31,$o,ov,:=");
26  }
27  if (flags & V810_FLAG_S) {
28  rz_strbuf_append(&op->esil, ",31,$s,s,:=");
29  }
30  if (flags & V810_FLAG_Z) {
31  rz_strbuf_append(&op->esil, ",$z,z,:=");
32  }
33 }
34 
35 static void clear_flags(RzAnalysisOp *op, int flags) {
36  if (flags & V810_FLAG_CY) {
37  rz_strbuf_append(&op->esil, ",0,cy,:=");
38  }
39  if (flags & V810_FLAG_OV) {
40  rz_strbuf_append(&op->esil, ",0,ov,:=");
41  }
42  if (flags & V810_FLAG_S) {
43  rz_strbuf_append(&op->esil, ",0,s,:=");
44  }
45  if (flags & V810_FLAG_Z) {
46  rz_strbuf_append(&op->esil, ",0,z,:=");
47  }
48 }
49 
50 static int v810_op(RzAnalysis *analysis, RzAnalysisOp *op, ut64 addr, const ut8 *buf, int len, RzAnalysisOpMask mask) {
51  int ret;
52  ut8 opcode, reg1, reg2, imm5, cond;
53  ut16 word1, word2 = 0;
54  st32 jumpdisp;
55  struct v810_cmd cmd;
56 
57  memset(&cmd, 0, sizeof(cmd));
58 
59  ret = op->size = v810_decode_command(buf, len, &cmd);
60  if (ret <= 0) {
61  return ret;
62  }
63 
64  word1 = rz_read_ble16(buf, analysis->big_endian);
65 
66  if (ret == 4) {
67  word2 = rz_read_ble16(buf + 2, analysis->big_endian);
68  }
69 
70  op->addr = addr;
71 
72  opcode = OPCODE(word1);
73  if (opcode >> 3 == 0x4) {
74  opcode &= 0x20;
75  }
76 
77  switch (opcode) {
78  case V810_MOV:
79  op->type = RZ_ANALYSIS_OP_TYPE_MOV;
80  rz_strbuf_appendf(&op->esil, "r%u,r%u,=",
81  REG1(word1), REG2(word1));
82  break;
83  case V810_MOV_IMM5:
84  op->type = RZ_ANALYSIS_OP_TYPE_MOV;
85  rz_strbuf_appendf(&op->esil, "%d,r%u,=",
86  (st8)SIGN_EXT_T5(IMM5(word1)), REG2(word1));
87  break;
88  case V810_MOVHI:
89  op->type = RZ_ANALYSIS_OP_TYPE_MOV;
90  rz_strbuf_appendf(&op->esil, "16,%hu,<<,r%u,+,r%u,=",
91  word2, REG1(word1), REG2(word1));
92  break;
93  case V810_MOVEA:
94  op->type = RZ_ANALYSIS_OP_TYPE_MOV;
95  rz_strbuf_appendf(&op->esil, "%hd,r%u,+,r%u,=",
96  word2, REG1(word1), REG2(word1));
97  break;
98  case V810_LDSR:
99  op->type = RZ_ANALYSIS_OP_TYPE_MOV;
100  break;
101  case V810_STSR:
102  op->type = RZ_ANALYSIS_OP_TYPE_MOV;
103  break;
104  case V810_NOT:
105  op->type = RZ_ANALYSIS_OP_TYPE_NOT;
106  rz_strbuf_appendf(&op->esil, "r%u,0xffffffff,^,r%u,=",
107  REG1(word1), REG2(word1));
108  update_flags(op, V810_FLAG_S | V810_FLAG_Z);
109  clear_flags(op, V810_FLAG_OV);
110  break;
111  case V810_DIV:
112  case V810_DIVU:
113  op->type = RZ_ANALYSIS_OP_TYPE_DIV;
114  rz_strbuf_appendf(&op->esil, "r%u,r%u,/=,r%u,r%u,%%,r30,=",
115  REG1(word1), REG2(word1),
116  REG1(word1), REG2(word1));
117  update_flags(op, V810_FLAG_OV | V810_FLAG_S | V810_FLAG_Z);
118  break;
119  case V810_JMP:
120  if (REG1(word1) == 31) {
121  op->type = RZ_ANALYSIS_OP_TYPE_RET;
122  } else {
123  op->type = RZ_ANALYSIS_OP_TYPE_UJMP;
124  }
125  rz_strbuf_appendf(&op->esil, "r%u,pc,=",
126  REG1(word1));
127  break;
128  case V810_OR:
129  op->type = RZ_ANALYSIS_OP_TYPE_OR;
130  rz_strbuf_appendf(&op->esil, "r%u,r%u,|=",
131  REG1(word1), REG2(word1));
132  update_flags(op, V810_FLAG_S | V810_FLAG_Z);
133  clear_flags(op, V810_FLAG_OV);
134  break;
135  case V810_ORI:
136  op->type = RZ_ANALYSIS_OP_TYPE_OR;
137  rz_strbuf_appendf(&op->esil, "%hu,r%u,|,r%u,=",
138  word2, REG1(word1), REG2(word1));
139  update_flags(op, V810_FLAG_S | V810_FLAG_Z);
140  clear_flags(op, V810_FLAG_OV);
141  break;
142  case V810_MUL:
143  case V810_MULU:
144  op->type = RZ_ANALYSIS_OP_TYPE_MUL;
145  rz_strbuf_appendf(&op->esil, "r%u,r%u,*=,32,r%u,r%u,*,>>,r30,=",
146  REG1(word1), REG2(word1),
147  REG1(word1), REG2(word1));
148  update_flags(op, V810_FLAG_OV | V810_FLAG_S | V810_FLAG_Z);
149  break;
150  case V810_XOR:
151  op->type = RZ_ANALYSIS_OP_TYPE_XOR;
152  rz_strbuf_appendf(&op->esil, "r%u,r%u,^=",
153  REG1(word1), REG2(word1));
154  update_flags(op, V810_FLAG_S | V810_FLAG_Z);
155  clear_flags(op, V810_FLAG_OV);
156  break;
157  case V810_XORI:
158  op->type = RZ_ANALYSIS_OP_TYPE_XOR;
159  rz_strbuf_appendf(&op->esil, "%hu,r%u,^,r%u,=",
160  word2, REG1(word1), REG2(word1));
161  update_flags(op, V810_FLAG_S | V810_FLAG_Z);
162  clear_flags(op, V810_FLAG_OV);
163  break;
164  case V810_AND:
165  op->type = RZ_ANALYSIS_OP_TYPE_AND;
166  rz_strbuf_appendf(&op->esil, "r%u,r%u,&=",
167  REG1(word1), REG2(word1));
168  update_flags(op, V810_FLAG_S | V810_FLAG_Z);
169  clear_flags(op, V810_FLAG_OV);
170  break;
171  case V810_ANDI:
172  op->type = RZ_ANALYSIS_OP_TYPE_AND;
173  rz_strbuf_appendf(&op->esil, "%hu,r%u,&,r%u,=",
174  word2, REG1(word1), REG2(word1));
175  update_flags(op, V810_FLAG_Z);
176  clear_flags(op, V810_FLAG_OV | V810_FLAG_S);
177  break;
178  case V810_CMP:
179  op->type = RZ_ANALYSIS_OP_TYPE_CMP;
180  rz_strbuf_appendf(&op->esil, "r%u,r%u,==",
181  REG1(word1), REG2(word1));
182  update_flags(op, -1);
183  break;
184  case V810_CMP_IMM5:
185  op->type = RZ_ANALYSIS_OP_TYPE_CMP;
186  rz_strbuf_appendf(&op->esil, "%d,r%u,==",
187  (st8)SIGN_EXT_T5(IMM5(word1)), REG2(word1));
188  update_flags(op, -1);
189  break;
190  case V810_SUB:
191  op->type = RZ_ANALYSIS_OP_TYPE_SUB;
192  rz_strbuf_appendf(&op->esil, "r%u,r%u,-=",
193  REG1(word1), REG2(word1));
194  update_flags(op, -1);
195  break;
196  case V810_ADD:
197  op->type = RZ_ANALYSIS_OP_TYPE_ADD;
198  rz_strbuf_appendf(&op->esil, "r%u,r%u,+=",
199  REG1(word1), REG2(word1));
200  update_flags(op, -1);
201  break;
202  case V810_ADDI:
203  op->type = RZ_ANALYSIS_OP_TYPE_ADD;
204  rz_strbuf_appendf(&op->esil, "%hd,r%u,+,r%u,=",
205  word2, REG1(word1), REG2(word1));
206  update_flags(op, -1);
207  break;
208  case V810_ADD_IMM5:
209  op->type = RZ_ANALYSIS_OP_TYPE_ADD;
210  rz_strbuf_appendf(&op->esil, "%d,r%u,+=",
211  (st8)SIGN_EXT_T5(IMM5(word1)), REG2(word1));
212  update_flags(op, -1);
213  break;
214  case V810_SHR:
215  op->type = RZ_ANALYSIS_OP_TYPE_SHR;
216  rz_strbuf_appendf(&op->esil, "r%u,r%u,>>=",
217  REG1(word1), REG2(word1));
218  update_flags(op, V810_FLAG_CY | V810_FLAG_S | V810_FLAG_Z);
219  clear_flags(op, V810_FLAG_OV);
220  break;
221  case V810_SHR_IMM5:
222  op->type = RZ_ANALYSIS_OP_TYPE_SHR;
223  rz_strbuf_appendf(&op->esil, "%u,r%u,>>=",
224  (ut8)IMM5(word1), REG2(word1));
225  update_flags(op, V810_FLAG_CY | V810_FLAG_S | V810_FLAG_Z);
226  clear_flags(op, V810_FLAG_OV);
227  break;
228  case V810_SAR:
229  op->type = RZ_ANALYSIS_OP_TYPE_SAR;
230  reg1 = REG1(word1);
231  reg2 = REG2(word1);
232  rz_strbuf_appendf(&op->esil, "31,r%u,>>,?{,r%u,32,-,r%u,1,<<,--,<<,}{,0,},r%u,r%u,>>,|,r%u,=",
233  reg2, reg1, reg1, reg1, reg2, reg2);
234  update_flags(op, V810_FLAG_CY | V810_FLAG_S | V810_FLAG_Z);
235  clear_flags(op, V810_FLAG_OV);
236  break;
237  case V810_SAR_IMM5:
238  op->type = RZ_ANALYSIS_OP_TYPE_SAR;
239  imm5 = IMM5(word1);
240  reg2 = REG2(word1);
241  rz_strbuf_appendf(&op->esil, "31,r%u,>>,?{,%u,32,-,%u,1,<<,--,<<,}{,0,},%u,r%u,>>,|,r%u,=",
242  reg2, (ut8)imm5, (ut8)imm5, (ut8)imm5, reg2, reg2);
243  update_flags(op, V810_FLAG_CY | V810_FLAG_S | V810_FLAG_Z);
244  clear_flags(op, V810_FLAG_OV);
245  break;
246  case V810_SHL:
247  op->type = RZ_ANALYSIS_OP_TYPE_SHL;
248  rz_strbuf_appendf(&op->esil, "r%u,r%u,<<=",
249  REG1(word1), REG2(word1));
250  update_flags(op, V810_FLAG_CY | V810_FLAG_S | V810_FLAG_Z);
251  clear_flags(op, V810_FLAG_OV);
252  break;
253  case V810_SHL_IMM5:
254  op->type = RZ_ANALYSIS_OP_TYPE_SHL;
255  rz_strbuf_appendf(&op->esil, "%u,r%u,<<=",
256  (ut8)IMM5(word1), REG2(word1));
257  update_flags(op, V810_FLAG_CY | V810_FLAG_S | V810_FLAG_Z);
258  clear_flags(op, V810_FLAG_OV);
259  break;
260  case V810_LDB:
261  op->type = RZ_ANALYSIS_OP_TYPE_LOAD;
262  rz_strbuf_appendf(&op->esil, "r%u,%hd,+,[1],r%u,=",
263  REG1(word1), word2, REG2(word1));
264  rz_strbuf_appendf(&op->esil, ",DUP,0x80,&,?{,0xffffff00,|,}");
265  break;
266  case V810_LDH:
267  op->type = RZ_ANALYSIS_OP_TYPE_LOAD;
268  rz_strbuf_appendf(&op->esil, "r%u,%hd,+,0xfffffffe,&,[2],r%u,=",
269  REG1(word1), word2, REG2(word1));
270  rz_strbuf_appendf(&op->esil, ",DUP,0x8000,&,?{,0xffffff00,|,}");
271  break;
272  case V810_LDW:
273  op->type = RZ_ANALYSIS_OP_TYPE_LOAD;
274  rz_strbuf_appendf(&op->esil, "r%u,%hd,+,0xfffffffc,&,[4],r%u,=",
275  REG1(word1), word2, REG2(word1));
276  rz_strbuf_appendf(&op->esil, ",DUP,0x80000000,&,?{,0xffffff00,|,}");
277  break;
278  case V810_STB:
279  op->type = RZ_ANALYSIS_OP_TYPE_STORE;
280  rz_strbuf_appendf(&op->esil, "r%u,r%u,%hd,+,=[1]",
281  REG2(word1), REG1(word1), word2);
282  break;
283  case V810_STH:
284  op->type = RZ_ANALYSIS_OP_TYPE_STORE;
285  rz_strbuf_appendf(&op->esil, "r%u,r%u,%hd,+,0xfffffffe,&,=[2]",
286  REG2(word1), REG1(word1), word2);
287  break;
288  case V810_STW:
289  op->type = RZ_ANALYSIS_OP_TYPE_STORE;
290  rz_strbuf_appendf(&op->esil, "r%u,r%u,%hd,+,=[4]",
291  REG2(word1), REG1(word1), word2);
292  break;
293  case V810_INB:
294  case V810_INH:
295  case V810_INW:
296  case V810_OUTB:
297  case V810_OUTH:
298  case V810_OUTW:
299  op->type = RZ_ANALYSIS_OP_TYPE_IO;
300  break;
301  case V810_TRAP:
302  op->type = RZ_ANALYSIS_OP_TYPE_TRAP;
303  rz_strbuf_appendf(&op->esil, "%u,TRAP", IMM5(word1));
304  break;
305  case V810_RETI:
306  op->type = RZ_ANALYSIS_OP_TYPE_RET;
307  // rz_strbuf_appendf (&op->esil, "np,?{,fepc,fepsw,}{,eipc,eipsw,},psw,=,pc,=");
308  break;
309  case V810_JAL:
310  case V810_JR:
311  jumpdisp = DISP26(word1, word2);
312  op->jump = addr + jumpdisp;
313  op->fail = addr + 4;
314 
315  if (opcode == V810_JAL) {
316  op->type = RZ_ANALYSIS_OP_TYPE_CALL;
317  rz_strbuf_appendf(&op->esil, "$$,4,+,r31,=,");
318  } else {
319  op->type = RZ_ANALYSIS_OP_TYPE_JMP;
320  }
321 
322  rz_strbuf_appendf(&op->esil, "$$,%d,+,pc,=", jumpdisp);
323  break;
324  case V810_BCOND:
325  cond = COND(word1);
326  if (cond == V810_COND_NOP) {
327  op->type = RZ_ANALYSIS_OP_TYPE_NOP;
328  break;
329  }
330 
331  jumpdisp = DISP9(word1);
332  op->jump = addr + jumpdisp;
333  op->fail = addr + 2;
334  op->type = RZ_ANALYSIS_OP_TYPE_CJMP;
335 
336  switch (cond) {
337  case V810_COND_V:
338  rz_strbuf_appendf(&op->esil, "ov");
339  break;
340  case V810_COND_L:
341  rz_strbuf_appendf(&op->esil, "cy");
342  break;
343  case V810_COND_E:
344  rz_strbuf_appendf(&op->esil, "z");
345  break;
346  case V810_COND_NH:
347  rz_strbuf_appendf(&op->esil, "cy,z,|");
348  break;
349  case V810_COND_N:
350  rz_strbuf_appendf(&op->esil, "s");
351  break;
352  case V810_COND_NONE:
353  rz_strbuf_appendf(&op->esil, "1");
354  break;
355  case V810_COND_LT:
356  rz_strbuf_appendf(&op->esil, "s,ov,^");
357  break;
358  case V810_COND_LE:
359  rz_strbuf_appendf(&op->esil, "s,ov,^,z,|");
360  break;
361  case V810_COND_NV:
362  rz_strbuf_appendf(&op->esil, "ov,!");
363  break;
364  case V810_COND_NL:
365  rz_strbuf_appendf(&op->esil, "cy,!");
366  break;
367  case V810_COND_NE:
368  rz_strbuf_appendf(&op->esil, "z,!");
369  break;
370  case V810_COND_H:
371  rz_strbuf_appendf(&op->esil, "cy,z,|,!");
372  break;
373  case V810_COND_P:
374  rz_strbuf_appendf(&op->esil, "s,!");
375  break;
376  case V810_COND_GE:
377  rz_strbuf_appendf(&op->esil, "s,ov,^,!");
378  break;
379  case V810_COND_GT:
380  rz_strbuf_appendf(&op->esil, "s,ov,^,z,|,!");
381  break;
382  }
383  rz_strbuf_appendf(&op->esil, ",?{,$$,%d,+,pc,=,}", jumpdisp);
384  break;
385  }
386 
387  return ret;
388 }
389 
390 static char *get_reg_profile(RzAnalysis *analysis) {
391  const char *p =
392  "=PC pc\n"
393  "=SP r3\n"
394  "=A0 r0\n"
395  "=ZF z\n"
396  "=SF s\n"
397  "=OF ov\n"
398  "=CF cy\n"
399 
400  "gpr r0 .32 0 0\n"
401  "gpr r1 .32 4 0\n"
402  "gpr r2 .32 8 0\n"
403  "gpr r3 .32 12 0\n"
404  "gpr r4 .32 16 0\n"
405  "gpr r5 .32 20 0\n"
406  "gpr r6 .32 24 0\n"
407  "gpr r7 .32 28 0\n"
408  "gpr r8 .32 32 0\n"
409  "gpr r9 .32 36 0\n"
410  "gpr r10 .32 40 0\n"
411  "gpr r11 .32 44 0\n"
412  "gpr r12 .32 48 0\n"
413  "gpr r13 .32 52 0\n"
414  "gpr r14 .32 56 0\n"
415  "gpr r15 .32 60 0\n"
416  "gpr r16 .32 64 0\n"
417  "gpr r17 .32 68 0\n"
418  "gpr r18 .32 72 0\n"
419  "gpr r19 .32 76 0\n"
420  "gpr r20 .32 80 0\n"
421  "gpr r21 .32 84 0\n"
422  "gpr r22 .32 88 0\n"
423  "gpr r23 .32 92 0\n"
424  "gpr r24 .32 96 0\n"
425  "gpr r25 .32 100 0\n"
426  "gpr r26 .32 104 0\n"
427  "gpr r27 .32 108 0\n"
428  "gpr r28 .32 112 0\n"
429  "gpr r29 .32 116 0\n"
430  "gpr r30 .32 120 0\n"
431  "gpr r31 .32 124 0\n"
432  "gpr pc .32 128 0\n"
433 
434  "gpr psw .32 132 0\n"
435  "gpr np .1 132.16 0\n"
436  "gpr ep .1 132.17 0\n"
437  "gpr ae .1 132.18 0\n"
438  "gpr id .1 132.19 0\n"
439  "flg cy .1 132.28 0\n"
440  "flg ov .1 132.29 0\n"
441  "flg s .1 132.30 0\n"
442  "flg z .1 132.31 0\n";
443 
444  return strdup(p);
445 }
446 
447 RzAnalysisPlugin rz_analysis_plugin_v810 = {
448  .name = "v810",
449  .desc = "V810 code analysis plugin",
450  .license = "LGPL3",
451  .arch = "v810",
452  .bits = 32,
453  .op = v810_op,
454  .esil = true,
455  .get_reg_profile = get_reg_profile,
456 };
457 
458 #ifndef RZ_PLUGIN_INCORE
459 RZ_API RzLibStruct rizin_plugin = {
460  .type = RZ_LIB_TYPE_ANALYSIS,
461  .data = &rz_analysis_plugin_v810,
462  .version = RZ_VERSION
463 };
464 #endif
len
size_t len
Definition: 6502dis.c:15
mask
#define mask()
Definition: analysis_h8300.c:39
update_flags
static void update_flags(RzAnalysisOp *op, int flags)
Definition: analysis_v810.c:20
get_reg_profile
static char * get_reg_profile(RzAnalysis *analysis)
Definition: analysis_v810.c:390
v810_op
static int v810_op(RzAnalysis *analysis, RzAnalysisOp *op, ut64 addr, const ut8 *buf, int len, RzAnalysisOpMask mask)
Definition: analysis_v810.c:50
rizin_plugin
RZ_API RzLibStruct rizin_plugin
Definition: analysis_v810.c:459
clear_flags
static void clear_flags(RzAnalysisOp *op, int flags)
Definition: analysis_v810.c:35
V810_FLAG_S
@ V810_FLAG_S
Definition: analysis_v810.c:16
V810_FLAG_CY
@ V810_FLAG_CY
Definition: analysis_v810.c:14
V810_FLAG_OV
@ V810_FLAG_OV
Definition: analysis_v810.c:15
V810_FLAG_Z
@ V810_FLAG_Z
Definition: analysis_v810.c:17
rz_analysis_plugin_v810
RzAnalysisPlugin rz_analysis_plugin_v810
Definition: analysis_v810.c:447
OPCODE
#define OPCODE(word)
Definition: arc-dis.c:66
COND
#define COND
RZ_API
#define RZ_API
Definition: core_plugin_example.c:36
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static static sync static getppid static getegid const char static filename char static len const char char static bufsiz static mask static vfork const void static prot static getpgrp const char static swapflags cmd
Definition: sflib.h:79
ut16
uint16_t ut16
Definition: demangler_util.h:30
buf
voidpf void * buf
Definition: ioapi.h:138
ut8
uint8_t ut8
Definition: lh5801.h:11
memset
return memset(p, 0, total)
p
void * p
Definition: libc.cpp:67
strdup
return strdup("=SP r13\n" "=LR r14\n" "=PC r15\n" "=A0 r0\n" "=A1 r1\n" "=A2 r2\n" "=A3 r3\n" "=ZF zf\n" "=SF nf\n" "=OF vf\n" "=CF cf\n" "=SN or0\n" "gpr lr .32 56 0\n" "gpr pc .32 60 0\n" "gpr cpsr .32 64 0 ____tfiae_________________qvczn\n" "gpr or0 .32 68 0\n" "gpr tf .1 64.5 0 thumb\n" "gpr ef .1 64.9 0 endian\n" "gpr jf .1 64.24 0 java\n" "gpr qf .1 64.27 0 sticky_overflow\n" "gpr vf .1 64.28 0 overflow\n" "gpr cf .1 64.29 0 carry\n" "gpr zf .1 64.30 0 zero\n" "gpr nf .1 64.31 0 negative\n" "gpr itc .4 64.10 0 if_then_count\n" "gpr gef .4 64.16 0 great_or_equal\n" "gpr r0 .32 0 0\n" "gpr r1 .32 4 0\n" "gpr r2 .32 8 0\n" "gpr r3 .32 12 0\n" "gpr r4 .32 16 0\n" "gpr r5 .32 20 0\n" "gpr r6 .32 24 0\n" "gpr r7 .32 28 0\n" "gpr r8 .32 32 0\n" "gpr r9 .32 36 0\n" "gpr r10 .32 40 0\n" "gpr r11 .32 44 0\n" "gpr r12 .32 48 0\n" "gpr r13 .32 52 0\n" "gpr r14 .32 56 0\n" "gpr r15 .32 60 0\n" "gpr r16 .32 64 0\n" "gpr r17 .32 68 0\n")
rz_analysis.h
RzAnalysisOpMask
RzAnalysisOpMask
Definition: rz_analysis.h:439
RZ_ANALYSIS_OP_TYPE_CMP
@ RZ_ANALYSIS_OP_TYPE_CMP
Definition: rz_analysis.h:399
RZ_ANALYSIS_OP_TYPE_SUB
@ RZ_ANALYSIS_OP_TYPE_SUB
Definition: rz_analysis.h:402
RZ_ANALYSIS_OP_TYPE_LOAD
@ RZ_ANALYSIS_OP_TYPE_LOAD
Definition: rz_analysis.h:416
RZ_ANALYSIS_OP_TYPE_MUL
@ RZ_ANALYSIS_OP_TYPE_MUL
Definition: rz_analysis.h:404
RZ_ANALYSIS_OP_TYPE_JMP
@ RZ_ANALYSIS_OP_TYPE_JMP
Definition: rz_analysis.h:368
RZ_ANALYSIS_OP_TYPE_AND
@ RZ_ANALYSIS_OP_TYPE_AND
Definition: rz_analysis.h:411
RZ_ANALYSIS_OP_TYPE_UJMP
@ RZ_ANALYSIS_OP_TYPE_UJMP
Definition: rz_analysis.h:369
RZ_ANALYSIS_OP_TYPE_IO
@ RZ_ANALYSIS_OP_TYPE_IO
Definition: rz_analysis.h:403
RZ_ANALYSIS_OP_TYPE_SAR
@ RZ_ANALYSIS_OP_TYPE_SAR
Definition: rz_analysis.h:409
RZ_ANALYSIS_OP_TYPE_TRAP
@ RZ_ANALYSIS_OP_TYPE_TRAP
Definition: rz_analysis.h:392
RZ_ANALYSIS_OP_TYPE_CALL
@ RZ_ANALYSIS_OP_TYPE_CALL
Definition: rz_analysis.h:378
RZ_ANALYSIS_OP_TYPE_ADD
@ RZ_ANALYSIS_OP_TYPE_ADD
Definition: rz_analysis.h:401
RZ_ANALYSIS_OP_TYPE_OR
@ RZ_ANALYSIS_OP_TYPE_OR
Definition: rz_analysis.h:410
RZ_ANALYSIS_OP_TYPE_STORE
@ RZ_ANALYSIS_OP_TYPE_STORE
Definition: rz_analysis.h:415
RZ_ANALYSIS_OP_TYPE_SHR
@ RZ_ANALYSIS_OP_TYPE_SHR
Definition: rz_analysis.h:406
RZ_ANALYSIS_OP_TYPE_CJMP
@ RZ_ANALYSIS_OP_TYPE_CJMP
Definition: rz_analysis.h:373
RZ_ANALYSIS_OP_TYPE_DIV
@ RZ_ANALYSIS_OP_TYPE_DIV
Definition: rz_analysis.h:405
RZ_ANALYSIS_OP_TYPE_MOV
@ RZ_ANALYSIS_OP_TYPE_MOV
Definition: rz_analysis.h:390
RZ_ANALYSIS_OP_TYPE_SHL
@ RZ_ANALYSIS_OP_TYPE_SHL
Definition: rz_analysis.h:407
RZ_ANALYSIS_OP_TYPE_NOT
@ RZ_ANALYSIS_OP_TYPE_NOT
Definition: rz_analysis.h:414
RZ_ANALYSIS_OP_TYPE_RET
@ RZ_ANALYSIS_OP_TYPE_RET
Definition: rz_analysis.h:385
RZ_ANALYSIS_OP_TYPE_NOP
@ RZ_ANALYSIS_OP_TYPE_NOP
Definition: rz_analysis.h:389
RZ_ANALYSIS_OP_TYPE_XOR
@ RZ_ANALYSIS_OP_TYPE_XOR
Definition: rz_analysis.h:412
rz_asm.h
rz_read_ble16
static ut16 rz_read_ble16(const void *src, bool big_endian)
Definition: rz_endian.h:493
rz_lib.h
RZ_LIB_TYPE_ANALYSIS
@ RZ_LIB_TYPE_ANALYSIS
Definition: rz_lib.h:73
rz_strbuf_append
RZ_API bool rz_strbuf_append(RzStrBuf *sb, const char *s)
Definition: strbuf.c:222
rz_strbuf_appendf
RZ_API bool rz_strbuf_appendf(RzStrBuf *sb, const char *fmt,...) RZ_PRINTF_CHECK(2
rz_types.h
st8
#define st8
Definition: rz_types_base.h:16
st32
#define st32
Definition: rz_types_base.h:12
rz_util.h
RZ_VERSION
#define RZ_VERSION
Definition: rz_version.h:8
flags
static struct sockaddr static addrlen static backlog const void static flags void flags
Definition: sfsocketcall.h:123
cond
#define cond(bop, top, mask, flags)
rz_analysis_op_t
Definition: rz_analysis.h:811
rz_analysis_plugin_t
Definition: rz_analysis.h:1233
rz_analysis_plugin_t::version
const char * version
Definition: rz_analysis.h:1239
rz_analysis_plugin_t::name
const char * name
Definition: rz_analysis.h:1234
rz_analysis_t
Definition: rz_analysis.h:553
rz_analysis_t::big_endian
int big_endian
Definition: rz_analysis.h:558
rz_lib_struct_t
Definition: rz_lib.h:57
rz_lib_struct_t::type
int type
Definition: rz_lib.h:58
v810_cmd
Definition: v810_disas.h:141
op
Definition: dis.c:32
v810_decode_command
int v810_decode_command(const ut8 *instr, int len, struct v810_cmd *cmd)
Definition: v810_disas.c:309
v810_disas.h
V810_MUL
@ V810_MUL
Definition: v810_disas.h:31
V810_JMP
@ V810_JMP
Definition: v810_disas.h:29
V810_TRAP
@ V810_TRAP
Definition: v810_disas.h:47
V810_STH
@ V810_STH
Definition: v810_disas.h:67
V810_JR
@ V810_JR
Definition: v810_disas.h:57
V810_LDW
@ V810_LDW
Definition: v810_disas.h:65
V810_NOT
@ V810_NOT
Definition: v810_disas.h:38
V810_DIV
@ V810_DIV
Definition: v810_disas.h:32
V810_OUTW
@ V810_OUTW
Definition: v810_disas.h:76
V810_OR
@ V810_OR
Definition: v810_disas.h:35
V810_BCOND
@ V810_BCOND
Definition: v810_disas.h:54
V810_MULU
@ V810_MULU
Definition: v810_disas.h:33
V810_JAL
@ V810_JAL
Definition: v810_disas.h:58
V810_CMP
@ V810_CMP
Definition: v810_disas.h:26
V810_XOR
@ V810_XOR
Definition: v810_disas.h:37
V810_MOVEA
@ V810_MOVEA
Definition: v810_disas.h:55
V810_STW
@ V810_STW
Definition: v810_disas.h:68
V810_DIVU
@ V810_DIVU
Definition: v810_disas.h:34
V810_INH
@ V810_INH
Definition: v810_disas.h:70
V810_MOV_IMM5
@ V810_MOV_IMM5
Definition: v810_disas.h:39
V810_ADDI
@ V810_ADDI
Definition: v810_disas.h:56
V810_STSR
@ V810_STSR
Definition: v810_disas.h:51
V810_OUTH
@ V810_OUTH
Definition: v810_disas.h:74
V810_LDSR
@ V810_LDSR
Definition: v810_disas.h:50
V810_SUB
@ V810_SUB
Definition: v810_disas.h:25
V810_MOVHI
@ V810_MOVHI
Definition: v810_disas.h:62
V810_SHL
@ V810_SHL
Definition: v810_disas.h:27
V810_SAR
@ V810_SAR
Definition: v810_disas.h:30
V810_OUTB
@ V810_OUTB
Definition: v810_disas.h:73
V810_AND
@ V810_AND
Definition: v810_disas.h:36
V810_RETI
@ V810_RETI
Definition: v810_disas.h:48
V810_ADD_IMM5
@ V810_ADD_IMM5
Definition: v810_disas.h:40
V810_LDH
@ V810_LDH
Definition: v810_disas.h:64
V810_ADD
@ V810_ADD
Definition: v810_disas.h:24
V810_SHR_IMM5
@ V810_SHR_IMM5
Definition: v810_disas.h:44
V810_LDB
@ V810_LDB
Definition: v810_disas.h:63
V810_ORI
@ V810_ORI
Definition: v810_disas.h:59
V810_STB
@ V810_STB
Definition: v810_disas.h:66
V810_ANDI
@ V810_ANDI
Definition: v810_disas.h:60
V810_CMP_IMM5
@ V810_CMP_IMM5
Definition: v810_disas.h:42
V810_INB
@ V810_INB
Definition: v810_disas.h:69
V810_INW
@ V810_INW
Definition: v810_disas.h:72
V810_SHL_IMM5
@ V810_SHL_IMM5
Definition: v810_disas.h:43
V810_XORI
@ V810_XORI
Definition: v810_disas.h:61
V810_MOV
@ V810_MOV
Definition: v810_disas.h:23
V810_SHR
@ V810_SHR
Definition: v810_disas.h:28
V810_SAR_IMM5
@ V810_SAR_IMM5
Definition: v810_disas.h:46
REG1
#define REG1(instr)
Definition: v810_disas.h:10
SIGN_EXT_T5
#define SIGN_EXT_T5(imm)
Definition: v810_disas.h:15
IMM5
#define IMM5(instr)
Definition: v810_disas.h:12
DISP9
#define DISP9(word1)
Definition: v810_disas.h:19
REG2
#define REG2(instr)
Definition: v810_disas.h:11
DISP26
#define DISP26(word1, word2)
Definition: v810_disas.h:20
V810_COND_NE
@ V810_COND_NE
Definition: v810_disas.h:120
V810_COND_NONE
@ V810_COND_NONE
Definition: v810_disas.h:115
V810_COND_GT
@ V810_COND_GT
Definition: v810_disas.h:125
V810_COND_E
@ V810_COND_E
Definition: v810_disas.h:112
V810_COND_NOP
@ V810_COND_NOP
Definition: v810_disas.h:123
V810_COND_H
@ V810_COND_H
Definition: v810_disas.h:121
V810_COND_LE
@ V810_COND_LE
Definition: v810_disas.h:117
V810_COND_V
@ V810_COND_V
Definition: v810_disas.h:110
V810_COND_GE
@ V810_COND_GE
Definition: v810_disas.h:124
V810_COND_NL
@ V810_COND_NL
Definition: v810_disas.h:119
V810_COND_N
@ V810_COND_N
Definition: v810_disas.h:114
V810_COND_NH
@ V810_COND_NH
Definition: v810_disas.h:113
V810_COND_NV
@ V810_COND_NV
Definition: v810_disas.h:118
V810_COND_L
@ V810_COND_L
Definition: v810_disas.h:111
V810_COND_LT
@ V810_COND_LT
Definition: v810_disas.h:116
V810_COND_P
@ V810_COND_P
Definition: v810_disas.h:122
ut64
ut64(WINAPI *w32_GetEnabledXStateFeatures)()
addr
static int addr
Definition: z80asm.c:58