test_arm64.c File Reference

#include <stdio.h>
#include <stdlib.h>
#include <capstone/platform.h>
#include <capstone/capstone.h>

Go to the source code of this file.

Classes
struct	platform

Macros
#define	ARM64_CODE   "\x09\x00\x38\xd5\xbf\x40\x00\xd5\x0c\x05\x13\xd5\x20\x50\x02\x0e\x20\xe4\x3d\x0f\x00\x18\xa0\x5f\xa2\x00\xae\x9e\x9f\x37\x03\xd5\xbf\x33\x03\xd5\xdf\x3f\x03\xd5\x21\x7c\x02\x9b\x21\x7c\x00\x53\x00\x40\x21\x4b\xe1\x0b\x40\xb9\x20\x04\x81\xda\x20\x08\x02\x8b\x10\x5b\xe8\x3c"

Functions
static void	print_string_hex (const char *comment, unsigned char *str, size_t len)
static void	print_insn_detail (cs_insn *ins)
static void	test ()
int	main ()

Variables
static csh	handle

Macro Definition Documentation

ARM64_CODE

#define ARM64_CODE   "\x09\x00\x38\xd5\xbf\x40\x00\xd5\x0c\x05\x13\xd5\x20\x50\x02\x0e\x20\xe4\x3d\x0f\x00\x18\xa0\x5f\xa2\x00\xae\x9e\x9f\x37\x03\xd5\xbf\x33\x03\xd5\xdf\x3f\x03\xd5\x21\x7c\x02\x9b\x21\x7c\x00\x53\x00\x40\x21\x4b\xe1\x0b\x40\xb9\x20\x04\x81\xda\x20\x08\x02\x8b\x10\x5b\xe8\x3c"

Function Documentation

main()

int main

(

void

)

Definition at line 225 of file test_arm64.c.

{
    test();
 
    return 0;
}

References test().

print_insn_detail()

static void print_insn_detail ( cs_insn *  ins )

static

Definition at line 32 of file test_arm64.c.

{
    cs_arm64 *arm64;
    int i;
    cs_regs regs_read, regs_write;
    unsigned char regs_read_count, regs_write_count;
    unsigned char access;
 
    // detail can be NULL if SKIPDATA option is turned ON
    if (ins->detail == NULL)
        return;
 
    arm64 = &(ins->detail->arm64);
    if (arm64->op_count)
        printf("\top_count: %u\n", arm64->op_count);
 
    for (i = 0; i < arm64->op_count; i++) {
        cs_arm64_op *op = &(arm64->operands[i]);
        switch(op->type) {
            default:
                break;
            case ARM64_OP_REG:
                printf("\t\toperands[%u].type: REG = %s\n", i, cs_reg_name(handle, op->reg));
                break;
            case ARM64_OP_IMM:
                printf("\t\toperands[%u].type: IMM = 0x%" PRIx64 "\n", i, op->imm);
                break;
            case ARM64_OP_FP:
#if defined(_KERNEL_MODE)
                // Issue #681: Windows kernel does not support formatting float point
                printf("\t\toperands[%u].type: FP = <float_point_unsupported>\n", i);
#else
                printf("\t\toperands[%u].type: FP = %f\n", i, op->fp);
#endif
                break;
            case ARM64_OP_MEM:
                printf("\t\toperands[%u].type: MEM\n", i);
                if (op->mem.base != ARM64_REG_INVALID)
                    printf("\t\t\toperands[%u].mem.base: REG = %s\n", i, cs_reg_name(handle, op->mem.base));
                if (op->mem.index != ARM64_REG_INVALID)
                    printf("\t\t\toperands[%u].mem.index: REG = %s\n", i, cs_reg_name(handle, op->mem.index));
                if (op->mem.disp != 0)
                    printf("\t\t\toperands[%u].mem.disp: 0x%x\n", i, op->mem.disp);
 
                break;
            case ARM64_OP_CIMM:
                printf("\t\toperands[%u].type: C-IMM = %u\n", i, (int)op->imm);
                break;
            case ARM64_OP_REG_MRS:
                printf("\t\toperands[%u].type: REG_MRS = 0x%x\n", i, op->reg);
                break;
            case ARM64_OP_REG_MSR:
                printf("\t\toperands[%u].type: REG_MSR = 0x%x\n", i, op->reg);
                break;
            case ARM64_OP_PSTATE:
                printf("\t\toperands[%u].type: PSTATE = 0x%x\n", i, op->pstate);
                break;
            case ARM64_OP_SYS:
                printf("\t\toperands[%u].type: SYS = 0x%x\n", i, op->sys);
                break;
            case ARM64_OP_PREFETCH:
                printf("\t\toperands[%u].type: PREFETCH = 0x%x\n", i, op->prefetch);
                break;
            case ARM64_OP_BARRIER:
                printf("\t\toperands[%u].type: BARRIER = 0x%x\n", i, op->barrier);
                break;
        }
 
        access = op->access;
        switch(access) {
            default:
                break;
            case CS_AC_READ:
                printf("\t\toperands[%u].access: READ\n", i);
                break;
            case CS_AC_WRITE:
                printf("\t\toperands[%u].access: WRITE\n", i);
                break;
            case CS_AC_READ | CS_AC_WRITE:
                printf("\t\toperands[%u].access: READ | WRITE\n", i);
                break;
        }
 
        if (op->shift.type != ARM64_SFT_INVALID &&
                op->shift.value)
            printf("\t\t\tShift: type = %u, value = %u\n",
                    op->shift.type, op->shift.value);
 
        if (op->ext != ARM64_EXT_INVALID)
            printf("\t\t\tExt: %u\n", op->ext);
 
        if (op->vas != ARM64_VAS_INVALID)
            printf("\t\t\tVector Arrangement Specifier: 0x%x\n", op->vas);
 
        if (op->vess != ARM64_VESS_INVALID)
            printf("\t\t\tVector Element Size Specifier: %u\n", op->vess);
 
        if (op->vector_index != -1)
            printf("\t\t\tVector Index: %u\n", op->vector_index);
    }
 
    if (arm64->update_flags)
        printf("\tUpdate-flags: True\n");
 
    if (arm64->writeback)
        printf("\tWrite-back: True\n");
 
    if (arm64->cc)
        printf("\tCode-condition: %u\n", arm64->cc);
 
    // Print out all registers accessed by this instruction (either implicit or explicit)
    if (!cs_regs_access(handle, ins,
                regs_read, &regs_read_count,
                regs_write, &regs_write_count)) {
        if (regs_read_count) {
            printf("\tRegisters read:");
            for(i = 0; i < regs_read_count; i++) {
                printf(" %s", cs_reg_name(handle, regs_read[i]));
            }
            printf("\n");
        }
 
        if (regs_write_count) {
            printf("\tRegisters modified:");
            for(i = 0; i < regs_write_count; i++) {
                printf(" %s", cs_reg_name(handle, regs_write[i]));
            }
            printf("\n");
        }
    }
 
    printf("\n");
}

References access, ARM64_EXT_INVALID, ARM64_OP_BARRIER, ARM64_OP_CIMM, ARM64_OP_FP, ARM64_OP_IMM, ARM64_OP_MEM, ARM64_OP_PREFETCH, ARM64_OP_PSTATE, ARM64_OP_REG, ARM64_OP_REG_MRS, ARM64_OP_REG_MSR, ARM64_OP_SYS, ARM64_REG_INVALID, ARM64_SFT_INVALID, ARM64_VAS_INVALID, ARM64_VESS_INVALID, CS_AC_READ, CS_AC_WRITE, cs_reg_name(), cs_regs_access(), handle, i, NULL, printf(), and PRIx64.

Referenced by test().

print_string_hex()

static void print_string_hex ( const char *  comment, unsigned char *  str, size_t  len  )

static

Definition at line 20 of file test_arm64.c.

{
    unsigned char *c;
 
    printf("%s", comment);
    for (c = str; c < str + len; c++) {
        printf("0x%02x ", *c & 0xff);
    }
 
    printf("\n");
}

References c, len, printf(), and cmd_descs_generate::str.

Referenced by test().

test()

static void test ( )

static

Definition at line 166 of file test_arm64.c.

{
#define ARM64_CODE "\x09\x00\x38\xd5\xbf\x40\x00\xd5\x0c\x05\x13\xd5\x20\x50\x02\x0e\x20\xe4\x3d\x0f\x00\x18\xa0\x5f\xa2\x00\xae\x9e\x9f\x37\x03\xd5\xbf\x33\x03\xd5\xdf\x3f\x03\xd5\x21\x7c\x02\x9b\x21\x7c\x00\x53\x00\x40\x21\x4b\xe1\x0b\x40\xb9\x20\x04\x81\xda\x20\x08\x02\x8b\x10\x5b\xe8\x3c"
 
    struct platform platforms[] = {
        {
            CS_ARCH_ARM64,
            CS_MODE_ARM,
            (unsigned char *)ARM64_CODE,
            sizeof(ARM64_CODE) - 1,
            "ARM-64"
        },
    };
 
    uint64_t address = 0x2c;
    cs_insn *insn;
    int i;
    size_t count;
 
    for (i = 0; i < sizeof(platforms)/sizeof(platforms[0]); i++) {
        cs_err err = cs_open(platforms[i].arch, platforms[i].mode, &handle);
        if (err) {
            printf("Failed on cs_open() with error returned: %u\n", err);
            abort();
        }
 
        cs_option(handle, CS_OPT_DETAIL, CS_OPT_ON);
 
        count = cs_disasm(handle, platforms[i].code, platforms[i].size, address, 0, &insn);
        if (count) {
            size_t j;
 
            printf("****************\n");
            printf("Platform: %s\n", platforms[i].comment);
            print_string_hex("Code: ", platforms[i].code, platforms[i].size);
            printf("Disasm:\n");
 
            for (j = 0; j < count; j++) {
                printf("0x%" PRIx64 ":\t%s\t%s\n", insn[j].address, insn[j].mnemonic, insn[j].op_str);
                print_insn_detail(&insn[j]);
            }
            printf("0x%" PRIx64 ":\n", insn[j-1].address + insn[j-1].size);
 
            // free memory allocated by cs_disasm()
            cs_free(insn, count);
        } else {
            printf("****************\n");
            printf("Platform: %s\n", platforms[i].comment);
            print_string_hex("Code: ", platforms[i].code, platforms[i].size);
            printf("ERROR: Failed to disasm given code!\n");
            abort();
        }
 
        printf("\n");
 
        cs_close(&handle);
    }
}

References arch, ARM64_CODE, platform::comment, count, CS_ARCH_ARM64, cs_close(), cs_disasm(), cs_free(), CS_MODE_ARM, cs_open(), CS_OPT_DETAIL, CS_OPT_ON, cs_option(), err, handle, i, platforms, print_insn_detail(), print_string_hex(), printf(), and PRIx64.

Referenced by main().

Variable Documentation

handle

csh handle

static

Definition at line 10 of file test_arm64.c.

Referenced by print_insn_detail(), and test().