rsp_idec.h File Reference

#include <rz_types.h>

Go to the source code of this file.

Classes
struct	rsp_operand
struct	rsp_instruction

Enumerations
enum	{ RSP_DMEM_OFFSET = 0x0000 , RSP_IMEM_OFFSET = 0x1000 }
enum	rsp_opcode {   RSP_OP_INVALID , RSP_OP_NOP , RSP_OP_SLL , RSP_OP_SRL ,   RSP_OP_SRA , RSP_OP_SLLV , RSP_OP_SRLV , RSP_OP_SRAV ,   RSP_OP_JR , RSP_OP_BREAK , RSP_OP_ADD , RSP_OP_ADDU ,   RSP_OP_SUB , RSP_OP_SUBU , RSP_OP_AND , RSP_OP_OR ,   RSP_OP_XOR , RSP_OP_NOR , RSP_OP_SLT , RSP_OP_SLTU ,   RSP_OP_BLTZ , RSP_OP_BGEZ , RSP_OP_BLTZAL , RSP_OP_BGEZAL ,   RSP_OP_MFC0 , RSP_OP_MTC0 , RSP_OP_MFC2 , RSP_OP_MTC2 ,   RSP_OP_CFC2 , RSP_OP_CTC2 , RSP_OP_VMULF , RSP_OP_VMULU ,   RSP_OP_VMUDL , RSP_OP_VMUDM , RSP_OP_VMUDN , RSP_OP_VMUDH ,   RSP_OP_VMACF , RSP_OP_VMACU , RSP_OP_VMADL , RSP_OP_VMADM ,   RSP_OP_VMADN , RSP_OP_VMADH , RSP_OP_VADD , RSP_OP_VSUB ,   RSP_OP_VABS , RSP_OP_VADDC , RSP_OP_VSUBC , RSP_OP_VSAR ,   RSP_OP_VLT , RSP_OP_VEQ , RSP_OP_VNE , RSP_OP_VGE ,   RSP_OP_VCL , RSP_OP_VCH , RSP_OP_VCR , RSP_OP_VMRG ,   RSP_OP_VAND , RSP_OP_VNAND , RSP_OP_VOR , RSP_OP_VNOR ,   RSP_OP_VXOR , RSP_OP_VNXOR , RSP_OP_VRCP , RSP_OP_VRCPL ,   RSP_OP_VRCPH , RSP_OP_VMOV , RSP_OP_VRSQ , RSP_OP_VRSQL ,   RSP_OP_VRSQH , RSP_OP_VNOP , RSP_OP_LBV , RSP_OP_LSV ,   RSP_OP_LLV , RSP_OP_LDV , RSP_OP_LQV , RSP_OP_LRV ,   RSP_OP_LPV , RSP_OP_LUV , RSP_OP_LHV , RSP_OP_LFV ,   RSP_OP_LTV , RSP_OP_SBV , RSP_OP_SSV , RSP_OP_SLV ,   RSP_OP_SDV , RSP_OP_SQV , RSP_OP_SRV , RSP_OP_SPV ,   RSP_OP_SUV , RSP_OP_SHV , RSP_OP_SFV , RSP_OP_SWV ,   RSP_OP_STV , RSP_OP_J , RSP_OP_JAL , RSP_OP_BEQ ,   RSP_OP_BNE , RSP_OP_BLEZ , RSP_OP_BGTZ , RSP_OP_ADDI ,   RSP_OP_ADDIU , RSP_OP_SLTI , RSP_OP_SLTIU , RSP_OP_ANDI ,   RSP_OP_ORI , RSP_OP_XORI , RSP_OP_LUI , RSP_OP_LB ,   RSP_OP_LH , RSP_OP_LW , RSP_OP_LBU , RSP_OP_LHU ,   RSP_OP_SB , RSP_OP_SH , RSP_OP_SW }
enum	rsp_operand_type {   RSP_OPND_GP_REG , RSP_OPND_TARGET , RSP_OPND_OFFSET , RSP_OPND_ZIMM ,   RSP_OPND_SIMM , RSP_OPND_SHIFT_AMOUNT , RSP_OPND_BASE_OFFSET , RSP_OPND_C0_REG ,   RSP_OPND_C2_CREG , RSP_OPND_C2_ACCU , RSP_OPND_C2_VREG , RSP_OPND_C2_VREG_BYTE ,   RSP_OPND_C2_VREG_SCALAR , RSP_OPND_C2_VREG_ELEMENT }
enum	{ RSP_MAX_OPNDS = 3 }

Functions
static ut64	rsp_mem_addr (ut64 addr, ut64 base)
rsp_instruction	rsp_instruction_decode (ut64 pc, ut32 iw)

Variables
const char *	rsp_gp_reg_soft_names []
const char *	rsp_c0_reg_soft_names []
const char *	rsp_gp_reg_names []
const char *	rsp_c0_reg_names []
const char *	rsp_c2_creg_names []
const char *	rsp_c2_accu_names []
const char *	rsp_c2_vreg_names []
const char *	rsp_c2_vreg_element_names []

Enumeration Type Documentation

anonymous enum

anonymous enum

Enumerator
RSP_DMEM_OFFSET
RSP_IMEM_OFFSET

Definition at line 17 of file rsp_idec.h.

     {
    RSP_DMEM_OFFSET = 0x0000,
    RSP_IMEM_OFFSET = 0x1000
};

anonymous enum

anonymous enum

Enumerator
RSP_MAX_OPNDS

Definition at line 170 of file rsp_idec.h.

{ RSP_MAX_OPNDS = 3 };

rsp_opcode

enum rsp_opcode

Enumerator
RSP_OP_INVALID
RSP_OP_NOP
RSP_OP_SLL
RSP_OP_SRL
RSP_OP_SRA
RSP_OP_SLLV
RSP_OP_SRLV
RSP_OP_SRAV
RSP_OP_JR
RSP_OP_BREAK
RSP_OP_ADD
RSP_OP_ADDU
RSP_OP_SUB
RSP_OP_SUBU
RSP_OP_AND
RSP_OP_OR
RSP_OP_XOR
RSP_OP_NOR
RSP_OP_SLT
RSP_OP_SLTU
RSP_OP_BLTZ
RSP_OP_BGEZ
RSP_OP_BLTZAL
RSP_OP_BGEZAL
RSP_OP_MFC0
RSP_OP_MTC0
RSP_OP_MFC2
RSP_OP_MTC2
RSP_OP_CFC2
RSP_OP_CTC2
RSP_OP_VMULF
RSP_OP_VMULU
RSP_OP_VMUDL
RSP_OP_VMUDM
RSP_OP_VMUDN
RSP_OP_VMUDH
RSP_OP_VMACF
RSP_OP_VMACU
RSP_OP_VMADL
RSP_OP_VMADM
RSP_OP_VMADN
RSP_OP_VMADH
RSP_OP_VADD
RSP_OP_VSUB
RSP_OP_VABS
RSP_OP_VADDC
RSP_OP_VSUBC
RSP_OP_VSAR
RSP_OP_VLT
RSP_OP_VEQ
RSP_OP_VNE
RSP_OP_VGE
RSP_OP_VCL
RSP_OP_VCH
RSP_OP_VCR
RSP_OP_VMRG
RSP_OP_VAND
RSP_OP_VNAND
RSP_OP_VOR
RSP_OP_VNOR
RSP_OP_VXOR
RSP_OP_VNXOR
RSP_OP_VRCP
RSP_OP_VRCPL
RSP_OP_VRCPH
RSP_OP_VMOV
RSP_OP_VRSQ
RSP_OP_VRSQL
RSP_OP_VRSQH
RSP_OP_VNOP
RSP_OP_LBV
RSP_OP_LSV
RSP_OP_LLV
RSP_OP_LDV
RSP_OP_LQV
RSP_OP_LRV
RSP_OP_LPV
RSP_OP_LUV
RSP_OP_LHV
RSP_OP_LFV
RSP_OP_LTV
RSP_OP_SBV
RSP_OP_SSV
RSP_OP_SLV
RSP_OP_SDV
RSP_OP_SQV
RSP_OP_SRV
RSP_OP_SPV
RSP_OP_SUV
RSP_OP_SHV
RSP_OP_SFV
RSP_OP_SWV
RSP_OP_STV
RSP_OP_J
RSP_OP_JAL
RSP_OP_BEQ
RSP_OP_BNE
RSP_OP_BLEZ
RSP_OP_BGTZ
RSP_OP_ADDI
RSP_OP_ADDIU
RSP_OP_SLTI
RSP_OP_SLTIU
RSP_OP_ANDI
RSP_OP_ORI
RSP_OP_XORI
RSP_OP_LUI
RSP_OP_LB
RSP_OP_LH
RSP_OP_LW
RSP_OP_LBU
RSP_OP_LHU
RSP_OP_SB
RSP_OP_SH
RSP_OP_SW

Definition at line 29 of file rsp_idec.h.

             {
    RSP_OP_INVALID,
    RSP_OP_NOP,
    RSP_OP_SLL,
    RSP_OP_SRL,
    RSP_OP_SRA,
    RSP_OP_SLLV,
    RSP_OP_SRLV,
    RSP_OP_SRAV,
    RSP_OP_JR,
    RSP_OP_BREAK,
    RSP_OP_ADD,
    RSP_OP_ADDU,
    RSP_OP_SUB,
    RSP_OP_SUBU,
    RSP_OP_AND,
    RSP_OP_OR,
    RSP_OP_XOR,
    RSP_OP_NOR,
    RSP_OP_SLT,
    RSP_OP_SLTU,
    RSP_OP_BLTZ,
    RSP_OP_BGEZ,
    RSP_OP_BLTZAL,
    RSP_OP_BGEZAL,
    RSP_OP_MFC0,
    RSP_OP_MTC0,
    RSP_OP_MFC2,
    RSP_OP_MTC2,
    RSP_OP_CFC2,
    RSP_OP_CTC2,
    RSP_OP_VMULF,
    RSP_OP_VMULU,
    RSP_OP_VMUDL,
    RSP_OP_VMUDM,
    RSP_OP_VMUDN,
    RSP_OP_VMUDH,
    RSP_OP_VMACF,
    RSP_OP_VMACU,
    RSP_OP_VMADL,
    RSP_OP_VMADM,
    RSP_OP_VMADN,
    RSP_OP_VMADH,
    RSP_OP_VADD,
    RSP_OP_VSUB,
    RSP_OP_VABS,
    RSP_OP_VADDC,
    RSP_OP_VSUBC,
    RSP_OP_VSAR,
    RSP_OP_VLT,
    RSP_OP_VEQ,
    RSP_OP_VNE,
    RSP_OP_VGE,
    RSP_OP_VCL,
    RSP_OP_VCH,
    RSP_OP_VCR,
    RSP_OP_VMRG,
    RSP_OP_VAND,
    RSP_OP_VNAND,
    RSP_OP_VOR,
    RSP_OP_VNOR,
    RSP_OP_VXOR,
    RSP_OP_VNXOR,
    RSP_OP_VRCP,
    RSP_OP_VRCPL,
    RSP_OP_VRCPH,
    RSP_OP_VMOV,
    RSP_OP_VRSQ,
    RSP_OP_VRSQL,
    RSP_OP_VRSQH,
    RSP_OP_VNOP,
    RSP_OP_LBV,
    RSP_OP_LSV,
    RSP_OP_LLV,
    RSP_OP_LDV,
    RSP_OP_LQV,
    RSP_OP_LRV,
    RSP_OP_LPV,
    RSP_OP_LUV,
    RSP_OP_LHV,
    RSP_OP_LFV,
    RSP_OP_LTV,
    RSP_OP_SBV,
    RSP_OP_SSV,
    RSP_OP_SLV,
    RSP_OP_SDV,
    RSP_OP_SQV,
    RSP_OP_SRV,
    RSP_OP_SPV,
    RSP_OP_SUV,
    RSP_OP_SHV,
    RSP_OP_SFV,
    RSP_OP_SWV,
    RSP_OP_STV,
    RSP_OP_J,
    RSP_OP_JAL,
    RSP_OP_BEQ,
    RSP_OP_BNE,
    RSP_OP_BLEZ,
    RSP_OP_BGTZ,
    RSP_OP_ADDI,
    RSP_OP_ADDIU,
    RSP_OP_SLTI,
    RSP_OP_SLTIU,
    RSP_OP_ANDI,
    RSP_OP_ORI,
    RSP_OP_XORI,
    RSP_OP_LUI,
    RSP_OP_LB,
    RSP_OP_LH,
    RSP_OP_LW,
    RSP_OP_LBU,
    RSP_OP_LHU,
    RSP_OP_SB,
    RSP_OP_SH,
    RSP_OP_SW
} rsp_opcode;

rsp_operand_type

enum rsp_operand_type

Enumerator
RSP_OPND_GP_REG
RSP_OPND_TARGET
RSP_OPND_OFFSET
RSP_OPND_ZIMM
RSP_OPND_SIMM
RSP_OPND_SHIFT_AMOUNT
RSP_OPND_BASE_OFFSET
RSP_OPND_C0_REG
RSP_OPND_C2_CREG
RSP_OPND_C2_ACCU
RSP_OPND_C2_VREG
RSP_OPND_C2_VREG_BYTE
RSP_OPND_C2_VREG_SCALAR
RSP_OPND_C2_VREG_ELEMENT

Definition at line 147 of file rsp_idec.h.

             {
    RSP_OPND_GP_REG, /* u=reg_num */
    RSP_OPND_TARGET, /* u=imem_address */
    RSP_OPND_OFFSET, /* u=imem_address, s=offset */
    RSP_OPND_ZIMM, /* u=zero-extended imm */
    RSP_OPND_SIMM, /* s=sign extended imm */
    RSP_OPND_SHIFT_AMOUNT, /* u=shift amount */
    RSP_OPND_BASE_OFFSET, /* u=reg_numm, s=offset */
    RSP_OPND_C0_REG, /* u=reg_num */
    RSP_OPND_C2_CREG, /* u=reg_num */
    RSP_OPND_C2_ACCU, /* u=reg_num */
    RSP_OPND_C2_VREG, /* u=reg_num */
    RSP_OPND_C2_VREG_BYTE, /* u=reg_num, s=byte element (0-15) */
    RSP_OPND_C2_VREG_SCALAR, /* u=reg_num, s=scalar element (0-7) */
    RSP_OPND_C2_VREG_ELEMENT /* u=reg_num, s=element (0-15) */
} rsp_operand_type;

Function Documentation

rsp_instruction_decode()

rsp_instruction rsp_instruction_decode	(	ut64	pc,
		ut32	iw
	)

Definition at line 587 of file rsp_idec.c.

                                                         {
    int opnd;
    const rsp_instruction_priv *priv = rsp_decode_priv(iw);
 
    rsp_instruction rz_instr;
 
    rz_instr.mnemonic = priv->mnemonic;
    rz_instr.opcode = priv->opcode;
    rz_instr.noperands = priv->noperands;
    for (opnd = 0; opnd < rz_instr.noperands; opnd++) {
        rz_instr.operands[opnd] = rsp_operand_decode(pc, iw, &priv->odecs[opnd]);
    }
 
    return rz_instr;
}

References rsp_instruction_priv::mnemonic, rsp_instruction::mnemonic, rsp_instruction_priv::noperands, rsp_instruction::noperands, rsp_instruction_priv::odecs, rsp_instruction_priv::opcode, rsp_instruction::opcode, rsp_instruction::operands, pc, rsp_decode_priv(), and rsp_operand_decode().

Referenced by disassemble(), and rsp_op().

rsp_mem_addr()

static ut64 rsp_mem_addr ( ut64  addr, ut64  base  )

inlinestatic

Definition at line 23 of file rsp_idec.h.

                                                      {
    addr &= 0xfff;
    addr |= base;
    return addr;
}

References addr.

Referenced by rsp_op(), and rsp_operand_decode().

Variable Documentation

rsp_c0_reg_names

const char* rsp_c0_reg_names[]

extern

Definition at line 55 of file rsp_idec.c.

Referenced by rsp_op().

rsp_c0_reg_soft_names

const char* rsp_c0_reg_soft_names[]

extern

Definition at line 13 of file rsp_idec.c.

Referenced by disassemble().

rsp_c2_accu_names

const char* rsp_c2_accu_names[]

extern

Definition at line 64 of file rsp_idec.c.

Referenced by disassemble().

rsp_c2_creg_names

const char* rsp_c2_creg_names[]

extern

Definition at line 60 of file rsp_idec.c.

Referenced by disassemble().

rsp_c2_vreg_element_names

const char* rsp_c2_vreg_element_names[]

extern

Definition at line 75 of file rsp_idec.c.

Referenced by disassemble().

rsp_c2_vreg_names

const char* rsp_c2_vreg_names[]

extern

Definition at line 68 of file rsp_idec.c.

Referenced by disassemble().

rsp_gp_reg_names

const char* rsp_gp_reg_names[]

extern

Definition at line 20 of file rsp_idec.c.

rsp_gp_reg_soft_names

const char* rsp_gp_reg_soft_names[]

extern

Definition at line 6 of file rsp_idec.c.

Referenced by disassemble(), and rsp_op().