asm_lm32.c File Reference

#include <rz_types.h>
#include <rz_util.h>
#include <rz_lib.h>
#include <rz_asm.h>
#include "../arch/lm32/lm32_isa.h"

Go to the source code of this file.

Macros
#define	LM32_UNUSED   0

Functions
static int	reg_number_to_string (ut8 reg, char *str)
static int	csr_number_to_string (ut8 csr, char *str)
static st32	shift_and_signextend (ut8 shift, ut8 sign_loc, ut32 val)
static bool	is_invalid_imm5_instr (RzAsmLm32Instruction *instr)
static bool	is_invalid_one_reg_instr (RzAsmLm32Instruction *instr)
static bool	is_invalid_two_reg_instr (RzAsmLm32Instruction *instr)
static bool	is_invalid_wcsr_instr (RzAsmLm32Instruction *instr)
static bool	is_pseudo_instr_ret (RzAsmLm32Instruction *instr)
static bool	is_pseudo_instr_mv (RzAsmLm32Instruction *instr)
static bool	is_pseudo_instr_mvhi (RzAsmLm32Instruction *instr)
static bool	is_pseudo_instr_not (RzAsmLm32Instruction *instr)
static bool	is_pseudo_instr_mvi (RzAsmLm32Instruction *instr)
static bool	is_pseudo_instr_nop (RzAsmLm32Instruction *instr)
static bool	is_pseudo_instr_raise (RzAsmLm32Instruction *instr)
static int	rz_asm_lm32_decode (RzAsmLm32Instruction *instr)
static int	write_reg_names_to_struct (RzAsmLm32Instruction *instr)
static int	print_pseudo_instruction (RzAsmLm32Instruction *instr, char *str)
static int	rz_asm_lm32_stringify (RzAsmLm32Instruction *instr, char *str)
static int	disassemble (RzAsm *a, RzAsmOp *op, const ut8 *buf, int len)

Variables
RzAsmPlugin	rz_asm_plugin_lm32
RZ_API RzLibStruct	rizin_plugin

Macro Definition Documentation

LM32_UNUSED

#define LM32_UNUSED   0

Definition at line 10 of file asm_lm32.c.

Function Documentation

csr_number_to_string()

static int csr_number_to_string ( ut8  csr, char *  str  )

static

Definition at line 80 of file asm_lm32.c.

                                                    {
    ut8 match_idx = 0xff;
    int i;
    for (i = 0; i < RzAsmLm32CsrNumber; i++) {
        if (RzAsmLm32Csrs[i].number == csr) {
            match_idx = i;
            break;
        }
    }
    // csr number not found in array
    if (match_idx == 0xff) {
        return -1;
    }
    strcpy(str, RzAsmLm32Csrs[match_idx].name);
    return 0;
}

References i, RzAsmLm32CsrNumber, RzAsmLm32Csrs, and cmd_descs_generate::str.

Referenced by write_reg_names_to_struct().

disassemble()

static int disassemble ( RzAsm *  a, RzAsmOp *  op, const ut8 *  buf, int  len  )

static

Definition at line 429 of file asm_lm32.c.

                                                                       {
    RzAsmLm32Instruction instr = { 0 };
    instr.value = buf[0] << 24 | buf[1] << 16 | buf[2] << 8 | buf[3];
    instr.addr = a->pc;
    if (rz_asm_lm32_decode(&instr)) {
        rz_strbuf_set(&op->buf_asm, "invalid");
        a->invhex = 1;
        return -1;
    }
    // op->buf_asm is 256 chars long, which is more than sufficient
    if (rz_asm_lm32_stringify(&instr, rz_strbuf_get(&op->buf_asm))) {
        rz_strbuf_set(&op->buf_asm, "invalid");
        a->invhex = 1;
        return -1;
    }
    return 4;
}

References a, rz_asm_lm32_instruction::addr, rz_asm_lm32_decode(), rz_asm_lm32_stringify(), rz_strbuf_get(), rz_strbuf_set(), and rz_asm_lm32_instruction::value.

is_invalid_imm5_instr()

static bool is_invalid_imm5_instr ( RzAsmLm32Instruction *  instr )

static

Definition at line 106 of file asm_lm32.c.

                                                               {
    return instr->value & RzAsmLm32InstrImm5InvalidBitsMask;
}

References RzAsmLm32InstrImm5InvalidBitsMask, and rz_asm_lm32_instruction::value.

Referenced by rz_asm_lm32_decode().

is_invalid_one_reg_instr()

static bool is_invalid_one_reg_instr ( RzAsmLm32Instruction *  instr )

static

Definition at line 110 of file asm_lm32.c.

                                                                  {
    return instr->value & RzAsmLm32InstrOneRegInvalidBitsMask;
}

References RzAsmLm32InstrOneRegInvalidBitsMask, and rz_asm_lm32_instruction::value.

Referenced by rz_asm_lm32_decode().

is_invalid_two_reg_instr()

static bool is_invalid_two_reg_instr ( RzAsmLm32Instruction *  instr )

static

Definition at line 114 of file asm_lm32.c.

                                                                  {
    return instr->value & RzAsmLm32InstrTwoRegsInvalidBitsMask;
}

References RzAsmLm32InstrTwoRegsInvalidBitsMask, and rz_asm_lm32_instruction::value.

Referenced by rz_asm_lm32_decode().

is_invalid_wcsr_instr()

static bool is_invalid_wcsr_instr ( RzAsmLm32Instruction *  instr )

static

Definition at line 118 of file asm_lm32.c.

                                                               {
    return instr->value & RzAsmLm32InstrWcsrInvalidBitsMask;
}

References RzAsmLm32InstrWcsrInvalidBitsMask, and rz_asm_lm32_instruction::value.

Referenced by rz_asm_lm32_decode().

is_pseudo_instr_mv()

static bool is_pseudo_instr_mv ( RzAsmLm32Instruction *  instr )

static

Definition at line 129 of file asm_lm32.c.

                                                            {
    return (instr->op == lm32_op_or) && !instr->src1_reg;
}

References lm32_op_or, rz_asm_lm32_instruction::op, and rz_asm_lm32_instruction::src1_reg.

Referenced by rz_asm_lm32_decode().

is_pseudo_instr_mvhi()

static bool is_pseudo_instr_mvhi ( RzAsmLm32Instruction *  instr )

static

Definition at line 134 of file asm_lm32.c.

                                                              {
    return (instr->op == lm32_op_orhi) && !instr->src0_reg;
}

References lm32_op_orhi, rz_asm_lm32_instruction::op, and rz_asm_lm32_instruction::src0_reg.

Referenced by rz_asm_lm32_decode().

is_pseudo_instr_mvi()

static bool is_pseudo_instr_mvi ( RzAsmLm32Instruction *  instr )

static

Definition at line 144 of file asm_lm32.c.

                                                             {
    return (instr->op == lm32_op_addi) && !instr->src0_reg;
}

References lm32_op_addi, rz_asm_lm32_instruction::op, and rz_asm_lm32_instruction::src0_reg.

Referenced by rz_asm_lm32_decode().

is_pseudo_instr_nop()

static bool is_pseudo_instr_nop ( RzAsmLm32Instruction *  instr )

static

Definition at line 149 of file asm_lm32.c.

                                                             {
    return (instr->op == lm32_op_addi) && !instr->dest_reg &&
        !instr->src0_reg && !instr->immediate;
}

References rz_asm_lm32_instruction::dest_reg, rz_asm_lm32_instruction::immediate, lm32_op_addi, rz_asm_lm32_instruction::op, and rz_asm_lm32_instruction::src0_reg.

Referenced by print_pseudo_instruction(), and rz_asm_lm32_decode().

is_pseudo_instr_not()

static bool is_pseudo_instr_not ( RzAsmLm32Instruction *  instr )

static

Definition at line 139 of file asm_lm32.c.

                                                             {
    return (instr->op == lm32_op_xnor) && !instr->src1_reg;
}

References lm32_op_xnor, rz_asm_lm32_instruction::op, and rz_asm_lm32_instruction::src1_reg.

Referenced by rz_asm_lm32_decode().

is_pseudo_instr_raise()

static bool is_pseudo_instr_raise ( RzAsmLm32Instruction *  instr )

static

Definition at line 155 of file asm_lm32.c.

                                                               {
    return instr->op == raise_instr;
}

References rz_asm_lm32_instruction::op, and raise_instr.

Referenced by rz_asm_lm32_decode().

is_pseudo_instr_ret()

static bool is_pseudo_instr_ret ( RzAsmLm32Instruction *  instr )

static

Definition at line 123 of file asm_lm32.c.

                                                             {
    //"ra" == 0x1d
    return (instr->op == lm32_op_b) && (instr->src0_reg == 0x1d);
}

References lm32_op_b, rz_asm_lm32_instruction::op, and rz_asm_lm32_instruction::src0_reg.

Referenced by rz_asm_lm32_decode().

print_pseudo_instruction()

static int print_pseudo_instruction ( RzAsmLm32Instruction *  instr, char *  str  )

static

Definition at line 305 of file asm_lm32.c.

                                                                            {
    if (!instr->pseudoInstruction) {
        return -1;
    }
    switch (instr->op) {
    // ret == b ra
    case lm32_op_b:
        strcpy(str, "ret");
        break;
    // mv rX, rY == or rX, rY, r0
    case lm32_op_or:
        sprintf(str, "mv %s, %s", instr->dest_reg_str, instr->src0_reg_str);
        break;
    // mvhi rX, imm16 == orhi rX, r0, imm16
    case lm32_op_orhi:
        sprintf(str, "mvhi %s, 0x%x", instr->dest_reg_str, instr->immediate);
        break;
    // not rX, rY == xnor rX, rY, r0
    case lm32_op_xnor:
        sprintf(str, "not %s, %s", instr->dest_reg_str, instr->src0_reg_str);
        break;
    // mvi rX, imm16 == addi rX, r0, imm16
    // nop == addi r0, r0, 0
    case lm32_op_addi:
        if (is_pseudo_instr_nop(instr)) { // nop
            strcpy(str, "nop");
        } else { // mvi
            sprintf(str, "mvi %s, 0x%x", instr->dest_reg_str, instr->immediate);
        }
        break;
    // break, scall
    case lm32_op_raise:
        switch (instr->immediate) {
        case 0x2: // break
            strcpy(str, "break");
            break;
        case 0x7: // scall
            strcpy(str, "scall");
            break;
        default:
            return -1;
        }
        break;
    default:
        return -1;
    }
    return 0;
}

References rz_asm_lm32_instruction::dest_reg_str, rz_asm_lm32_instruction::immediate, is_pseudo_instr_nop(), lm32_op_addi, lm32_op_b, lm32_op_or, lm32_op_orhi, lm32_op_raise, lm32_op_xnor, rz_asm_lm32_instruction::op, rz_asm_lm32_instruction::pseudoInstruction, sprintf, rz_asm_lm32_instruction::src0_reg_str, and cmd_descs_generate::str.

Referenced by rz_asm_lm32_stringify().

reg_number_to_string()

static int reg_number_to_string ( ut8  reg, char *  str  )

static

Definition at line 13 of file asm_lm32.c.

                                                    {
    ut8 match_idx = 0xff;
    int i;
    for (i = 0; i < RzAsmLm32RegNumber; i++) {
        if (RzAsmLm32Regs[i].number == reg) {
            match_idx = i;
            break;
        }
    }
    // register number not found in array. this shouldn't happen
    if (match_idx == 0xff) {
        return -1;
    }
    strcpy(str, RzAsmLm32Regs[match_idx].name);
    return 0;
}

References i, reg, RzAsmLm32RegNumber, RzAsmLm32Regs, and cmd_descs_generate::str.

Referenced by write_reg_names_to_struct().

rz_asm_lm32_decode()

static int rz_asm_lm32_decode ( RzAsmLm32Instruction *  instr )

static

Definition at line 159 of file asm_lm32.c.

                                                           {
    instr->op = extract_opcode(instr->value);
    if (instr->op >= RzAsmLm32OpcodeNumber) {
        return -1;
    }
    instr->op_decode = RzAsmLm32OpcodeList[instr->op];
 
    switch (instr->op_decode.type) {
    case reg_imm16_signextend:
        instr->dest_reg = extract_reg_v(instr->value);
        instr->src0_reg = extract_reg_u(instr->value);
        instr->immediate = shift_and_signextend(0, RzAsmLm32Imm16SignBitPos,
            extract_imm16(instr->value));
        break;
    case reg_imm16_shift2_signextend:
        instr->dest_reg = extract_reg_v(instr->value);
        instr->src0_reg = extract_reg_u(instr->value);
        instr->immediate = shift_and_signextend(2, RzAsmLm32Imm16SignBitPos,
            extract_imm16(instr->value));
        break;
    case reg_imm16_zeroextend:
        instr->dest_reg = extract_reg_v(instr->value);
        instr->src0_reg = extract_reg_u(instr->value);
        instr->immediate = extract_imm16(instr->value);
        break;
    case reg_imm5:
        if (is_invalid_imm5_instr(instr)) {
            return -1;
        }
        instr->dest_reg = extract_reg_v(instr->value);
        instr->src0_reg = extract_reg_u(instr->value);
        instr->immediate = extract_imm5(instr->value);
        break;
    case raise_instr:
        if (is_invalid_imm5_instr(instr)) {
            return -1;
        }
        // might be less bits used, but this shouldn't hurt
        // invalid parameters are caught in print_pseudo_instruction anyway
        instr->immediate = extract_imm5(instr->value);
        break;
    case one_reg:
        if (is_invalid_one_reg_instr(instr)) {
            return -1;
        }
        instr->src0_reg = extract_reg_u(instr->value);
        break;
    case two_regs:
        if (is_invalid_two_reg_instr(instr)) {
            return -1;
        }
        instr->dest_reg = extract_reg_w(instr->value);
        instr->src0_reg = extract_reg_u(instr->value);
        break;
    case three_regs:
        instr->dest_reg = extract_reg_w(instr->value);
        instr->src0_reg = extract_reg_v(instr->value);
        instr->src1_reg = extract_reg_u(instr->value);
        break;
    case reg_csr: // wcsr
        if (is_invalid_wcsr_instr(instr)) {
            return -1;
        }
        instr->src0_reg = extract_reg_v(instr->value);
        instr->csr = extract_reg_u(instr->value);
        break;
    case csr_reg: // rcsr
        // bitmask is the same as the two register one
        if (is_invalid_two_reg_instr(instr)) {
            return -1;
        }
        instr->dest_reg = extract_reg_w(instr->value);
        instr->csr = extract_reg_u(instr->value);
        break;
    case imm26:
        instr->immediate = shift_and_signextend(2, RzAsmLm32Imm26SignBitPos,
            extract_imm26(instr->value));
        break;
    case reserved:
    default:
        return -1;
    }
 
    // see if the instruction corresponds to a pseudo-instruction
    instr->pseudoInstruction = is_pseudo_instr_ret(instr) || is_pseudo_instr_mv(instr) ||
        is_pseudo_instr_mvhi(instr) || is_pseudo_instr_not(instr) || is_pseudo_instr_mvi(instr) ||
        is_pseudo_instr_nop(instr) || is_pseudo_instr_raise(instr);
 
    return 0;
}

References rz_asm_lm32_instruction::csr, csr_reg, rz_asm_lm32_instruction::dest_reg, extract_imm16(), extract_imm26(), extract_imm5(), extract_opcode(), extract_reg_u(), extract_reg_v(), extract_reg_w(), imm26, rz_asm_lm32_instruction::immediate, is_invalid_imm5_instr(), is_invalid_one_reg_instr(), is_invalid_two_reg_instr(), is_invalid_wcsr_instr(), is_pseudo_instr_mv(), is_pseudo_instr_mvhi(), is_pseudo_instr_mvi(), is_pseudo_instr_nop(), is_pseudo_instr_not(), is_pseudo_instr_raise(), is_pseudo_instr_ret(), one_reg, rz_asm_lm32_instruction::op, rz_asm_lm32_instruction::op_decode, rz_asm_lm32_instruction::pseudoInstruction, raise_instr, reg_csr, reg_imm16_shift2_signextend, reg_imm16_signextend, reg_imm16_zeroextend, reg_imm5, reserved, RzAsmLm32Imm16SignBitPos, RzAsmLm32Imm26SignBitPos, RzAsmLm32OpcodeList, RzAsmLm32OpcodeNumber, shift_and_signextend(), rz_asm_lm32_instruction::src0_reg, rz_asm_lm32_instruction::src1_reg, three_regs, two_regs, rz_asm_lm32_opcode::type, and rz_asm_lm32_instruction::value.

Referenced by disassemble().

rz_asm_lm32_stringify()

static int rz_asm_lm32_stringify ( RzAsmLm32Instruction *  instr, char *  str  )

static

Definition at line 354 of file asm_lm32.c.

                                                                         {
    if (write_reg_names_to_struct(instr)) {
        return -1;
    }
 
    // pseudo instructions need some special handling
    if (instr->pseudoInstruction) {
        // return after printing the decoded pseudo instruction, so it doesn't get overwritten
        return print_pseudo_instruction(instr, str);
    }
 
    // get opcode string
    strcpy(str, instr->op_decode.name);
 
    // get parameters (registers, immediate) string
    switch (instr->op_decode.type) {
    case reg_imm16_signextend:
        sprintf(str, "%s %s, %s, 0x%x", instr->op_decode.name, instr->dest_reg_str, instr->src0_reg_str,
            instr->immediate);
        break;
    case reg_imm16_zeroextend:
    case reg_imm5:
        sprintf(str, "%s %s, %s, 0x%x", instr->op_decode.name, instr->dest_reg_str, instr->src0_reg_str,
            instr->immediate);
        break;
    case reg_imm16_shift2_signextend:
        // print the branch/call destination address
        sprintf(str, "%s %s, %s, 0x%x", instr->op_decode.name, instr->dest_reg_str, instr->src0_reg_str,
            instr->immediate + instr->addr);
        break;
    case one_reg:
        sprintf(str, "%s %s", instr->op_decode.name, instr->src0_reg_str);
        break;
    case two_regs:
        sprintf(str, "%s %s, %s", instr->op_decode.name, instr->dest_reg_str, instr->src0_reg_str);
        break;
    case three_regs:
        sprintf(str, "%s %s, %s, %s", instr->op_decode.name, instr->dest_reg_str, instr->src0_reg_str,
            instr->src1_reg_str);
        break;
    case reg_csr:
        sprintf(str, "%s %s, %s", instr->op_decode.name, instr->csr_reg_str, instr->src0_reg_str);
        break;
    case csr_reg:
        sprintf(str, "%s %s, %s", instr->op_decode.name, instr->dest_reg_str, instr->csr_reg_str);
        break;
    case imm26:
        // print the branch/call destination address
        sprintf(str, "%s 0x%x", instr->op_decode.name, instr->immediate + instr->addr);
        break;
    // case raise_instr: //unneeded; handled as pseudo instruction
    default:
        return -1;
    }
    return 0;
}

References rz_asm_lm32_instruction::addr, csr_reg, rz_asm_lm32_instruction::csr_reg_str, rz_asm_lm32_instruction::dest_reg_str, imm26, rz_asm_lm32_instruction::immediate, rz_asm_lm32_opcode::name, one_reg, rz_asm_lm32_instruction::op_decode, print_pseudo_instruction(), rz_asm_lm32_instruction::pseudoInstruction, reg_csr, reg_imm16_shift2_signextend, reg_imm16_signextend, reg_imm16_zeroextend, reg_imm5, sprintf, rz_asm_lm32_instruction::src0_reg_str, rz_asm_lm32_instruction::src1_reg_str, cmd_descs_generate::str, three_regs, two_regs, rz_asm_lm32_opcode::type, and write_reg_names_to_struct().

Referenced by disassemble().

shift_and_signextend()

static st32 shift_and_signextend ( ut8  shift, ut8  sign_loc, ut32  val  )

static

Definition at line 98 of file asm_lm32.c.

                                                                    {
    ut32 tmp = val << shift;
    if (tmp & (1 << (shift + sign_loc))) {
        tmp |= ~((1 << (shift + sign_loc + 1)) - 1);
    }
    return tmp;
}

References shift(), autogen_x86imm::tmp, and val.

Referenced by rz_asm_lm32_decode().

write_reg_names_to_struct()

static int write_reg_names_to_struct ( RzAsmLm32Instruction *  instr )

static

Definition at line 250 of file asm_lm32.c.

                                                                  {
    switch (instr->op_decode.type) {
    case reg_imm16_signextend:
    case reg_imm16_shift2_signextend:
    case reg_imm16_zeroextend:
    case reg_imm5:
    case two_regs:
        if (reg_number_to_string(instr->dest_reg, instr->dest_reg_str)) {
            return -1;
        }
        if (reg_number_to_string(instr->src0_reg, instr->src0_reg_str)) {
            return -1;
        }
        break;
    case one_reg:
        if (reg_number_to_string(instr->src0_reg, instr->src0_reg_str)) {
            return -1;
        }
        break;
    case three_regs:
        if (reg_number_to_string(instr->dest_reg, instr->dest_reg_str)) {
            return -1;
        }
        if (reg_number_to_string(instr->src0_reg, instr->src0_reg_str)) {
            return -1;
        }
        if (reg_number_to_string(instr->src1_reg, instr->src1_reg_str)) {
            return -1;
        }
        break;
    case reg_csr:
        if (reg_number_to_string(instr->src0_reg, instr->src0_reg_str)) {
            return -1;
        }
        if (csr_number_to_string(instr->csr, instr->csr_reg_str)) {
            return -1;
        }
        break;
    case csr_reg:
        if (reg_number_to_string(instr->dest_reg, instr->dest_reg_str)) {
            return -1;
        }
        if (csr_number_to_string(instr->csr, instr->csr_reg_str)) {
            return -1;
        }
        break;
    case raise_instr:
    case imm26:
        break;
    default:
        return -1;
    }
    return 0;
}

References rz_asm_lm32_instruction::csr, csr_number_to_string(), csr_reg, rz_asm_lm32_instruction::csr_reg_str, rz_asm_lm32_instruction::dest_reg, rz_asm_lm32_instruction::dest_reg_str, imm26, one_reg, rz_asm_lm32_instruction::op_decode, raise_instr, reg_csr, reg_imm16_shift2_signextend, reg_imm16_signextend, reg_imm16_zeroextend, reg_imm5, reg_number_to_string(), rz_asm_lm32_instruction::src0_reg, rz_asm_lm32_instruction::src0_reg_str, rz_asm_lm32_instruction::src1_reg, rz_asm_lm32_instruction::src1_reg_str, three_regs, two_regs, and rz_asm_lm32_opcode::type.

Referenced by rz_asm_lm32_stringify().

Variable Documentation

rizin_plugin

RZ_API RzLibStruct rizin_plugin

Initial value:

= {
    .type = RZ_LIB_TYPE_ASM,
    .data = &rz_asm_plugin_lm32,
    .version = RZ_VERSION
}

Definition at line 459 of file asm_lm32.c.

rz_asm_plugin_lm32

RzAsmPlugin rz_asm_plugin_lm32

Initial value:

= {
    .name = "lm32",
    .arch = "lm32",
    .desc = "disassembly plugin for Lattice Micro 32 ISA",
    .author = "Felix Held",
    .license = "BSD",
    .bits = 32,
    .endian = RZ_SYS_ENDIAN_BIG,
    .disassemble = &disassemble,
}

Definition at line 447 of file asm_lm32.c.