33 "(^[\\[\\?\\/\\|\\\\\\{])|(┌)|(│)|(└)|"
34 "((∎)|[<\\}])([ :])(endloop[01]{1,2})"
42 "\\.new|:n?t|:raw|<err>"
49 "([CNPRMQVO][[:digit:]]{1,2}(:[[:digit:]]{1,2})?(in)?)"
56 "GP|HTID|UGP|LR|FP|SP"
63 "(0x[[:digit:]abcdef]+)"
70 "([[:alpha:]]+[[:digit:]]+[[:alpha:]]*)"
85 "([,;\\.\\(\\)\\{\\}:])"
99 "(\\])|(\\[|<{1,2}|>{1,2})"
107 "([[:alnum:]]+_[[:alnum:]]+)"
139 static bool hex_cfg_set(
void *user,
void *data) {
149 if (pnode == cnode) {
160 static bool hexagon_init(
void **user) {
170 SETCB(
"plugins.hexagon.imm.hash",
"true", &hex_cfg_set,
"Display ## before 32bit immediates and # before immidiates with other width.");
171 SETCB(
"plugins.hexagon.imm.sign",
"true", &hex_cfg_set,
"True: Print them with sign. False: Print signed immediates in unsigned representation.");
172 SETCB(
"plugins.hexagon.sdk",
"false", &hex_cfg_set,
"Print packet syntax in objdump style.");
173 SETCB(
"plugins.hexagon.reg.alias",
"true", &hex_cfg_set,
"Print the alias of registers (Alias from C0 = SA0).");
176 compile_token_patterns(
state->token_patterns);
214 .desc =
"Qualcomm Hexagon (QDSP6) V6",
215 .init = &hexagon_init,
220 #ifndef RZ_PLUGIN_INCORE
223 .data = &rz_asm_plugin_hexagon
RZ_API RzLibStruct rizin_plugin
static RzILOpEffect * rev(cs_insn *insn, bool is_thumb)
RZ_API void rz_asm_token_pattern_free(void *p)
static int disassemble(RzAsm *a, RzAsmOp *op, const ut8 *buf, int len)
static RZ_OWN RzPVector * get_token_patterns()
RZ_API RZ_BORROW RzConfigNode * rz_config_node_get(RzConfig *cfg, RZ_NONNULL const char *name)
RZ_API RzConfig * rz_config_new(void *user)
RZ_API RZ_BORROW RzConfig * hexagon_get_config()
RZ_API void hexagon_reverse_opcode(const RzAsm *rz_asm, HexReversedOpcode *rz_reverse, const ut8 *buf, const ut64 addr)
Reverses a given opcode and copies the result into one of the rizin structs in rz_reverse.
RZ_API HexState * hexagon_get_state()
Initializes each packet of the state once.
return strdup("=SP r13\n" "=LR r14\n" "=PC r15\n" "=A0 r0\n" "=A1 r1\n" "=A2 r2\n" "=A3 r3\n" "=ZF zf\n" "=SF nf\n" "=OF vf\n" "=CF cf\n" "=SN or0\n" "gpr lr .32 56 0\n" "gpr pc .32 60 0\n" "gpr cpsr .32 64 0 ____tfiae_________________qvczn\n" "gpr or0 .32 68 0\n" "gpr tf .1 64.5 0 thumb\n" "gpr ef .1 64.9 0 endian\n" "gpr jf .1 64.24 0 java\n" "gpr qf .1 64.27 0 sticky_overflow\n" "gpr vf .1 64.28 0 overflow\n" "gpr cf .1 64.29 0 carry\n" "gpr zf .1 64.30 0 zero\n" "gpr nf .1 64.31 0 negative\n" "gpr itc .4 64.10 0 if_then_count\n" "gpr gef .4 64.16 0 great_or_equal\n" "gpr r0 .32 0 0\n" "gpr r1 .32 4 0\n" "gpr r2 .32 8 0\n" "gpr r3 .32 12 0\n" "gpr r4 .32 16 0\n" "gpr r5 .32 20 0\n" "gpr r6 .32 24 0\n" "gpr r7 .32 28 0\n" "gpr r8 .32 32 0\n" "gpr r9 .32 36 0\n" "gpr r10 .32 40 0\n" "gpr r11 .32 44 0\n" "gpr r12 .32 48 0\n" "gpr r13 .32 52 0\n" "gpr r14 .32 56 0\n" "gpr r15 .32 60 0\n" "gpr r16 .32 64 0\n" "gpr r17 .32 68 0\n")
#define rz_warn_if_reached()
#define rz_return_if_fail(expr)
#define rz_return_val_if_fail(expr, val)
#define SETCB(w, x, y, z)
#define RZ_LOG_WARN(fmtstr,...)
RZ_API RzRegex * rz_regex_new(const char *pattern, const char *cflags)
RZ_API RzPVector * rz_pvector_new(RzPVectorFree free)
static void ** rz_pvector_push(RzPVector *vec, void *x)
#define rz_pvector_foreach(vec, it)
Pointer to the rizin structs for disassembled and analysed instructions.
Buffer packets for reversed instructions.
Pattern for a asm string token.