arc-ext.h File Reference

Go to the source code of this file.

Macros
#define	IGNORE_FIRST_OPD   1
#define	UNMANGLED

Enumerations
enum	ExtOperType {   EXT_INSTRUCTION = 0 , EXT_CORE_REGISTER = 1 , EXT_AUX_REGISTER = 2 , EXT_COND_CODE = 3 ,   EXT_INSTRUCTION32 = 4 , EXT_AC_INSTRUCTION = 4 , EXT_REMOVE_CORE_REG = 5 , EXT_LONG_CORE_REGISTER = 6 ,   EXT_AUX_REGISTER_EXTENDED = 7 , EXT_INSTRUCTION32_EXTENDED = 8 , EXT_CORE_REGISTER_CLASS = 9 }
enum	ExtReadWrite { REG_INVALID , REG_READ , REG_WRITE , REG_READWRITE }

Functions
void	build_ARC_extmap (void *text_bfd)
enum ExtReadWrite	arcExtMap_coreReadWrite (int regnum)
const char *	arcExtMap_coreRegName (int regnum)
const char *	arcExtMap_auxRegName (long regnum)
const char *	arcExtMap_condCodeName (int code)
const char *	arcExtMap_instName (int opcode, int insn, int *flags)
void	dump_ARC_extmap (void)

Macro Definition Documentation

IGNORE_FIRST_OPD

#define IGNORE_FIRST_OPD   1

Definition at line 50 of file arc-ext.h.

UNMANGLED

#define UNMANGLED

Definition at line 54 of file arc-ext.h.

Enumeration Type Documentation

ExtOperType

enum ExtOperType

Enumerator
EXT_INSTRUCTION
EXT_CORE_REGISTER
EXT_AUX_REGISTER
EXT_COND_CODE
EXT_INSTRUCTION32
EXT_AC_INSTRUCTION
EXT_REMOVE_CORE_REG
EXT_LONG_CORE_REGISTER
EXT_AUX_REGISTER_EXTENDED
EXT_INSTRUCTION32_EXTENDED
EXT_CORE_REGISTER_CLASS

Definition at line 60 of file arc-ext.h.

{
  EXT_INSTRUCTION            = 0,
  EXT_CORE_REGISTER          = 1,
  EXT_AUX_REGISTER           = 2,
  EXT_COND_CODE              = 3,
  EXT_INSTRUCTION32          = 4,    /* why are there     */
  EXT_AC_INSTRUCTION         = 4,    /* two with value 4? */
  EXT_REMOVE_CORE_REG        = 5,
  EXT_LONG_CORE_REGISTER     = 6,
  EXT_AUX_REGISTER_EXTENDED  = 7,
  EXT_INSTRUCTION32_EXTENDED = 8,
  EXT_CORE_REGISTER_CLASS    = 9
};

ExtReadWrite

enum ExtReadWrite

Enumerator
REG_INVALID
REG_READ
REG_WRITE
REG_READWRITE

Definition at line 76 of file arc-ext.h.

{
  REG_INVALID,
  REG_READ,
  REG_WRITE,
  REG_READWRITE
};

Function Documentation

arcExtMap_auxRegName()

const char* arcExtMap_auxRegName

(

long

regnum

)

Definition at line 435 of file arc-ext.c.

{
  /* Walk the list of auxiliary register names and find the name.  */
  struct ExtAuxRegister *r;
 
  for (r = arc_extension_map.auxRegisters; r; r = r->next)
    {
      if (r->address == address) {
          return (const char *)r->name;
      }
    }
  return NULL;
}

References ExtAuxRegister::address, arc_extension_map, arcExtMap::auxRegisters, NULL, and r.

Referenced by _auxRegName().

arcExtMap_condCodeName()

const char* arcExtMap_condCodeName

(

int

code

)

Definition at line 424 of file arc-ext.c.

{
    if (code < FIRST_EXTENSION_CONDITION_CODE || code > LAST_EXTENSION_CONDITION_CODE) {
        return NULL;
    }
    return arc_extension_map.condCodes[code - FIRST_EXTENSION_CONDITION_CODE];
}

References arc_extension_map, arcExtMap::condCodes, FIRST_EXTENSION_CONDITION_CODE, LAST_EXTENSION_CONDITION_CODE, and NULL.

Referenced by _condCodeName().

arcExtMap_coreReadWrite()

enum ExtReadWrite arcExtMap_coreReadWrite

(

int

regnum

)

Definition at line 402 of file arc-ext.c.

{
    if (regnum < FIRST_EXTENSION_CORE_REGISTER || regnum > LAST_EXTENSION_CORE_REGISTER) {
        return REG_INVALID;
    }
    return arc_extension_map.coreRegisters[regnum - FIRST_EXTENSION_CORE_REGISTER].rw;
}

References arc_extension_map, arcExtMap::coreRegisters, FIRST_EXTENSION_CORE_REGISTER, LAST_EXTENSION_CORE_REGISTER, ExtCoreRegister::name, and NULL.

arcExtMap_coreRegName()

const char* arcExtMap_coreRegName

(

int

regnum

)

Definition at line 402 of file arc-ext.c.

{
    if (regnum < FIRST_EXTENSION_CORE_REGISTER || regnum > LAST_EXTENSION_CORE_REGISTER) {
        return NULL;
    }
    return arc_extension_map.coreRegisters[regnum - FIRST_EXTENSION_CORE_REGISTER].name;
}

Referenced by _coreRegName().

arcExtMap_instName()

const char* arcExtMap_instName	(	int	opcode,
		int	insn,
		int *	flags
	)

Definition at line 300 of file arc-ext.c.

{
  /* Here the following tasks need to be done.  First of all, the opcode
     stored in the Extension Map is the real opcode.  However, the subopcode
     stored in the instruction to be disassembled is mangled.  We pass (in
     minor opcode), the instruction word.  Here we will un-mangle it and get
     the real subopcode which we can look for in the Extension Map.  This
     function is used both for the ARCTangent and the ARCompact, so we would
     also need some sort of a way to distinguish between the two
     architectures.  This is because the ARCTangent does not do any of this
     mangling so we have no issues there.  */
 
  /* If P[22:23] is 0 or 2 then un-mangle using iiiiiI.  If it is 1 then use
     iiiiIi.  Now, if P is 3 then check M[5:5] and if it is 0 then un-mangle
     using iiiiiI else iiiiii.  */
 
  unsigned char minor;
  struct ExtInstruction *temp;
 
  if (*flags != E_ARC_MACH_A4) /* ARCompact extension instructions.  */
    {
      /* 16-bit instructions.  */
      if (0x08 <= opcode && opcode <= 0x0b)
    {
      /* I - set but not used */
      unsigned char /* I, */ b, c, i;
 
      /* I = (insn & 0xf800) >> 11; */
      b = (insn & 0x0700) >> 8;
      c = (insn & 0x00e0) >> 5;
      i = (insn & 0x001f);
 
      if (i) {
          minor = i;
      } else {
          minor = (c == 0x07) ? b : c;
      }
    }
      /* 32-bit instructions.  */
      else
    {
      /* P, M - set but not used */
      unsigned char /* P, M, */ I, A, B;
 
      /* P = (insn & 0x00c00000) >> 22; */
      /* M = (insn & 0x00000020); */
      I = (insn & 0x003f0000) >> 16;
      A = (insn & 0x0000003f);
      B = ((insn & 0x07000000) >> 24) | ((insn & 0x00007000) >> 9);
 
      if (I != 0x2f)
        {
#ifndef UNMANGLED
          switch (P)
        {
        case 3:
          if (M)
            {
              minor = I;
              break;
            }
        case 0:
        case 2:
          minor = (I >> 1) | ((I & 0x1) << 5);
          break;
        case 1:
          minor = (I >> 1) | (I & 0x1) | ((I & 0x2) << 4);
        }
#else
          minor = I;
#endif
        }
      else
        {
            if (A != 0x3f) {
                minor = A;
            } else {
                minor = B;
            }
        }
    }
  } else { /* ARCTangent extension instructions.  */
      minor = insn;
  }
 
  temp = arc_extension_map.instructions[INST_HASH (opcode, minor)];
  while (temp)
    {
      if ((temp->major == opcode) && (temp->minor == minor))
    {
      *flags = temp->flags;
      return temp->name;
    }
      temp = temp->next;
    }
 
  return NULL;
}

References A, arc_extension_map, b, B, c, E_ARC_MACH_A4, ExtInstruction::flags, flags, I, i, INST_HASH, arcExtMap::instructions, M, ExtInstruction::major, ExtInstruction::minor, minor, ExtInstruction::name, ExtInstruction::next, NULL, and P.

Referenced by _instName().

build_ARC_extmap()

void build_ARC_extmap

(

void *

text_bfd

)

Definition at line 453 of file arc-ext.c.

{
#if 0
  asection *sect;
 
  /* the map is built each time gdb loads an executable file - so free any
   * existing map, as the map defined by the new file may differ from the old
   */
  destroy_map();
 
  for (sect = text_bfd->sections; sect != NULL; sect = sect->next)
    if (!strncmp (sect->name,
                  ".gnu.linkonce.arcextmap.",
          sizeof (".gnu.linkonce.arcextmap.") - 1)
        || !strcmp (sect->name,".arcextmap"))
      {
        bfd_size_type  count  = bfd_get_section_size (sect);
        unsigned char* buffer = xmalloc (count);
 
        if (buffer)
          {
            if (bfd_get_section_contents (text_bfd, sect, buffer, 0, count))
              create_map(buffer, count);
            free (buffer);
          }
      }
#endif
}

References bfd_get_section_contents(), bfd_get_section_size, count, free(), bfd_section::name, bfd_section::next, NULL, and xmalloc.

dump_ARC_extmap()

void dump_ARC_extmap

(

void

)

Definition at line 483 of file arc-ext.c.

{
    struct ExtAuxRegister* r;
    int                    i;
 
    r = arc_extension_map.auxRegisters;
 
    while (r)
    {
        printf("AUX : %s %ld\n", r->name, r->address);
        r = r->next;
    }
 
    for (i = 0; i < INST_HASH_SIZE; i++)
    {
        struct ExtInstruction *insn;
 
    for (insn = arc_extension_map.instructions[i]; insn != NULL; insn = insn->next) {
        printf ("INST: %d %d %x %s\n", insn->major, insn->minor, insn->flags, insn->name);
    }
    }
 
    for (i = 0; i < NUM_EXT_CORE; i++)
    {
        struct ExtCoreRegister reg = arc_extension_map.coreRegisters[i];
 
    if (reg.name) {
        printf ("CORE: %s %d %s\n", reg.name, reg.number, ExtReadWrite_image (reg.rw));
    }
    }
 
    for (i = 0; i < NUM_EXT_COND; i++) {
        if (arc_extension_map.condCodes[i]) {
            printf ("COND: %s\n", arc_extension_map.condCodes[i]);
        }
    }
}

References arc_extension_map, arcExtMap::auxRegisters, arcExtMap::condCodes, arcExtMap::coreRegisters, ExtReadWrite_image(), ExtInstruction::flags, i, INST_HASH_SIZE, arcExtMap::instructions, ExtInstruction::major, ExtInstruction::minor, ExtInstruction::name, ExtInstruction::next, NULL, NUM_EXT_COND, NUM_EXT_CORE, printf(), r, and reg.