Rizin
unix-like reverse engineering framework and cli tools
analysis_v850.c
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1 // SPDX-FileCopyrightText: 2012-2020 pancake <pancake@nopcode.org>
2 // SPDX-FileCopyrightText: 2014 Fedor Sakharov <fedor.sakharov@gmail.com>
3 // SPDX-License-Identifier: LGPL-3.0-only
4 
5 #include <string.h>
6 #include <rz_types.h>
7 #include <rz_lib.h>
8 #include <rz_asm.h>
9 #include <rz_analysis.h>
10 #include <rz_util.h>
11 #include <rz_endian.h>
12 
13 #include <v850_disas.h>
14 
15 // Format I
16 #define F1_REG1(instr) ((instr)&0x1F)
17 #define F1_REG2(instr) (((instr)&0xF800) >> 11)
18 
19 #define F1_RN1(instr) (V850_REG_NAMES[F1_REG1(instr)])
20 #define F1_RN2(instr) (V850_REG_NAMES[F1_REG2(instr)])
21 
22 // Format II
23 #define F2_IMM(instr) F1_REG1(instr)
24 #define F2_REG2(instr) F1_REG2(instr)
25 
26 #define F2_RN2(instr) (V850_REG_NAMES[F2_REG2(instr)])
27 
28 // Format III
29 #define F3_COND(instr) ((instr)&0xF)
30 #define F3_DISP(instr) (((instr)&0x70) >> 4) | (((instr)&0xF800) >> 7)
31 
32 // Format IV
33 #define F4_DISP(instr) ((instr)&0x3F)
34 #define F4_REG2(instr) F1_REG2(instr)
35 
36 #define F4_RN2(instr) (V850_REG_NAMES[F4_REG2(instr)])
37 
38 // Format V
39 #define F5_REG2(instr) F1_REG2(instr)
40 #define F5_DISP(instr) ((((ut32)(instr)&0xffff) << 31) | (((ut32)(instr)&0xffff0000) << 1))
41 #define F5_RN2(instr) (V850_REG_NAMES[F5_REG2(instr)])
42 
43 // Format VI
44 #define F6_REG1(instr) F1_REG1(instr)
45 #define F6_REG2(instr) F1_REG2(instr)
46 #define F6_IMM(instr) (((instr)&0xFFFF0000) >> 16)
47 
48 #define F6_RN1(instr) (V850_REG_NAMES[F6_REG1(instr)])
49 #define F6_RN2(instr) (V850_REG_NAMES[F6_REG2(instr)])
50 
51 // Format VII
52 #define F7_REG1(instr) F1_REG1(instr)
53 #define F7_REG2(instr) F1_REG2(instr)
54 #define F7_DISP(instr) F6_IMM(instr)
55 
56 #define F7_RN1(instr) (V850_REG_NAMES[F7_REG1(instr)])
57 #define F7_RN2(instr) (V850_REG_NAMES[F7_REG2(instr)])
58 
59 // Format VIII
60 #define F8_REG1(instr) F1_REG1(instr)
61 #define F8_DISP(instr) F6_IMM(instr)
62 #define F8_BIT(instr) (((instr)&0x3800) >> 11)
63 #define F8_SUB(instr) (((instr)&0xC000) >> 14)
64 
65 #define F8_RN1(instr) (V850_REG_NAMES[F8_REG1(instr)])
66 #define F8_RN2(instr) (V850_REG_NAMES[F8_REG2(instr)])
67 
68 // Format IX
69 // Also regID/cond
70 #define F9_REG1(instr) F1_REG1(instr)
71 #define F9_REG2(instr) F1_REG2(instr)
72 #define F9_SUB(instr) (((instr)&0x7E00000) >> 21)
73 
74 #define F9_RN1(instr) (V850_REG_NAMES[F9_REG1(instr)])
75 #define F9_RN2(instr) (V850_REG_NAMES[F9_REG2(instr)])
76 // TODO: Format X
77 
78 // Format XI
79 #define F11_REG1(instr) F1_REG1(instr)
80 #define F11_REG2(instr) F1_REG2(instr)
81 #define F11_REG3(instr) (((instr)&0xF8000000) >> 27)
82 #define F11_SUB(instr) ((((instr)&0x7E00000) >> 20) | (((instr)&2) >> 1))
83 
84 #define F11_RN1(instr) (V850_REG_NAMES[F11_REG1(instr)])
85 #define F11_RN2(instr) (V850_REG_NAMES[F11_REG2(instr)])
86 // Format XII
87 #define F12_IMM(instr) (F1_REG1(instr) | (((instr)&0x7C0000) >> 13))
88 #define F12_REG2(instr) F1_REG2(instr)
89 #define F12_REG3(instr) (((instr)&0xF8000000) >> 27)
90 #define F12_SUB(instr) ((((instr)&0x7800001) >> 22) | (((instr)&2) >> 1))
91 
92 #define F12_RN2(instr) (V850_REG_NAMES[F12_REG2(instr)])
93 #define F12_RN3(instr) (V850_REG_NAMES[F12_REG3(instr)])
94 
95 // Format XIII
96 #define F13_IMM(instr) (((instr)&0x3E) >> 1)
97 // Also a subopcode
98 #define F13_REG2(instr) (((instr)&0x1F0000) >> 16)
99 #define F13_LIST(instr) (((instr) && 0xFFE00000) >> 21)
100 
101 #define F13_RN2(instr) (V850_REG_NAMES[F13_REG2(instr)])
102 
103 static const char *V850_REG_NAMES[] = {
104  "zero",
105  "r1",
106  "r2",
107  "r3",
108  "r4",
109  "r5",
110  "r6",
111  "r7",
112  "r8",
113  "r9",
114  "r10",
115  "r11",
116  "r12",
117  "r13",
118  "r14",
119  "r15",
120  "r16",
121  "r17",
122  "r18",
123  "r19",
124  "r20",
125  "r21",
126  "r22",
127  "r23",
128  "r24",
129  "r25",
130  "r26",
131  "r27",
132  "r28",
133  "r29",
134  "ep",
135  "lp",
136 };
137 
138 static void update_flags(RzAnalysisOp *op, int flags) {
139  if (flags & V850_FLAG_CY) {
140  rz_strbuf_append(&op->esil, "31,$c,cy,:=");
141  }
142  if (flags & V850_FLAG_OV) {
143  rz_strbuf_append(&op->esil, ",31,$o,ov,:=");
144  }
145  if (flags & V850_FLAG_S) {
146  rz_strbuf_append(&op->esil, ",31,$s,s,:=");
147  }
148  if (flags & V850_FLAG_Z) {
149  rz_strbuf_append(&op->esil, ",$z,z,:=");
150  }
151 }
152 
153 static void clear_flags(RzAnalysisOp *op, int flags) {
154  if (flags & V850_FLAG_CY) {
155  rz_strbuf_append(&op->esil, ",0,cy,=");
156  }
157  if (flags & V850_FLAG_OV) {
158  rz_strbuf_append(&op->esil, ",0,ov,=");
159  }
160  if (flags & V850_FLAG_S) {
161  rz_strbuf_append(&op->esil, ",0,s,=");
162  }
163  if (flags & V850_FLAG_Z) {
164  rz_strbuf_append(&op->esil, ",0,z,=");
165  }
166 }
167 
168 static int v850_op(RzAnalysis *analysis, RzAnalysisOp *op, ut64 addr, const ut8 *buf, int len, RzAnalysisOpMask mask) {
169  int ret = 0;
170  ut8 opcode = 0;
171  const char *reg1 = NULL;
172  const char *reg2 = NULL;
173  ut32 bitmask = 0;
174  ut16 destaddr = 0;
175  st16 destaddrs = 0;
176  ut16 word1 = 0, word2 = 0;
177  struct v850_cmd cmd;
178 
179  if (len < 1 || (len > 0 && !memcmp(buf, "\xff\xff\xff\xff\xff\xff", RZ_MIN(len, 6)))) {
180  return -1;
181  }
182 
183  memset(&cmd, 0, sizeof(cmd));
184 
185  ret = op->size = v850_decode_command(buf, len, &cmd);
186 
187  if (ret < 1) {
188  return ret;
189  }
190 
191  op->addr = addr;
192 
193  word1 = rz_read_le16(buf);
194  if (ret == 4) {
195  word2 = rz_read_le16(buf + 2);
196  }
197  opcode = get_opcode(word1);
198 
199  switch (opcode) {
200  case V850_MOV_IMM5:
201  case V850_MOV:
202  // 2 formats
203  op->type = RZ_ANALYSIS_OP_TYPE_MOV;
204  if (opcode != V850_MOV_IMM5) { // Format I
205  rz_strbuf_appendf(&op->esil, "%s,%s,=", F1_RN1(word1), F1_RN2(word1));
206  } else { // Format II
207  rz_strbuf_appendf(&op->esil, "%" PFMT64d ",%s,=", (st64)(F2_IMM(word1)), F2_RN2(word1));
208  }
209  break;
210  case V850_MOVEA:
211  op->type = RZ_ANALYSIS_OP_TYPE_MOV;
212  // FIXME: to decide about reading 16/32 bit and use only macros to access
213  rz_strbuf_appendf(&op->esil, "%s,0xffff,&,%u,+,%s,=", F6_RN1(word1), word2, F6_RN2(word1));
214  break;
215  case V850_SLDB:
216  case V850_SLDH:
217  case V850_SLDW:
218  op->type = RZ_ANALYSIS_OP_TYPE_LOAD;
219  if (F4_REG2(word1) == V850_SP) {
220  op->stackop = RZ_ANALYSIS_STACK_GET;
221  op->stackptr = 0;
222  op->ptr = 0;
223  }
224  break;
225  case V850_SSTB:
226  case V850_SSTH:
227  case V850_SSTW:
228  op->type = RZ_ANALYSIS_OP_TYPE_STORE;
229  if (F4_REG2(word1) == V850_SP) {
230  op->stackop = RZ_ANALYSIS_STACK_SET;
231  op->stackptr = 0;
232  op->ptr = 0;
233  }
234  break;
235  case V850_NOT:
236  op->type = RZ_ANALYSIS_OP_TYPE_NOT;
237  rz_strbuf_appendf(&op->esil, "%s,0xffffffff,^,%s,=", F1_RN1(word1), F1_RN2(word1));
238  update_flags(op, V850_FLAG_S | V850_FLAG_Z);
239  clear_flags(op, V850_FLAG_OV);
240  break;
241  case V850_DIVH:
242  op->type = RZ_ANALYSIS_OP_TYPE_DIV;
243  rz_strbuf_appendf(&op->esil, "%s,%s,0xffff,&,/,%s,=",
244  F1_RN1(word1), F1_RN2(word1), F1_RN2(word1));
245  update_flags(op, V850_FLAG_OV | V850_FLAG_S | V850_FLAG_Z);
246  break;
247  case V850_JMP:
248  if (F1_REG1(word1) == 31) {
249  op->type = RZ_ANALYSIS_OP_TYPE_RET;
250  } else {
251  op->type = RZ_ANALYSIS_OP_TYPE_UJMP;
252  }
253  op->jump = word1; // UT64_MAX; // this is n RJMP instruction .. F1_RN1 (word1);
254  op->fail = addr + 2;
255  rz_strbuf_appendf(&op->esil, "%s,pc,=", F1_RN1(word1));
256  break;
257  case V850_JARL2:
258  // TODO: fix displacement reading
259  op->type = RZ_ANALYSIS_OP_TYPE_JMP;
260  op->jump = addr + F5_DISP(((ut32)word2 << 16) | word1);
261  op->fail = addr + 4;
262  rz_strbuf_appendf(&op->esil, "pc,%s,=,pc,%u,+=", F5_RN2(word1), F5_DISP(((ut32)word2 << 16) | word1));
263  break;
264 #if 0 // same opcode as JARL?
265  case V850_JR:
266  jumpdisp = DISP26(word1, word2);
267  op->type = RZ_ANALYSIS_OP_TYPE_JMP;
268  rz_strbuf_appendf (&op->esil, "$$,%d,+,pc,=", jumpdisp);
269  break;
270 #endif
271  case V850_OR:
272  op->type = RZ_ANALYSIS_OP_TYPE_OR;
273  rz_strbuf_appendf(&op->esil, "%s,%s,|=", F1_RN1(word1), F1_RN2(word1));
274  update_flags(op, V850_FLAG_S | V850_FLAG_Z);
275  clear_flags(op, V850_FLAG_OV);
276  break;
277  case V850_ORI:
278  op->type = RZ_ANALYSIS_OP_TYPE_OR;
279  rz_strbuf_appendf(&op->esil, "%hu,%s,|,%s,=",
280  word2, F6_RN1(word1), F6_RN2(word1));
281  update_flags(op, V850_FLAG_S | V850_FLAG_Z);
282  clear_flags(op, V850_FLAG_OV);
283  break;
284  case V850_MULH:
285  case V850_MULH_IMM5:
286  op->type = RZ_ANALYSIS_OP_TYPE_MUL;
287  break;
288  case V850_XOR:
289  op->type = RZ_ANALYSIS_OP_TYPE_XOR;
290  rz_strbuf_appendf(&op->esil, "%s,%s,^=", F1_RN1(word1), F1_RN2(word1));
291  update_flags(op, V850_FLAG_S | V850_FLAG_Z);
292  clear_flags(op, V850_FLAG_OV);
293  break;
294  case V850_XORI:
295  op->type = RZ_ANALYSIS_OP_TYPE_XOR;
296  rz_strbuf_appendf(&op->esil, "%hu,%s,^,%s,=", word2, F6_RN1(word1), F6_RN2(word1));
297  update_flags(op, V850_FLAG_S | V850_FLAG_Z);
298  clear_flags(op, V850_FLAG_OV);
299  break;
300  case V850_AND:
301  op->type = RZ_ANALYSIS_OP_TYPE_AND;
302  rz_strbuf_appendf(&op->esil, "%s,%s,&=", F1_RN1(word1), F1_RN2(word1));
303  update_flags(op, V850_FLAG_S | V850_FLAG_Z);
304  clear_flags(op, V850_FLAG_OV);
305  break;
306  case V850_ANDI:
307  op->type = RZ_ANALYSIS_OP_TYPE_AND;
308  rz_strbuf_appendf(&op->esil, "%hu,%s,&,%s,=", word2, F6_RN1(word1), F6_RN2(word1));
309  update_flags(op, V850_FLAG_Z);
310  clear_flags(op, V850_FLAG_OV | V850_FLAG_S);
311  break;
312  case V850_CMP:
313  op->type = RZ_ANALYSIS_OP_TYPE_CMP;
314  rz_strbuf_appendf(&op->esil, "%s,%s,==", F1_RN1(word1), F1_RN2(word1));
315  update_flags(op, -1);
316  break;
317  case V850_CMP_IMM5:
318  op->type = RZ_ANALYSIS_OP_TYPE_CMP;
319  rz_strbuf_appendf(&op->esil, "%d,%s,==", (st8)SIGN_EXT_T5(F2_IMM(word1)), F2_RN2(word1));
320  update_flags(op, -1);
321  break;
322  case V850_TST:
323  op->type = RZ_ANALYSIS_OP_TYPE_CMP;
324  rz_strbuf_appendf(&op->esil, "%s,%s,&", F1_RN1(word1), F1_RN2(word1));
325  update_flags(op, V850_FLAG_S | V850_FLAG_Z);
326  clear_flags(op, V850_FLAG_OV);
327  break;
328  case V850_SUB:
329  op->type = RZ_ANALYSIS_OP_TYPE_SUB;
330  rz_strbuf_appendf(&op->esil, "%s,%s,-=", F1_RN1(word1), F1_RN2(word1));
331  update_flags(op, -1);
332  break;
333  case V850_SUBR:
334  op->type = RZ_ANALYSIS_OP_TYPE_SUB;
335  rz_strbuf_appendf(&op->esil, "%s,%s,-,%s=", F1_RN2(word1), F1_RN1(word1), F1_RN2(word1));
336  update_flags(op, -1);
337  break;
338  case V850_ADD:
339  op->type = RZ_ANALYSIS_OP_TYPE_ADD;
340  rz_strbuf_appendf(&op->esil, "%s,%s,+=", F1_RN1(word1), F1_RN2(word1));
341  update_flags(op, -1);
342  break;
343  case V850_ADD_IMM5:
344  op->type = RZ_ANALYSIS_OP_TYPE_ADD;
345  if (F2_REG2(word1) == V850_SP) {
346  op->stackop = RZ_ANALYSIS_STACK_INC;
347  op->stackptr = F2_IMM(word1);
348  op->val = op->stackptr;
349  }
350  rz_strbuf_appendf(&op->esil, "%d,%s,+=", (st8)SIGN_EXT_T5(F2_IMM(word1)), F2_RN2(word1));
351  update_flags(op, -1);
352  break;
353  case V850_ADDI:
354  op->type = RZ_ANALYSIS_OP_TYPE_ADD;
355  if (F6_REG2(word1) == V850_SP) {
356  op->stackop = RZ_ANALYSIS_STACK_INC;
357  op->stackptr = (st64)word2;
358  op->val = op->stackptr;
359  }
360  rz_strbuf_appendf(&op->esil, "%d,%s,+,%s,=", (st32)word2, F6_RN1(word1), F6_RN2(word1));
361  update_flags(op, -1);
362  break;
363  case V850_SHR_IMM5:
364  op->type = RZ_ANALYSIS_OP_TYPE_SHR;
365  rz_strbuf_appendf(&op->esil, "%u,%s,>>=", (ut8)F2_IMM(word1), F2_RN2(word1));
366  update_flags(op, V850_FLAG_CY | V850_FLAG_S | V850_FLAG_Z);
367  clear_flags(op, V850_FLAG_OV);
368  break;
369  case V850_SAR_IMM5:
370  op->type = RZ_ANALYSIS_OP_TYPE_SAR;
371  ut16 imm5 = F2_IMM(word1);
372  reg2 = F2_RN2(word1);
373  rz_strbuf_appendf(&op->esil, "31,%s,>>,?{,%u,32,-,%u,1,<<,--,<<,}{,0,},%u,%s,>>,|,%s,=", reg2, (ut8)imm5, (ut8)imm5, (ut8)imm5, reg2, reg2);
374  update_flags(op, V850_FLAG_CY | V850_FLAG_S | V850_FLAG_Z);
375  clear_flags(op, V850_FLAG_OV);
376  break;
377  case V850_SHL_IMM5:
378  op->type = RZ_ANALYSIS_OP_TYPE_SHL;
379  rz_strbuf_appendf(&op->esil, "%u,%s,<<=", (ut8)F2_IMM(word1), F2_RN2(word1));
380  update_flags(op, V850_FLAG_CY | V850_FLAG_S | V850_FLAG_Z);
381  clear_flags(op, V850_FLAG_OV);
382  break;
383  case V850_BCOND:
384  case V850_BCOND2:
385  case V850_BCOND3:
386  case V850_BCOND4:
387  destaddr = ((((word1 >> 4) & 0x7) |
388  ((word1 >> 11) << 3))
389  << 1);
390  if (destaddr & 0x100) {
391  destaddrs = destaddr | 0xFE00;
392  } else {
393  destaddrs = destaddr;
394  }
395  op->jump = addr + destaddrs;
396  op->fail = addr + 2;
397  op->type = RZ_ANALYSIS_OP_TYPE_CJMP;
398  switch (F3_COND(word1)) {
399  case V850_COND_V:
400  rz_strbuf_appendf(&op->esil, "ov");
401  break;
402  case V850_COND_CL:
403  rz_strbuf_appendf(&op->esil, "cy");
404  break;
405  case V850_COND_ZE:
406  rz_strbuf_appendf(&op->esil, "z");
407  break;
408  case V850_COND_NH:
409  rz_strbuf_appendf(&op->esil, "cy,z,|");
410  break;
411  case V850_COND_N:
412  rz_strbuf_appendf(&op->esil, "s");
413  break;
414  case V850_COND_AL: // Always
415  rz_strbuf_appendf(&op->esil, "1");
416  break;
417  case V850_COND_LT:
418  rz_strbuf_appendf(&op->esil, "s,ov,^");
419  break;
420  case V850_COND_LE:
421  rz_strbuf_appendf(&op->esil, "s,ov,^,z,|");
422  break;
423  case V850_COND_NV:
424  rz_strbuf_appendf(&op->esil, "ov,!");
425  break;
426  case V850_COND_NL:
427  rz_strbuf_appendf(&op->esil, "cy,!");
428  break;
429  case V850_COND_NE:
430  rz_strbuf_appendf(&op->esil, "z,!");
431  break;
432  case V850_COND_H:
433  rz_strbuf_appendf(&op->esil, "cy,z,|,!");
434  break;
435  case V850_COND_P:
436  rz_strbuf_appendf(&op->esil, "s,!");
437  break;
438  case V850_COND_GE:
439  rz_strbuf_appendf(&op->esil, "s,ov,^,!");
440  break;
441  case V850_COND_GT:
442  rz_strbuf_appendf(&op->esil, "s,ov,^,z,|,!");
443  break;
444  }
445  rz_strbuf_appendf(&op->esil, ",?{,$$,%d,+,pc,=,}", destaddrs);
446  break;
447  case V850_BIT_MANIP: {
448  ut8 bitop = word1 >> 14;
449  switch (bitop) {
450  case V850_BIT_CLR1:
451  bitmask = (1 << F8_BIT(word1));
452  rz_strbuf_appendf(&op->esil, "%hu,%s,+,[1],%u,&,%hu,%s,+,=[1]", word2, F8_RN1(word1), bitmask, word2, F8_RN1(word1));
453  // TODO: Read the value of the memory byte and set zero flag accordingly!
454  break;
455  case V850_BIT_NOT1:
456  bitmask = (1 << F8_BIT(word1));
457  rz_strbuf_appendf(&op->esil, "%hu,%s,+,[1],%u,^,%hu,%s,+,=[1]", word2, F8_RN1(word1), bitmask, word2, F8_RN1(word1));
458  // TODO: Read the value of the memory byte and set zero flag accordingly!
459  break;
460  }
461  } break;
462  case V850_EXT1:
463  switch (get_subopcode(word1 | (ut32)word2 << 16)) {
464  case V850_EXT_SHL:
465  op->type = RZ_ANALYSIS_OP_TYPE_SHL;
466  rz_strbuf_appendf(&op->esil, "%s,%s,<<=", F9_RN1(word1), F9_RN2(word1));
467  update_flags(op, V850_FLAG_CY | V850_FLAG_S | V850_FLAG_Z);
468  clear_flags(op, V850_FLAG_OV);
469  break;
470  case V850_EXT_SHR:
471  op->type = RZ_ANALYSIS_OP_TYPE_SHR;
472  rz_strbuf_appendf(&op->esil, "%s,%s,>>=", F9_RN1(word1), F9_RN2(word1));
473  update_flags(op, V850_FLAG_CY | V850_FLAG_S | V850_FLAG_Z);
474  clear_flags(op, V850_FLAG_OV);
475  break;
476  case V850_EXT_SAR:
477  op->type = RZ_ANALYSIS_OP_TYPE_SAR;
478  reg1 = F9_RN1(word1);
479  reg2 = F9_RN2(word1);
480  rz_strbuf_appendf(&op->esil, "31,%s,>>,?{,%s,32,-,%s,1,<<,--,<<,}{,0,},%s,%s,>>,|,%s,=", reg2, reg1, reg1, reg1, reg2, reg2);
481  update_flags(op, V850_FLAG_CY | V850_FLAG_S | V850_FLAG_Z);
482  clear_flags(op, V850_FLAG_OV);
483  break;
484  }
485  break;
486  }
487 
488  return ret;
489 }
490 
491 static char *get_reg_profile(RzAnalysis *analysis) {
492  const char *p =
493  "=PC pc\n"
494  "=SP r3\n"
495  "=ZF z\n"
496  "=A0 r1\n"
497  "=A1 r5\n"
498  "=A2 r6\n"
499  "=A3 r7\n"
500  "=A4 r8\n"
501  "=SF s\n"
502  "=OF ov\n"
503  "=CF cy\n"
504 
505  "gpr zero .32 ? 0\n"
506  "gpr r0 .32 0 0\n"
507  "gpr r1 .32 4 0\n"
508  "gpr r2 .32 8 0\n"
509  "gpr r3 .32 12 0\n"
510  "gpr sp .32 12 0\n"
511  "gpr r4 .32 16 0\n"
512  "gpr gp .32 16 0\n"
513  "gpr r5 .32 20 0\n"
514  "gpr tp .32 20 0\n"
515  "gpr r6 .32 24 0\n"
516  "gpr r7 .32 28 0\n"
517  "gpr r8 .32 32 0\n"
518  "gpr r9 .32 36 0\n"
519  "gpr r10 .32 40 0\n"
520  "gpr r11 .32 44 0\n"
521  "gpr r12 .32 48 0\n"
522  "gpr r13 .32 52 0\n"
523  "gpr r14 .32 56 0\n"
524  "gpr r15 .32 60 0\n"
525  "gpr r16 .32 64 0\n"
526  "gpr r17 .32 68 0\n"
527  "gpr r18 .32 72 0\n"
528  "gpr r19 .32 76 0\n"
529  "gpr r20 .32 80 0\n"
530  "gpr r21 .32 84 0\n"
531  "gpr r22 .32 88 0\n"
532  "gpr r23 .32 92 0\n"
533  "gpr r24 .32 96 0\n"
534  "gpr r25 .32 100 0\n"
535  "gpr r26 .32 104 0\n"
536  "gpr r27 .32 108 0\n"
537  "gpr r28 .32 112 0\n"
538  "gpr r29 .32 116 0\n"
539  "gpr r30 .32 120 0\n"
540  "gpr ep .32 120 0\n"
541  "gpr r31 .32 124 0\n"
542  "gpr lp .32 124 0\n"
543  "gpr pc .32 128 0\n"
544 
545  // 32bit [ RFU ][NP EP ID SAT CY OV S Z]
546  "gpr psw .32 132 0\n" // program status word
547  "gpr npi .1 132.16 0\n" // non maskerable interrupt (NMI)
548  "gpr epi .1 132.17 0\n" // exception processing interrupt
549  "gpr id .1 132.18 0\n" // :? should be id
550  "gpr sat .1 132.19 0\n" // saturation detection
551  "flg cy .1 132.28 0\n" // carry or borrow
552  "flg ov .1 132.29 0\n" // overflow
553  "flg s .1 132.30 0\n" // signed result
554  "flg z .1 132.31 0\n"; // zero result
555  return strdup(p);
556 }
557 
558 static RzList *analysis_preludes(RzAnalysis *analysis) {
559 #define KW(d, ds, m, ms) rz_list_append(l, rz_search_keyword_new((const ut8 *)d, ds, (const ut8 *)m, ms, NULL))
560  RzList *l = rz_list_newf((RzListFree)rz_search_keyword_free);
561  KW("\x80\x07", 2, "\xf0\xff", 2);
562  KW("\x50\x1a\x63\x0f", 4, "\xf0\xff\xff\x0f", 4);
563  return l;
564 }
565 
566 static int archinfo(RzAnalysis *analysis, int q) {
567  switch (q) {
568  case RZ_ANALYSIS_ARCHINFO_ALIGN:
569  return 2;
570  case RZ_ANALYSIS_ARCHINFO_MAX_OP_SIZE:
571  return 8;
572  case RZ_ANALYSIS_ARCHINFO_MIN_OP_SIZE:
573  return 2;
574  }
575  return 0;
576 }
577 
578 RzAnalysisPlugin rz_analysis_plugin_v850 = {
579  .name = "v850",
580  .desc = "V850 code analysis plugin",
581  .license = "LGPL3",
582  .preludes = analysis_preludes,
583  .arch = "v850",
584  .bits = 32,
585  .op = v850_op,
586  .esil = true,
587  .archinfo = archinfo,
588  .get_reg_profile = get_reg_profile,
589 };
590 
591 #ifndef RZ_PLUGIN_INCORE
592 RZ_API RzLibStruct rizin_plugin = {
593  .type = RZ_LIB_TYPE_ANALYSIS,
594  .data = &rz_analysis_plugin_v850,
595  .version = RZ_VERSION
596 };
597 #endif
len
size_t len
Definition: 6502dis.c:15
mask
#define mask()
Definition: analysis_h8300.c:39
F5_DISP
#define F5_DISP(instr)
Definition: analysis_v850.c:40
F8_BIT
#define F8_BIT(instr)
Definition: analysis_v850.c:62
update_flags
static void update_flags(RzAnalysisOp *op, int flags)
Definition: analysis_v850.c:138
F1_REG1
#define F1_REG1(instr)
Definition: analysis_v850.c:16
get_reg_profile
static char * get_reg_profile(RzAnalysis *analysis)
Definition: analysis_v850.c:491
F2_REG2
#define F2_REG2(instr)
Definition: analysis_v850.c:24
rz_analysis_plugin_v850
RzAnalysisPlugin rz_analysis_plugin_v850
Definition: analysis_v850.c:578
F6_REG2
#define F6_REG2(instr)
Definition: analysis_v850.c:45
F3_COND
#define F3_COND(instr)
Definition: analysis_v850.c:29
F2_RN2
#define F2_RN2(instr)
Definition: analysis_v850.c:26
KW
#define KW(d, ds, m, ms)
rizin_plugin
RZ_API RzLibStruct rizin_plugin
Definition: analysis_v850.c:592
F9_RN2
#define F9_RN2(instr)
Definition: analysis_v850.c:75
F6_RN1
#define F6_RN1(instr)
Definition: analysis_v850.c:48
F5_RN2
#define F5_RN2(instr)
Definition: analysis_v850.c:41
clear_flags
static void clear_flags(RzAnalysisOp *op, int flags)
Definition: analysis_v850.c:153
F1_RN1
#define F1_RN1(instr)
Definition: analysis_v850.c:19
F9_RN1
#define F9_RN1(instr)
Definition: analysis_v850.c:74
F4_REG2
#define F4_REG2(instr)
Definition: analysis_v850.c:34
V850_REG_NAMES
static const char * V850_REG_NAMES[]
Definition: analysis_v850.c:103
F8_RN1
#define F8_RN1(instr)
Definition: analysis_v850.c:65
F1_RN2
#define F1_RN2(instr)
Definition: analysis_v850.c:20
archinfo
static int archinfo(RzAnalysis *analysis, int q)
Definition: analysis_v850.c:566
F2_IMM
#define F2_IMM(instr)
Definition: analysis_v850.c:23
F6_RN2
#define F6_RN2(instr)
Definition: analysis_v850.c:49
analysis_preludes
static RzList * analysis_preludes(RzAnalysis *analysis)
Definition: analysis_v850.c:558
v850_op
static int v850_op(RzAnalysis *analysis, RzAnalysisOp *op, ut64 addr, const ut8 *buf, int len, RzAnalysisOpMask mask)
Definition: analysis_v850.c:168
RZ_API
#define RZ_API
Definition: core_plugin_example.c:36
NULL
#define NULL
Definition: cris-opc.c:27
cmd
static static sync static getppid static getegid const char static filename char static len const char char static bufsiz static mask static vfork const void static prot static getpgrp const char static swapflags cmd
Definition: sflib.h:79
ut16
uint16_t ut16
Definition: demangler_util.h:30
ut32
uint32_t ut32
Definition: demangler_util.h:31
buf
voidpf void * buf
Definition: ioapi.h:138
rz_search_keyword_free
RZ_API void rz_search_keyword_free(RzSearchKeyword *kw)
Definition: keyword.c:49
ut8
uint8_t ut8
Definition: lh5801.h:11
memset
return memset(p, 0, total)
p
void * p
Definition: libc.cpp:67
get_opcode
#define get_opcode(insn)
Definition: libhppa.h:348
rz_list_newf
RZ_API RZ_OWN RzList * rz_list_newf(RzListFree f)
Returns a new initialized RzList pointer and sets the free method.
Definition: list.c:248
strdup
return strdup("=SP r13\n" "=LR r14\n" "=PC r15\n" "=A0 r0\n" "=A1 r1\n" "=A2 r2\n" "=A3 r3\n" "=ZF zf\n" "=SF nf\n" "=OF vf\n" "=CF cf\n" "=SN or0\n" "gpr lr .32 56 0\n" "gpr pc .32 60 0\n" "gpr cpsr .32 64 0 ____tfiae_________________qvczn\n" "gpr or0 .32 68 0\n" "gpr tf .1 64.5 0 thumb\n" "gpr ef .1 64.9 0 endian\n" "gpr jf .1 64.24 0 java\n" "gpr qf .1 64.27 0 sticky_overflow\n" "gpr vf .1 64.28 0 overflow\n" "gpr cf .1 64.29 0 carry\n" "gpr zf .1 64.30 0 zero\n" "gpr nf .1 64.31 0 negative\n" "gpr itc .4 64.10 0 if_then_count\n" "gpr gef .4 64.16 0 great_or_equal\n" "gpr r0 .32 0 0\n" "gpr r1 .32 4 0\n" "gpr r2 .32 8 0\n" "gpr r3 .32 12 0\n" "gpr r4 .32 16 0\n" "gpr r5 .32 20 0\n" "gpr r6 .32 24 0\n" "gpr r7 .32 28 0\n" "gpr r8 .32 32 0\n" "gpr r9 .32 36 0\n" "gpr r10 .32 40 0\n" "gpr r11 .32 44 0\n" "gpr r12 .32 48 0\n" "gpr r13 .32 52 0\n" "gpr r14 .32 56 0\n" "gpr r15 .32 60 0\n" "gpr r16 .32 64 0\n" "gpr r17 .32 68 0\n")
rz_analysis.h
RZ_ANALYSIS_ARCHINFO_ALIGN
#define RZ_ANALYSIS_ARCHINFO_ALIGN
Definition: rz_analysis.h:100
RZ_ANALYSIS_STACK_SET
@ RZ_ANALYSIS_STACK_SET
Definition: rz_analysis.h:459
RZ_ANALYSIS_STACK_GET
@ RZ_ANALYSIS_STACK_GET
Definition: rz_analysis.h:458
RZ_ANALYSIS_STACK_INC
@ RZ_ANALYSIS_STACK_INC
Definition: rz_analysis.h:457
RZ_ANALYSIS_ARCHINFO_MAX_OP_SIZE
#define RZ_ANALYSIS_ARCHINFO_MAX_OP_SIZE
Definition: rz_analysis.h:99
RzAnalysisOpMask
RzAnalysisOpMask
Definition: rz_analysis.h:439
RZ_ANALYSIS_ARCHINFO_MIN_OP_SIZE
#define RZ_ANALYSIS_ARCHINFO_MIN_OP_SIZE
Definition: rz_analysis.h:98
RZ_ANALYSIS_OP_TYPE_CMP
@ RZ_ANALYSIS_OP_TYPE_CMP
Definition: rz_analysis.h:399
RZ_ANALYSIS_OP_TYPE_SUB
@ RZ_ANALYSIS_OP_TYPE_SUB
Definition: rz_analysis.h:402
RZ_ANALYSIS_OP_TYPE_LOAD
@ RZ_ANALYSIS_OP_TYPE_LOAD
Definition: rz_analysis.h:416
RZ_ANALYSIS_OP_TYPE_MUL
@ RZ_ANALYSIS_OP_TYPE_MUL
Definition: rz_analysis.h:404
RZ_ANALYSIS_OP_TYPE_JMP
@ RZ_ANALYSIS_OP_TYPE_JMP
Definition: rz_analysis.h:368
RZ_ANALYSIS_OP_TYPE_AND
@ RZ_ANALYSIS_OP_TYPE_AND
Definition: rz_analysis.h:411
RZ_ANALYSIS_OP_TYPE_UJMP
@ RZ_ANALYSIS_OP_TYPE_UJMP
Definition: rz_analysis.h:369
RZ_ANALYSIS_OP_TYPE_SAR
@ RZ_ANALYSIS_OP_TYPE_SAR
Definition: rz_analysis.h:409
RZ_ANALYSIS_OP_TYPE_ADD
@ RZ_ANALYSIS_OP_TYPE_ADD
Definition: rz_analysis.h:401
RZ_ANALYSIS_OP_TYPE_OR
@ RZ_ANALYSIS_OP_TYPE_OR
Definition: rz_analysis.h:410
RZ_ANALYSIS_OP_TYPE_STORE
@ RZ_ANALYSIS_OP_TYPE_STORE
Definition: rz_analysis.h:415
RZ_ANALYSIS_OP_TYPE_SHR
@ RZ_ANALYSIS_OP_TYPE_SHR
Definition: rz_analysis.h:406
RZ_ANALYSIS_OP_TYPE_CJMP
@ RZ_ANALYSIS_OP_TYPE_CJMP
Definition: rz_analysis.h:373
RZ_ANALYSIS_OP_TYPE_DIV
@ RZ_ANALYSIS_OP_TYPE_DIV
Definition: rz_analysis.h:405
RZ_ANALYSIS_OP_TYPE_MOV
@ RZ_ANALYSIS_OP_TYPE_MOV
Definition: rz_analysis.h:390
RZ_ANALYSIS_OP_TYPE_SHL
@ RZ_ANALYSIS_OP_TYPE_SHL
Definition: rz_analysis.h:407
RZ_ANALYSIS_OP_TYPE_NOT
@ RZ_ANALYSIS_OP_TYPE_NOT
Definition: rz_analysis.h:414
RZ_ANALYSIS_OP_TYPE_RET
@ RZ_ANALYSIS_OP_TYPE_RET
Definition: rz_analysis.h:385
RZ_ANALYSIS_OP_TYPE_XOR
@ RZ_ANALYSIS_OP_TYPE_XOR
Definition: rz_analysis.h:412
rz_asm.h
rz_endian.h
rz_read_le16
static ut16 rz_read_le16(const void *src)
Definition: rz_endian.h:206
rz_lib.h
RZ_LIB_TYPE_ANALYSIS
@ RZ_LIB_TYPE_ANALYSIS
Definition: rz_lib.h:73
RzListFree
void(* RzListFree)(void *ptr)
Definition: rz_list.h:11
rz_strbuf_append
RZ_API bool rz_strbuf_append(RzStrBuf *sb, const char *s)
Definition: strbuf.c:222
rz_strbuf_appendf
RZ_API bool rz_strbuf_appendf(RzStrBuf *sb, const char *fmt,...) RZ_PRINTF_CHECK(2
rz_types.h
PFMT64d
#define PFMT64d
Definition: rz_types.h:394
st8
#define st8
Definition: rz_types_base.h:16
RZ_MIN
#define RZ_MIN(x, y)
Definition: rz_types_base.h:140
st64
#define st64
Definition: rz_types_base.h:10
st16
#define st16
Definition: rz_types_base.h:14
st32
#define st32
Definition: rz_types_base.h:12
rz_util.h
RZ_VERSION
#define RZ_VERSION
Definition: rz_version.h:8
flags
static struct sockaddr static addrlen static backlog const void static flags void flags
Definition: sfsocketcall.h:123
rz_analysis_op_t
Definition: rz_analysis.h:811
rz_analysis_plugin_t
Definition: rz_analysis.h:1233
rz_analysis_plugin_t::version
const char * version
Definition: rz_analysis.h:1239
rz_analysis_plugin_t::name
const char * name
Definition: rz_analysis.h:1234
rz_analysis_t
Definition: rz_analysis.h:553
rz_lib_struct_t
Definition: rz_lib.h:57
rz_lib_struct_t::type
int type
Definition: rz_lib.h:58
rz_list_t
Definition: rz_list.h:18
v850_cmd
Definition: v850_disas.h:172
op
Definition: dis.c:32
SIGN_EXT_T5
#define SIGN_EXT_T5(imm)
Definition: v810_disas.h:15
DISP26
#define DISP26(word1, word2)
Definition: v810_disas.h:20
v850_decode_command
int v850_decode_command(const ut8 *instr, int len, struct v850_cmd *cmd)
Definition: v850_disas.c:301
v850_disas.h
V850_SP
@ V850_SP
Definition: v850_disas.h:119
V850_EXT_SHL
@ V850_EXT_SHL
Definition: v850_disas.h:102
V850_EXT_SHR
@ V850_EXT_SHR
Definition: v850_disas.h:100
V850_EXT_SAR
@ V850_EXT_SAR
Definition: v850_disas.h:101
V850_BIT_NOT1
@ V850_BIT_NOT1
Definition: v850_disas.h:90
V850_BIT_CLR1
@ V850_BIT_CLR1
Definition: v850_disas.h:91
V850_FLAG_CY
@ V850_FLAG_CY
Definition: v850_disas.h:166
V850_FLAG_OV
@ V850_FLAG_OV
Definition: v850_disas.h:167
V850_FLAG_S
@ V850_FLAG_S
Definition: v850_disas.h:168
V850_FLAG_Z
@ V850_FLAG_Z
Definition: v850_disas.h:169
V850_COND_H
@ V850_COND_H
Definition: v850_disas.h:80
V850_COND_ZE
@ V850_COND_ZE
Definition: v850_disas.h:69
V850_COND_LT
@ V850_COND_LT
Definition: v850_disas.h:73
V850_COND_N
@ V850_COND_N
Definition: v850_disas.h:71
V850_COND_V
@ V850_COND_V
Definition: v850_disas.h:67
V850_COND_CL
@ V850_COND_CL
Definition: v850_disas.h:68
V850_COND_NL
@ V850_COND_NL
Definition: v850_disas.h:76
V850_COND_P
@ V850_COND_P
Definition: v850_disas.h:81
V850_COND_NE
@ V850_COND_NE
Definition: v850_disas.h:78
V850_COND_GE
@ V850_COND_GE
Definition: v850_disas.h:84
V850_COND_NV
@ V850_COND_NV
Definition: v850_disas.h:75
V850_COND_GT
@ V850_COND_GT
Definition: v850_disas.h:85
V850_COND_AL
@ V850_COND_AL
Definition: v850_disas.h:72
V850_COND_LE
@ V850_COND_LE
Definition: v850_disas.h:74
V850_COND_NH
@ V850_COND_NH
Definition: v850_disas.h:70
get_subopcode
static ut8 get_subopcode(const ut16 instr)
Definition: v850_disas.h:184
V850_MULH_IMM5
@ V850_MULH_IMM5
Definition: v850_disas.h:37
V850_SAR_IMM5
@ V850_SAR_IMM5
Definition: v850_disas.h:35
V850_SLDB
@ V850_SLDB
Definition: v850_disas.h:38
V850_BIT_MANIP
@ V850_BIT_MANIP
Definition: v850_disas.h:62
V850_AND
@ V850_AND
Definition: v850_disas.h:24
V850_TST
@ V850_TST
Definition: v850_disas.h:25
V850_ADDI
@ V850_ADDI
Definition: v850_disas.h:48
V850_SLDH
@ V850_SLDH
Definition: v850_disas.h:40
V850_SUBR
@ V850_SUBR
Definition: v850_disas.h:26
V850_ADD
@ V850_ADD
Definition: v850_disas.h:28
V850_CMP_IMM5
@ V850_CMP_IMM5
Definition: v850_disas.h:33
V850_EXT1
@ V850_EXT1
Definition: v850_disas.h:63
V850_XORI
@ V850_XORI
Definition: v850_disas.h:53
V850_JMP
@ V850_JMP
Definition: v850_disas.h:17
V850_SHR_IMM5
@ V850_SHR_IMM5
Definition: v850_disas.h:34
V850_OR
@ V850_OR
Definition: v850_disas.h:22
V850_SUB
@ V850_SUB
Definition: v850_disas.h:27
V850_DIVH
@ V850_DIVH
Definition: v850_disas.h:16
V850_BCOND4
@ V850_BCOND4
Definition: v850_disas.h:47
V850_ORI
@ V850_ORI
Definition: v850_disas.h:52
V850_MOV_IMM5
@ V850_MOV_IMM5
Definition: v850_disas.h:30
V850_NOT
@ V850_NOT
Definition: v850_disas.h:15
V850_MOVEA
@ V850_MOVEA
Definition: v850_disas.h:49
V850_MOV
@ V850_MOV
Definition: v850_disas.h:14
V850_SLDW
@ V850_SLDW
Definition: v850_disas.h:42
V850_SSTH
@ V850_SSTH
Definition: v850_disas.h:41
V850_BCOND3
@ V850_BCOND3
Definition: v850_disas.h:46
V850_MULH
@ V850_MULH
Definition: v850_disas.h:21
V850_SHL_IMM5
@ V850_SHL_IMM5
Definition: v850_disas.h:36
V850_ADD_IMM5
@ V850_ADD_IMM5
Definition: v850_disas.h:32
V850_SSTW
@ V850_SSTW
Definition: v850_disas.h:43
V850_XOR
@ V850_XOR
Definition: v850_disas.h:23
V850_SSTB
@ V850_SSTB
Definition: v850_disas.h:39
V850_CMP
@ V850_CMP
Definition: v850_disas.h:29
V850_BCOND2
@ V850_BCOND2
Definition: v850_disas.h:45
V850_ANDI
@ V850_ANDI
Definition: v850_disas.h:54
V850_JARL2
@ V850_JARL2
Definition: v850_disas.h:61
V850_BCOND
@ V850_BCOND
Definition: v850_disas.h:44
ut64
ut64(WINAPI *w32_GetEnabledXStateFeatures)()
addr
static int addr
Definition: z80asm.c:58