analysis_or1k.c File Reference

#include <rz_asm.h>
#include <rz_analysis.h>
#include <rz_lib.h>
#include <or1k_disas.h>

Go to the source code of this file.

Classes
struct	operands

Functions
static ut64	n_oper_to_addr (ut32 n, ut32 mask, ut64 addr)
	Convert raw N operand to complete address. More...
static int	insn_to_op (RzAnalysis *a, RzAnalysisOp *op, ut64 addr, insn_t *descr, insn_extra_t *extra, ut32 insn)
static int	or1k_op (RzAnalysis *a, RzAnalysisOp *op, ut64 addr, const ut8 *data, int len, RzAnalysisOpMask mask)

Variables
static ut32	cpu [32] = { 0 }
static ut32	cpu_enable
RzAnalysisPlugin	rz_analysis_plugin_or1k
RZ_API RzLibStruct	rizin_plugin

Function Documentation

insn_to_op()

static int insn_to_op ( RzAnalysis *  a, RzAnalysisOp *  op, ut64  addr, insn_t *  descr, insn_extra_t *  extra, ut32  insn  )

static

Definition at line 41 of file analysis_or1k.c.

                                                                                                                 {
    struct operands o = { 0 };
    insn_type_t type = type_of_opcode(descr, extra);
    insn_type_descr_t *type_descr = &types[INSN_X];
 
    /* only use type descriptor if it has some useful data */
    if (has_type_descriptor(type) && is_type_descriptor_defined(type)) {
        type_descr = &types[type];
    }
 
    if (extra == NULL) {
        op->type = descr->insn_type;
    } else {
        op->type = extra->insn_type;
    }
 
    switch ((insn & INSN_OPCODE_MASK) >> INSN_OPCODE_SHIFT) {
    case 0x00: /* l.j */
        o.n = get_operand_value(insn, type_descr, INSN_OPER_N);
        op->eob = true;
        op->jump = n_oper_to_addr(o.n, get_operand_mask(type_descr, INSN_OPER_N),
            addr);
        op->delay = 1;
        break;
    case 0x01: /* l.jal */
        o.n = get_operand_value(insn, type_descr, INSN_OPER_N);
        op->eob = true;
        op->jump = n_oper_to_addr(o.n, get_operand_mask(type_descr, INSN_OPER_N),
            addr);
        op->delay = 1;
        break;
    case 0x03: /* l.bnf */
        o.n = get_operand_value(insn, type_descr, INSN_OPER_N);
        op->cond = RZ_TYPE_COND_NE;
        op->jump = n_oper_to_addr(o.n, get_operand_mask(type_descr, INSN_OPER_N),
            addr);
        op->fail = addr + 8;
        op->delay = 1;
        break;
    case 0x04: /* l.bf */
        o.n = get_operand_value(insn, type_descr, INSN_OPER_N);
        op->cond = RZ_TYPE_COND_EQ;
        op->jump = n_oper_to_addr(o.n, get_operand_mask(type_descr, INSN_OPER_N),
            addr);
        op->fail = addr + 8;
        op->delay = 1;
        break;
    case 0x11: /* l.jr */
        o.rb = get_operand_value(insn, type_descr, INSN_OPER_B);
        op->eob = true;
        if (cpu_enable & (1 << o.rb)) {
            op->jump = cpu[o.rb];
        }
        op->delay = 1;
        break;
    case 0x12: /* l.jalr */
        o.rb = get_operand_value(insn, type_descr, INSN_OPER_B);
        op->eob = true;
        if (cpu_enable & (1 << o.rb)) {
            op->jump = cpu[o.rb];
        }
        op->delay = 1;
        break;
    case 0x06: /* extended */
        switch (insn & (1 << 16)) {
        case 0: /* l.movhi */
            o.rd = get_operand_value(insn, type_descr, INSN_OPER_D);
            o.k = get_operand_value(insn, type_descr, INSN_OPER_K);
            cpu[o.rd] = o.k << 16;
            cpu_enable |= (1 << o.rd);
            break;
        case 1: /* l.macrc */
            break;
        }
        break;
    case 0x27: /* l.addi */
        o.rd = get_operand_value(insn, type_descr, INSN_OPER_D);
        o.ra = get_operand_value(insn, type_descr, INSN_OPER_A);
        o.i = get_operand_value(insn, type_descr, INSN_OPER_I);
        if (cpu_enable & (1 << o.ra) & cpu_enable & (1 << o.rd)) {
            cpu[o.rd] = cpu[o.ra] | o.i;
            cpu_enable |= (1 << o.rd);
            op->ptr = cpu[o.rd];
            op->direction = 8; /* reference */
        }
        break;
    case 0x2a: /* l.ori */
        o.rd = get_operand_value(insn, type_descr, INSN_OPER_D);
        o.ra = get_operand_value(insn, type_descr, INSN_OPER_A);
        o.i = get_operand_value(insn, type_descr, INSN_OPER_I);
        if (cpu_enable & (1 << o.ra)) {
            cpu[o.rd] = cpu[o.ra] | o.i;
            cpu_enable |= (1 << o.rd);
            op->ptr = cpu[o.rd];
            op->direction = 8; /* reference */
        }
        break;
    default:
        /* if unknown instruction encountered, better forget state */
        cpu_enable = 0;
    }
 
    /* temporary solution to prevent using wrong register values */
    if ((op->type & RZ_ANALYSIS_OP_TYPE_JMP) == RZ_ANALYSIS_OP_TYPE_JMP) {
        /* FIXME: handle delay slot after branches */
        cpu_enable = 0;
    }
    return 4;
}

References addr, cpu, cpu_enable, get_operand_mask(), get_operand_value(), has_type_descriptor(), operands::i, INSN_OPCODE_MASK, INSN_OPCODE_SHIFT, INSN_OPER_A, INSN_OPER_B, INSN_OPER_D, INSN_OPER_I, INSN_OPER_K, INSN_OPER_N, insn_extra_t::insn_type, insn_t::insn_type, INSN_X, is_type_descriptor_defined(), operands::k, operands::n, n_oper_to_addr(), NULL, operands::ra, operands::rb, operands::rd, RZ_ANALYSIS_OP_TYPE_JMP, RZ_TYPE_COND_EQ, RZ_TYPE_COND_NE, type, type_of_opcode(), and types.

Referenced by or1k_op().

n_oper_to_addr()

static ut64 n_oper_to_addr ( ut32  n, ut32  mask, ut64  addr  )

static

Convert raw N operand to complete address.

Parameters

n	immediate, as appearing in instruction
mask	n operand mask
addr	address of current instruction

Returns

64-bit address

Definition at line 34 of file analysis_or1k.c.

                                                         {
    /* sign extension returns 32b unsigned N, then it is multiplied by 4, made
     * signed to support negative offsets, added to address and made unsigned
     * again */
    return (ut64)((st64)((st32)(sign_extend(n, mask) << 2)) + addr);
}

References addr, mask, n, sign_extend(), st32, st64, and ut64().

Referenced by insn_to_op().

or1k_op()

static int or1k_op ( RzAnalysis *  a, RzAnalysisOp *  op, ut64  addr, const ut8 *  data, int  len, RzAnalysisOpMask  mask  )

static

Definition at line 151 of file analysis_or1k.c.

                                                                                                                {
    ut32 insn, opcode;
    ut8 opcode_idx;
    insn_t *insn_descr;
    insn_extra_t *extra_descr;
 
    /* read instruction and basic opcode value */
    insn = rz_read_be32(data);
    op->size = 4;
    opcode = (insn & INSN_OPCODE_MASK);
    opcode_idx = opcode >> INSN_OPCODE_SHIFT;
 
    /* make sure instruction descriptor table is not overflowed */
    if (opcode_idx >= insns_count) {
        return op->size;
    }
 
    /* if instruction is marked as invalid finish processing now */
    insn_descr = &or1k_insns[opcode_idx];
    if (insn_descr->type == INSN_INVAL) {
        return op->size;
    }
 
    /* if name is null, but extra is present, it means 6 most significant bits
     * are not enough to decode instruction */
    if ((insn_descr->name == NULL) && (insn_descr->extra != NULL)) {
        extra_descr = find_extra_descriptor(insn_descr->extra, insn);
        if (extra_descr != NULL) {
            insn_to_op(a, op, addr, insn_descr, extra_descr, insn);
        }
    } else {
        /* otherwise basic descriptor is enough */
        insn_to_op(a, op, addr, insn_descr, NULL, insn);
    }
 
    return op->size;
}

References a, addr, insn_t::extra, find_extra_descriptor(), INSN_INVAL, INSN_OPCODE_MASK, INSN_OPCODE_SHIFT, insn_to_op(), insns_count, insn_t::name, NULL, or1k_insns, rz_read_be32(), and insn_t::type.

Variable Documentation

cpu

ut32 cpu[32] = { 0 }

static

Definition at line 21 of file analysis_or1k.c.

Referenced by __generic_io_dest(), __get_cpu_model_recursive(), amd29k_instr_decode(), avr_custom_spm_page_erase(), avr_custom_spm_page_fill(), avr_custom_spm_page_write(), avr_op_analyze(), const_by_name(), const_by_value(), cpu_reload_needed(), esil_avr_hook_reg_write(), get_cpu_model(), insn_to_op(), INST_HANDLER(), is_big_endian(), is_c5000(), is_cpu(), is_cpu_valid(), rz_analysis_set_cpu(), rz_asm_set_cpu(), rz_avr_esil_opcode(), rz_main_rz_asm(), RZ_PACKED(), rz_platform_profiles_init(), rz_platform_target_index_init(), rz_run_start(), rz_syscall_setup(), rz_test_load_asm_test_file(), rz_type_db_set_cpu(), set_cpu_model(), sysregs_reload_needed(), winkd_set_cpu(), and winkd_wait_packet().

cpu_enable

ut32 cpu_enable

static

Definition at line 22 of file analysis_or1k.c.

Referenced by insn_to_op().

rizin_plugin

RZ_API RzLibStruct rizin_plugin

Initial value:

= {
    .type = RZ_LIB_TYPE_ANALYSIS,
    .data = &rz_analysis_plugin_or1k,
    .version = RZ_VERSION
}

Definition at line 200 of file analysis_or1k.c.

rz_analysis_plugin_or1k

RzAnalysisPlugin rz_analysis_plugin_or1k

Initial value:

= {
    .name = "or1k",
    .desc = "OpenRISC 1000",
    .license = "LGPL3",
    .bits = 32,
    .arch = "or1k",
    .esil = false,
    .op = &or1k_op,
}

Definition at line 189 of file analysis_or1k.c.