4 #if __i386__ || __x86_64__
8 static bool xnu_x86_hwstep_enable64(
RzDebug *
dbg,
bool enable) {
12 ret = xnu_thread_get_gpr(
dbg, th);
14 eprintf(
"error to get gpr registers in trace bit intel\n");
19 state->uts.ts32.__eflags = (
state->uts.ts32.__eflags &
21 (enable ? 0x100UL : 0);
23 state->uts.ts64.__rflags = (
state->uts.ts64.__rflags &
25 (enable ? 0x100UL : 0);
30 if (!xnu_thread_set_gpr(
dbg, th)) {
31 eprintf(
"error xnu_thread_set_gpr in modify_trace_bit intel\n");
37 static bool xnu_x86_hwstep_enable32(
RzDebug *
dbg,
bool enable) {
40 int ret = xnu_thread_get_gpr(
dbg, th);
42 eprintf(
"error to get gpr registers in trace bit intel\n");
47 state->uts.ts32.__eflags = (
state->uts.ts32.__eflags &
49 (enable ? 0x100UL : 0);
54 if (!xnu_thread_set_gpr(
dbg, th)) {
55 eprintf(
"error xnu_thread_set_gpr in modify_trace_bit intel\n");
61 bool xnu_native_hwstep_enable(
RzDebug *
dbg,
bool enable) {
63 return xnu_x86_hwstep_enable64(
dbg, enable);
64 return xnu_x86_hwstep_enable32(
dbg, enable);
if(dbg->bits==RZ_SYS_BITS_64)