Rizin
unix-like reverse engineering framework and cli tools
test_tms320c64x.py
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1 #!/usr/bin/env python
2 
3 # Capstone Python bindings, by Fotis Loukos <me@fotisl.com>
4 
5 from __future__ import print_function
6 from capstone import *
7 from capstone.tms320c64x import *
8 from xprint import to_x, to_hex, to_x_32
9 
10 
11 TMS320C64X_CODE = b"\x01\xac\x88\x40\x81\xac\x88\x43\x00\x00\x00\x00\x02\x90\x32\x96\x02\x80\x46\x9e\x05\x3c\x83\xe6\x0b\x0c\x8b\x24"
12 
13 all_tests = (
14  (CS_ARCH_TMS320C64X, 0, TMS320C64X_CODE, "TMS320C64x"),
15 )
16 
17 
19  # print address, mnemonic and operands
20  print("0x%x:\t%s\t%s" % (insn.address, insn.mnemonic, insn.op_str))
21 
22  # "data" instruction generated by SKIPDATA option has no detail
23  if insn.id == 0:
24  return
25 
26  if len(insn.operands) > 0:
27  print("\top_count: %u" % len(insn.operands))
28  c = 0
29  for i in insn.operands:
30  if i.type == TMS320C64X_OP_REG:
31  print("\t\toperands[%u].type: REG = %s" % (c, insn.reg_name(i.reg)))
32  if i.type == TMS320C64X_OP_IMM:
33  print("\t\toperands[%u].type: IMM = 0x%s" % (c, to_x(i.imm)))
34  if i.type == TMS320C64X_OP_MEM:
35  print("\t\toperands[%u].type: MEM" % c)
36  if i.mem.base != 0:
37  print("\t\t\toperands[%u].mem.base: REG = %s" \
38  % (c, insn.reg_name(i.mem.base)))
39  if i.mem.disptype == TMS320C64X_MEM_DISP_INVALID:
40  print("\t\t\toperands[%u].mem.disptype: Invalid" % (c))
41  print("\t\t\toperands[%u].mem.disp: 0x%s" \
42  % (c, to_x(i.mem.disp)))
43  if i.mem.disptype == TMS320C64X_MEM_DISP_CONSTANT:
44  print("\t\t\toperands[%u].mem.disptype: Constant" % (c))
45  print("\t\t\toperands[%u].mem.disp: 0x%s" \
46  % (c, to_x(i.mem.disp)))
47  if i.mem.disptype == TMS320C64X_MEM_DISP_REGISTER:
48  print("\t\t\toperands[%u].mem.disptype: Register" % (c))
49  print("\t\t\toperands[%u].mem.disp: %s" \
50  % (c, insn.reg_name(i.mem.disp)))
51  print("\t\t\toperands[%u].mem.unit: %u" % (c, i.mem.unit))
52  if i.mem.direction == TMS320C64X_MEM_DIR_INVALID:
53  print("\t\t\toperands[%u].mem.direction: Invalid" % (c))
54  if i.mem.direction == TMS320C64X_MEM_DIR_FW:
55  print("\t\t\toperands[%u].mem.direction: Forward" % (c))
56  if i.mem.direction == TMS320C64X_MEM_DIR_BW:
57  print("\t\t\toperands[%u].mem.direction: Backward" % (c))
58  if i.mem.modify == TMS320C64X_MEM_MOD_INVALID:
59  print("\t\t\toperands[%u].mem.modify: Invalid" % (c))
60  if i.mem.modify == TMS320C64X_MEM_MOD_NO:
61  print("\t\t\toperands[%u].mem.modify: No" % (c))
62  if i.mem.modify == TMS320C64X_MEM_MOD_PRE:
63  print("\t\t\toperands[%u].mem.modify: Pre" % (c))
64  if i.mem.modify == TMS320C64X_MEM_MOD_POST:
65  print("\t\t\toperands[%u].mem.modify: Post" % (c))
66  print("\t\t\toperands[%u].mem.scaled: %u" % (c, i.mem.scaled))
67  if i.type == TMS320C64X_OP_REGPAIR:
68  print("\t\toperands[%u].type: REGPAIR = %s:%s" % (c, insn.reg_name(i.reg + 1), insn.reg_name(i.reg)))
69  c += 1
70 
71 
72 # ## Test class Cs
73 def test_class():
74 
75  for (arch, mode, code, comment) in all_tests:
76  print("*" * 16)
77  print("Platform: %s" %comment)
78  print("Code: %s" % to_hex(code))
79  print("Disasm:")
80 
81  try:
82  md = Cs(arch, mode)
83  md.detail = True
84  for insn in md.disasm(code, 0x1000):
85  print_insn_detail(insn)
86  print ()
87  print("0x%x:\n" % (insn.address + insn.size))
88  except CsError as e:
89  print("ERROR: %s" %e)
90 
91 
92 if __name__ == '__main__':
93  test_class()
size_t len
Definition: 6502dis.c:15
def print_insn_detail(insn)
def to_hex(s, prefix_0x=True)
Definition: xprint.py:9
def to_x(s)
Definition: xprint.py:29