4 from __future__
import print_function
7 from xprint
import to_hex, to_x
9 M68K_CODE = b
"\x4c\x00\x54\x04\x48\xe7\xe0\x30\x4c\xdf\x0c\x07\xd4\x40\x87\x5a\x4e\x71\x02\xb4\xc0\xde\xc0\xde\x5c\x00\x1d\x80\x71\x12\x01\x23\xf2\x3c\x44\x22\x40\x49\x0e\x56\x54\xc5\xf2\x3c\x44\x00\x44\x7a\x00\x00\xf2\x00\x0a\x28\x4e\xb9\x00\x00\x00\x12\x4e\x75"
12 (CS_ARCH_M68K, CS_MODE_BIG_ENDIAN | CS_MODE_M68K_040, M68K_CODE,
"M68K"),
15 s_addressing_modes = {
18 1:
"Register Direct - Data",
19 2:
"Register Direct - Address",
21 3:
"Register Indirect - Address",
22 4:
"Register Indirect - Address with Postincrement",
23 5:
"Register Indirect - Address with Predecrement",
24 6:
"Register Indirect - Address with Displacement",
26 7:
"Address Register Indirect With Index - 8-bit displacement",
27 8:
"Address Register Indirect With Index - Base displacement",
29 9:
"Memory indirect - Postindex",
30 10:
"Memory indirect - Preindex",
32 11:
"Program Counter Indirect - with Displacement",
34 12:
"Program Counter Indirect with Index - with 8-Bit Displacement",
35 13:
"Program Counter Indirect with Index - with Base Displacement",
37 14:
"Program Counter Memory Indirect - Postindexed",
38 15:
"Program Counter Memory Indirect - Preindexed",
40 16:
"Absolute Data Addressing - Short",
41 17:
"Absolute Data Addressing - Long",
42 18:
"Immediate value",
44 19:
"Branch Displacement",
48 for m
in insn.regs_read:
49 print(
"\treading from reg: %s" % insn.reg_name(m))
51 for m
in insn.regs_write:
52 print(
"\twriting to reg: %s" % insn.reg_name(m))
55 if len(insn.operands) > 0:
56 print(
"\top_count: %u" % (
len(insn.operands)))
57 print(
"\tgroups_count: %u" %
len(insn.groups))
61 for i, op
in enumerate(insn.operands):
62 if op.type == M68K_OP_REG:
63 print(
"\t\toperands[%u].type: REG = %s" % (i, insn.reg_name(op.reg)))
64 elif op.type == M68K_OP_IMM:
65 print(
"\t\toperands[%u].type: IMM = 0x%x" % (i, op.imm & 0xffffffff))
66 elif op.type == M68K_OP_MEM:
67 print(
"\t\toperands[%u].type: MEM" % (i))
68 if op.mem.base_reg != M68K_REG_INVALID:
69 print(
"\t\t\toperands[%u].mem.base: REG = %s" % (i, insn.reg_name(op.mem.base_reg)))
70 if op.mem.index_reg != M68K_REG_INVALID:
71 print(
"\t\t\toperands[%u].mem.index: REG = %s" % (i, insn.reg_name(op.mem.index_reg)))
73 if op.mem.index_size > 0:
75 print(
"\t\t\toperands[%u].mem.index: size = %s" % (i, mem_index_str))
77 print(
"\t\t\toperands[%u].mem.disp: 0x%x" % (i, op.mem.disp))
79 print(
"\t\t\toperands[%u].mem.scale: %d" % (i, op.mem.scale))
80 print(
"\t\taddress mode: %s" % (s_addressing_modes[op.address_mode]))
81 elif op.type == M68K_OP_FP_SINGLE:
82 print(
"\t\toperands[%u].type: FP_SINGLE" % i)
83 print(
"\t\toperands[%u].simm: %f", i, op.simm)
84 elif op.type == M68K_OP_FP_DOUBLE:
85 print(
"\t\toperands[%u].type: FP_DOUBLE" % i)
86 print(
"\t\toperands[%u].dimm: %lf", i, op.dimm)
87 elif op.type == M68K_OP_BR_DISP:
88 print(
"\t\toperands[%u].br_disp.disp: 0x%x" % (i, op.br_disp.disp))
89 print(
"\t\toperands[%u].br_disp.disp_size: %d" % (i, op.br_disp.disp_size))
95 for (arch, mode, code, comment)
in all_tests:
97 print(
"Platform: %s" % comment)
98 print(
"Code: %s " %
to_hex(code))
105 for insn
in md.disasm(code, address):
106 last_address = insn.address + insn.size
107 print(
"0x%x:\t%s\t%s" % (insn.address, insn.mnemonic, insn.op_str))
109 print(
"0x%x:\n" % (last_address))
112 print(
"ERROR: %s" % e.__str__())
114 if __name__ ==
'__main__':
def print_read_write_regs(insn)
def print_insn_detail(insn)
def to_hex(s, prefix_0x=True)