Rizin
unix-like reverse engineering framework and cli tools
spc700_opcode_table.h
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1 // SPDX-FileCopyrightText: 2014 condret <condr3t@protonmail.com>
2 // SPDX-License-Identifier: LGPL-3.0-only
3 
4 #include <rz_types.h>
5 
6 typedef enum {
7  SPC700_ARG_NONE,
8  SPC700_ARG_IMM8,
9  SPC700_ARG_ABS8,
10  SPC700_ARG_ABS8_REL8,
11  SPC700_ARG_ABS8_ABS8,
12  SPC700_ARG_ABS16,
13  SPC700_ARG_ABS13_BIT3,
14  SPC700_ARG_REL8,
15  SPC700_ARG_IMM8_ABS8,
16  SPC700_ARG_UPPER8
17 } Spc700ArgType;
18 
19 typedef struct spc700_op_t {
20  char *name;
21  Spc700ArgType arg;
22 } Spc700Op;
23 
24 static const Spc700Op spc700_op_table[] = {
25  { "nop", SPC700_ARG_NONE },
26  { "tcall 0", SPC700_ARG_NONE },
27  { "set1 0x%02x.0", SPC700_ARG_ABS8 },
28  { "bbs 0x%02x.0, 0x%04x", SPC700_ARG_ABS8_REL8 },
29  { "or a, 0x%02x", SPC700_ARG_ABS8 },
30  { "or a, 0x%04x", SPC700_ARG_ABS16 },
31  { "or a, (x)", SPC700_ARG_NONE },
32  { "or a, [0x%02x+x]", SPC700_ARG_ABS8 },
33  { "or a, #0x%02x", SPC700_ARG_IMM8 },
34  { "or 0x%02x, 0x%02x", SPC700_ARG_ABS8_ABS8 },
35  { "or1 c, 0x%04x.%u", SPC700_ARG_ABS13_BIT3 },
36  { "asl 0x%02x", SPC700_ARG_ABS8 },
37  { "asl 0x%04x", SPC700_ARG_ABS16 },
38  { "push psw", SPC700_ARG_NONE },
39  { "tset1 0x%04x", SPC700_ARG_ABS16 },
40  { "brk", SPC700_ARG_NONE },
41  { "bpl 0x%04x", SPC700_ARG_REL8 },
42  { "tcall 1", SPC700_ARG_NONE },
43  { "clr1 0x%02x.0", SPC700_ARG_ABS8 },
44  { "bbc 0x%02x.0, 0x%04x", SPC700_ARG_ABS8_REL8 },
45  { "or a, 0x%02x+x", SPC700_ARG_ABS8 },
46  { "or a, 0x%04x+x", SPC700_ARG_ABS16 },
47  { "or a, 0x%04x+y", SPC700_ARG_ABS16 },
48  { "or a, [0x%02x]+y", SPC700_ARG_ABS8 },
49  { "or 0x%02x, #0x%02x", SPC700_ARG_IMM8_ABS8 },
50  { "or (x), (y)", SPC700_ARG_NONE },
51  { "decw 0x%02x", SPC700_ARG_ABS8 },
52  { "asl 0x%02x+x", SPC700_ARG_ABS8 },
53  { "asl a", SPC700_ARG_NONE },
54  { "dec x", SPC700_ARG_NONE },
55  { "cmp x, 0x%04x", SPC700_ARG_ABS16 },
56  { "jmp [0x%04x+x]", SPC700_ARG_ABS16 },
57  { "clrp", SPC700_ARG_NONE },
58  { "tcall 2", SPC700_ARG_NONE },
59  { "set1 0x%02x.1", SPC700_ARG_ABS8 },
60  { "bbs 0x%02x.1, 0x%04x", SPC700_ARG_ABS8_REL8 },
61  { "and a, 0x%02x", SPC700_ARG_ABS8 },
62  { "and a, 0x%04x", SPC700_ARG_ABS16 },
63  { "and a, (x)", SPC700_ARG_NONE },
64  { "and a, [0x%02x+x]", SPC700_ARG_ABS8 },
65  { "and a, #0x%02x", SPC700_ARG_IMM8 },
66  { "and 0x%02x, 0x%02x", SPC700_ARG_ABS8_ABS8 },
67  { "or1 c, ~0x%04x.%u", SPC700_ARG_ABS13_BIT3 },
68  { "rol 0x%02x", SPC700_ARG_ABS8 },
69  { "rol 0x%04x", SPC700_ARG_ABS16 },
70  { "push a", SPC700_ARG_NONE },
71  { "cbne 0x%02x, 0x%04x", SPC700_ARG_ABS8_REL8 },
72  { "bra 0x%04x", SPC700_ARG_REL8 },
73  { "bmi 0x%04x", SPC700_ARG_REL8 },
74  { "tcall 3", SPC700_ARG_NONE },
75  { "clr1 0x%02x.1", SPC700_ARG_ABS8 },
76  { "bbc 0x%02x.1, 0x%04x", SPC700_ARG_ABS8_REL8 },
77  { "and a, 0x%02x+x", SPC700_ARG_ABS8 },
78  { "and a, 0x%04x+x", SPC700_ARG_ABS16 },
79  { "and a, 0x%04x+y", SPC700_ARG_ABS16 },
80  { "and a, [0x%02x]+y", SPC700_ARG_ABS8 },
81  { "and 0x%02x, #0x%02x", SPC700_ARG_IMM8_ABS8 },
82  { "and (x), (y)", SPC700_ARG_NONE },
83  { "incw 0x%02x", SPC700_ARG_ABS8 },
84  { "rol 0x%02x+x", SPC700_ARG_ABS8 },
85  { "rol a", SPC700_ARG_NONE },
86  { "inc x", SPC700_ARG_NONE },
87  { "cmp x, 0x%02x", SPC700_ARG_ABS8 },
88  { "call 0x%04x", SPC700_ARG_ABS16 },
89  { "setp", SPC700_ARG_NONE },
90  { "tcall 4", SPC700_ARG_NONE },
91  { "set1 0x%02x.2", SPC700_ARG_ABS8 },
92  { "bbs 0x%02x.2, 0x%04x", SPC700_ARG_ABS8_REL8 },
93  { "eor a, 0x%02x", SPC700_ARG_ABS8 },
94  { "eor a, 0x%04x", SPC700_ARG_ABS16 },
95  { "eor a, (x)", SPC700_ARG_NONE },
96  { "eor a, [0x%02x+x]", SPC700_ARG_ABS8 },
97  { "eor a, #0x%02x", SPC700_ARG_IMM8 },
98  { "eor 0x%02x, 0x%02x", SPC700_ARG_ABS8_ABS8 },
99  { "and1 c, 0x%04x.%u", SPC700_ARG_ABS13_BIT3 },
100  { "lsr 0x%02x", SPC700_ARG_ABS8 },
101  { "lsr 0x%04x", SPC700_ARG_ABS16 },
102  { "push x", SPC700_ARG_NONE },
103  { "tclr1 0x%04x", SPC700_ARG_ABS16 },
104  { "pcall 0x%02x", SPC700_ARG_UPPER8 },
105  { "bvc 0x%04x", SPC700_ARG_REL8 },
106  { "tcall 5", SPC700_ARG_NONE },
107  { "clr1 0x%02x.2", SPC700_ARG_ABS8 },
108  { "bbc 0x%02x.2, 0x%04x", SPC700_ARG_ABS8_REL8 },
109  { "eor a, 0x%02x+x", SPC700_ARG_ABS8 },
110  { "eor a, 0x%04x+x", SPC700_ARG_ABS16 },
111  { "eor a, 0x%04x+y", SPC700_ARG_ABS16 },
112  { "eor a, [0x%02x]+y", SPC700_ARG_ABS8 },
113  { "eor 0x%02x, #0x%02x", SPC700_ARG_IMM8_ABS8 },
114  { "eor (x), (y)", SPC700_ARG_NONE },
115  { "cmpw ya, 0x%02x", SPC700_ARG_ABS8 },
116  { "lsr 0x%02x+x", SPC700_ARG_ABS8 },
117  { "lsr a", SPC700_ARG_NONE },
118  { "mov x, a", SPC700_ARG_NONE },
119  { "cmp y, 0x%04x", SPC700_ARG_ABS16 },
120  { "jmp 0x%04x", SPC700_ARG_ABS16 },
121  { "clrc", SPC700_ARG_NONE },
122  { "tcall 6", SPC700_ARG_NONE },
123  { "set1 0x%02x.3", SPC700_ARG_ABS8 },
124  { "bbs 0x%02x.3, 0x%04x", SPC700_ARG_ABS8_REL8 },
125  { "cmp a, 0x%02x", SPC700_ARG_ABS8 },
126  { "cmp a, 0x%04x", SPC700_ARG_ABS16 },
127  { "cmp a, (x)", SPC700_ARG_NONE },
128  { "cmp a, [0x%02x+x]", SPC700_ARG_ABS8 },
129  { "cmp a, #0x%02x", SPC700_ARG_IMM8 },
130  { "cmp 0x%02x, 0x%02x", SPC700_ARG_ABS8_ABS8 },
131  { "and1 c, ~0x%04x.%u", SPC700_ARG_ABS13_BIT3 },
132  { "ror 0x%02x", SPC700_ARG_ABS8 },
133  { "ror 0x%04x", SPC700_ARG_ABS16 },
134  { "push y", SPC700_ARG_NONE },
135  { "dbnz 0x%02x, 0x%04x", SPC700_ARG_ABS8_REL8 },
136  { "ret", SPC700_ARG_NONE },
137  { "bvs 0x%04x", SPC700_ARG_REL8 },
138  { "tcall 7", SPC700_ARG_NONE },
139  { "clr1 0x%02x.3", SPC700_ARG_ABS8 },
140  { "bbc 0x%02x.3, 0x%04x", SPC700_ARG_ABS8_REL8 },
141  { "cmp a, 0x%02x+x", SPC700_ARG_ABS8 },
142  { "cmp a, 0x%04x+x", SPC700_ARG_ABS16 },
143  { "cmp a, 0x%04x+y", SPC700_ARG_ABS16 },
144  { "cmp a, [0x%02x]+y", SPC700_ARG_ABS8 },
145  { "cmp 0x%02x, #0x%02x", SPC700_ARG_IMM8_ABS8 },
146  { "cmp (x), (y)", SPC700_ARG_NONE },
147  { "addw ya, 0x%02x", SPC700_ARG_ABS8 },
148  { "ror 0x%02x+x", SPC700_ARG_ABS8 },
149  { "ror a", SPC700_ARG_NONE },
150  { "mov a, x", SPC700_ARG_NONE },
151  { "cmp y, 0x%02x", SPC700_ARG_ABS8 },
152  { "ret1", SPC700_ARG_NONE },
153  { "setc", SPC700_ARG_NONE },
154  { "tcall 8", SPC700_ARG_NONE },
155  { "set1 0x%02x.4", SPC700_ARG_ABS8 },
156  { "bbs 0x%02x.4, 0x%04x", SPC700_ARG_ABS8_REL8 },
157  { "adc a, 0x%02x", SPC700_ARG_ABS8 },
158  { "adc a, 0x%04x", SPC700_ARG_ABS16 },
159  { "adc a, (x)", SPC700_ARG_NONE },
160  { "adc a, [0x%02x+x]", SPC700_ARG_ABS8 },
161  { "adc a, #0x%02x", SPC700_ARG_IMM8 },
162  { "adc 0x%02x, 0x%02x", SPC700_ARG_ABS8_ABS8 },
163  { "eor1 c, 0x%04x.%u", SPC700_ARG_ABS13_BIT3 },
164  { "dec 0x%02x", SPC700_ARG_ABS8 },
165  { "dec 0x%04x", SPC700_ARG_ABS16 },
166  { "mov y, #0x%02x", SPC700_ARG_IMM8 },
167  { "pop psw", SPC700_ARG_NONE },
168  { "mov 0x%02x, #0x%02x", SPC700_ARG_IMM8_ABS8 },
169  { "bcc 0x%04x", SPC700_ARG_REL8 },
170  { "tcall 9", SPC700_ARG_NONE },
171  { "clr1 0x%02x.4", SPC700_ARG_ABS8 },
172  { "bbc 0x%02x.4, 0x%04x", SPC700_ARG_ABS8_REL8 },
173  { "adc a, 0x%02x+x", SPC700_ARG_ABS8 },
174  { "adc a, 0x%04x+x", SPC700_ARG_ABS16 },
175  { "adc a, 0x%04x+y", SPC700_ARG_ABS16 },
176  { "adc a, [0x%02x]+y", SPC700_ARG_ABS8 },
177  { "adc 0x%02x, #0x%02x", SPC700_ARG_IMM8_ABS8 },
178  { "adc (x), (y)", SPC700_ARG_NONE },
179  { "subw ya, 0x%02x", SPC700_ARG_ABS8 },
180  { "dec 0x%02x+x", SPC700_ARG_ABS8 },
181  { "dec a", SPC700_ARG_NONE },
182  { "mov x, sp", SPC700_ARG_NONE },
183  { "div ya, x", SPC700_ARG_NONE },
184  { "xcn a", SPC700_ARG_NONE },
185  { "ei", SPC700_ARG_NONE },
186  { "tcall 10", SPC700_ARG_NONE },
187  { "set1 0x%02x.5", SPC700_ARG_ABS8 },
188  { "bbs 0x%02x.5, 0x%04x", SPC700_ARG_ABS8_REL8 },
189  { "sbc a, 0x%02x", SPC700_ARG_ABS8 },
190  { "sbc a, 0x%04x", SPC700_ARG_ABS16 },
191  { "sbc a, (x)", SPC700_ARG_NONE },
192  { "sbc a, [0x%02x+x]", SPC700_ARG_ABS8 },
193  { "sbc a, #0x%02x", SPC700_ARG_IMM8 },
194  { "sbc 0x%02x, 0x%02x", SPC700_ARG_ABS8_ABS8 },
195  { "mov1 c, 0x%04x.%u", SPC700_ARG_ABS13_BIT3 },
196  { "inc 0x%02x", SPC700_ARG_ABS8 },
197  { "inc 0x%04x", SPC700_ARG_ABS16 },
198  { "cmp y, #0x%02x", SPC700_ARG_IMM8 },
199  { "pop a", SPC700_ARG_NONE },
200  { "mov (x)+, a", SPC700_ARG_NONE },
201  { "bcs 0x%04x", SPC700_ARG_REL8 },
202  { "tcall 11", SPC700_ARG_NONE },
203  { "clr1 0x%02x.5", SPC700_ARG_ABS8 },
204  { "bbc 0x%02x.5, 0x%04x", SPC700_ARG_ABS8_REL8 },
205  { "sbc a, 0x%02x+x", SPC700_ARG_ABS8 },
206  { "sbc a, 0x%04x+x", SPC700_ARG_ABS16 },
207  { "sbc a, 0x%04x+y", SPC700_ARG_ABS16 },
208  { "sbc a, [0x%02x]+y", SPC700_ARG_ABS8 },
209  { "sbc 0x%02x, #0x%02x", SPC700_ARG_IMM8_ABS8 },
210  { "sbc (x), (y)", SPC700_ARG_NONE },
211  { "movw ya, 0x%02x", SPC700_ARG_ABS8 },
212  { "inc 0x%02x+x", SPC700_ARG_ABS8 },
213  { "inc a", SPC700_ARG_NONE },
214  { "mov sp, x", SPC700_ARG_NONE },
215  { "das a", SPC700_ARG_NONE },
216  { "mov a, (x)+", SPC700_ARG_NONE },
217  { "di", SPC700_ARG_NONE },
218  { "tcall 12", SPC700_ARG_NONE },
219  { "set1 0x%02x.6", SPC700_ARG_ABS8 },
220  { "bbs 0x%02x.6, 0x%04x", SPC700_ARG_ABS8_REL8 },
221  { "mov 0x%02x, a", SPC700_ARG_ABS8 },
222  { "mov 0x%04x, a", SPC700_ARG_ABS16 },
223  { "mov (x), a", SPC700_ARG_NONE },
224  { "mov [0x%02x+x], a", SPC700_ARG_ABS8 },
225  { "cmp x, #0x%02x", SPC700_ARG_IMM8 },
226  { "mov 0x%04x, x", SPC700_ARG_ABS16 },
227  { "mov1 0x%04x.%u, c", SPC700_ARG_ABS13_BIT3 },
228  { "mov 0x%02x, y", SPC700_ARG_ABS8 },
229  { "mov 0x%04x, y", SPC700_ARG_ABS16 },
230  { "mov x, #0x%02x", SPC700_ARG_IMM8 },
231  { "pop x", SPC700_ARG_NONE },
232  { "mul ya", SPC700_ARG_NONE },
233  { "bne 0x%04x", SPC700_ARG_REL8 },
234  { "tcall 13", SPC700_ARG_NONE },
235  { "clr1 0x%02x.6", SPC700_ARG_ABS8 },
236  { "bbc 0x%02x.6, 0x%04x", SPC700_ARG_ABS8_REL8 },
237  { "mov 0x%02x+x, a", SPC700_ARG_ABS8 },
238  { "mov 0x%04x+x, a", SPC700_ARG_ABS16 },
239  { "mov 0x%04x+y, a", SPC700_ARG_ABS16 },
240  { "mov [0x%02x]+y, a", SPC700_ARG_ABS8 },
241  { "mov 0x%02x, x", SPC700_ARG_ABS8 },
242  { "mov 0x%02x+y, x", SPC700_ARG_ABS8 },
243  { "movw 0x%02x, ya", SPC700_ARG_ABS8 },
244  { "mov 0x%02x+x, y", SPC700_ARG_ABS8 },
245  { "dec y", SPC700_ARG_NONE },
246  { "mov a, y", SPC700_ARG_NONE },
247  { "cbne 0x%02x+x, 0x%04x", SPC700_ARG_ABS8_REL8 },
248  { "daa a", SPC700_ARG_NONE },
249  { "clrv", SPC700_ARG_NONE },
250  { "tcall 14", SPC700_ARG_NONE },
251  { "set1 0x%02x.7", SPC700_ARG_ABS8 },
252  { "bbs 0x%02x.7, 0x%04x", SPC700_ARG_ABS8_REL8 },
253  { "mov a, 0x%02x", SPC700_ARG_ABS8 },
254  { "mov a, 0x%04x", SPC700_ARG_ABS16 },
255  { "mov a, (x)", SPC700_ARG_NONE },
256  { "mov a, [0x%02x+x]", SPC700_ARG_ABS8 },
257  { "mov a, #0x%02x", SPC700_ARG_IMM8 },
258  { "mov x, 0x%04x", SPC700_ARG_ABS16 },
259  { "not1 0x%04x.%u", SPC700_ARG_ABS13_BIT3 },
260  { "mov y, 0x%02x", SPC700_ARG_ABS8 },
261  { "mov y, 0x%04x", SPC700_ARG_ABS16 },
262  { "notc", SPC700_ARG_NONE },
263  { "pop y", SPC700_ARG_NONE },
264  { "sleep", SPC700_ARG_NONE },
265  { "beq 0x%04x", SPC700_ARG_REL8 },
266  { "tcall 15", SPC700_ARG_NONE },
267  { "clr1 0x%02x.7", SPC700_ARG_ABS8 },
268  { "bbc 0x%02x.7, 0x%04x", SPC700_ARG_ABS8_REL8 },
269  { "mov a, 0x%02x+x", SPC700_ARG_ABS8 },
270  { "mov a, 0x%04x+x", SPC700_ARG_ABS16 },
271  { "mov a, 0x%04x+y", SPC700_ARG_ABS16 },
272  { "mov a, [0x%02x]+y", SPC700_ARG_ABS8 },
273  { "mov x, 0x%02x", SPC700_ARG_ABS8 },
274  { "mov x, 0x%02x+y", SPC700_ARG_ABS8 },
275  { "mov 0x%02x, 0x%02x", SPC700_ARG_ABS8_ABS8 },
276  { "mov y, 0x%02x+x", SPC700_ARG_ABS8 },
277  { "inc y", SPC700_ARG_NONE },
278  { "mov y, a", SPC700_ARG_NONE },
279  { "dbnz y, 0x%04x", SPC700_ARG_REL8 },
280  { "stop", SPC700_ARG_NONE }
281 };
rz_types.h
Spc700Op
struct spc700_op_t Spc700Op
spc700_op_table
static const Spc700Op spc700_op_table[]
Definition: spc700_opcode_table.h:24
Spc700ArgType
Spc700ArgType
Definition: spc700_opcode_table.h:6
SPC700_ARG_ABS8
@ SPC700_ARG_ABS8
Definition: spc700_opcode_table.h:9
SPC700_ARG_ABS8_REL8
@ SPC700_ARG_ABS8_REL8
Definition: spc700_opcode_table.h:10
SPC700_ARG_IMM8_ABS8
@ SPC700_ARG_IMM8_ABS8
Definition: spc700_opcode_table.h:15
SPC700_ARG_REL8
@ SPC700_ARG_REL8
Definition: spc700_opcode_table.h:14
SPC700_ARG_NONE
@ SPC700_ARG_NONE
Definition: spc700_opcode_table.h:7
SPC700_ARG_IMM8
@ SPC700_ARG_IMM8
Definition: spc700_opcode_table.h:8
SPC700_ARG_ABS16
@ SPC700_ARG_ABS16
Definition: spc700_opcode_table.h:12
SPC700_ARG_ABS13_BIT3
@ SPC700_ARG_ABS13_BIT3
Definition: spc700_opcode_table.h:13
SPC700_ARG_ABS8_ABS8
@ SPC700_ARG_ABS8_ABS8
Definition: spc700_opcode_table.h:11
SPC700_ARG_UPPER8
@ SPC700_ARG_UPPER8
Definition: spc700_opcode_table.h:16
spc700_op_t
Definition: spc700_opcode_table.h:19
spc700_op_t::name
char * name
Definition: spc700_opcode_table.h:20
spc700_op_t::arg
Spc700ArgType arg
Definition: spc700_opcode_table.h:21