Rizin
unix-like reverse engineering framework and cli tools
neon-simd-ldst-one-elem.s.cs
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1 # CS_ARCH_ARM64, 0, None
2 0x00,0xc0,0x40,0x4d = ld1r {v0.16b}, [x0]
3 0xef,0xc5,0x40,0x4d = ld1r {v15.8h}, [x15]
4 0xff,0xcb,0x40,0x4d = ld1r {v31.4s}, [sp]
5 0x00,0xcc,0x40,0x4d = ld1r {v0.2d}, [x0]
6 0x00,0xc0,0x40,0x0d = ld1r {v0.8b}, [x0]
7 0xef,0xc5,0x40,0x0d = ld1r {v15.4h}, [x15]
8 0xff,0xcb,0x40,0x0d = ld1r {v31.2s}, [sp]
9 0x00,0xcc,0x40,0x0d = ld1r {v0.1d}, [x0]
10 0x00,0xc0,0x60,0x4d = ld2r {v0.16b, v1.16b}, [x0]
11 0xef,0xc5,0x60,0x4d = ld2r {v15.8h, v16.8h}, [x15]
12 0xff,0xcb,0x60,0x4d = ld2r {v31.4s, v0.4s}, [sp]
13 0x00,0xcc,0x60,0x4d = ld2r {v0.2d, v1.2d}, [x0]
14 0x00,0xc0,0x60,0x0d = ld2r {v0.8b, v1.8b}, [x0]
15 0xef,0xc5,0x60,0x0d = ld2r {v15.4h, v16.4h}, [x15]
16 0xff,0xcb,0x60,0x0d = ld2r {v31.2s, v0.2s}, [sp]
17 0xff,0xcf,0x60,0x0d = ld2r {v31.1d, v0.1d}, [sp]
18 0x00,0xe0,0x40,0x4d = ld3r {v0.16b, v1.16b, v2.16b}, [x0]
19 0xef,0xe5,0x40,0x4d = ld3r {v15.8h, v16.8h, v17.8h}, [x15]
20 0xff,0xeb,0x40,0x4d = ld3r {v31.4s, v0.4s, v1.4s}, [sp]
21 0x00,0xec,0x40,0x4d = ld3r {v0.2d, v1.2d, v2.2d}, [x0]
22 0x00,0xe0,0x40,0x0d = ld3r {v0.8b, v1.8b, v2.8b}, [x0]
23 0xef,0xe5,0x40,0x0d = ld3r {v15.4h, v16.4h, v17.4h}, [x15]
24 0xff,0xeb,0x40,0x0d = ld3r {v31.2s, v0.2s, v1.2s}, [sp]
25 0xff,0xef,0x40,0x0d = ld3r {v31.1d, v0.1d, v1.1d}, [sp]
26 0x00,0xe0,0x60,0x4d = ld4r {v0.16b, v1.16b, v2.16b, v3.16b}, [x0]
27 0xef,0xe5,0x60,0x4d = ld4r {v15.8h, v16.8h, v17.8h, v18.8h}, [x15]
28 0xff,0xeb,0x60,0x4d = ld4r {v31.4s, v0.4s, v1.4s, v2.4s}, [sp]
29 0x00,0xec,0x60,0x4d = ld4r {v0.2d, v1.2d, v2.2d, v3.2d}, [x0]
30 0x00,0xe0,0x60,0x0d = ld4r {v0.8b, v1.8b, v2.8b, v3.8b}, [x0]
31 0xef,0xe5,0x60,0x0d = ld4r {v15.4h, v16.4h, v17.4h, v18.4h}, [x15]
32 0xff,0xeb,0x60,0x0d = ld4r {v31.2s, v0.2s, v1.2s, v2.2s}, [sp]
33 0xff,0xef,0x60,0x0d = ld4r {v31.1d, v0.1d, v1.1d, v2.1d}, [sp]
34 0x00,0x04,0x40,0x4d = ld1 {v0.b}[9], [x0]
35 0xef,0x59,0x40,0x4d = ld1 {v15.h}[7], [x15]
36 0xff,0x93,0x40,0x4d = ld1 {v31.s}[3], [sp]
37 0x00,0x84,0x40,0x4d = ld1 {v0.d}[1], [x0]
38 0x00,0x04,0x60,0x4d = ld2 {v0.b, v1.b}[9], [x0]
39 0xef,0x59,0x60,0x4d = ld2 {v15.h, v16.h}[7], [x15]
40 0xff,0x93,0x60,0x4d = ld2 {v31.s, v0.s}[3], [sp]
41 0x00,0x84,0x60,0x4d = ld2 {v0.d, v1.d}[1], [x0]
42 0x00,0x24,0x40,0x4d = ld3 {v0.b, v1.b, v2.b}[9], [x0]
43 0xef,0x79,0x40,0x4d = ld3 {v15.h, v16.h, v17.h}[7], [x15]
44 0xff,0xb3,0x40,0x4d = ld3 {v31.s, v0.s, v1.s}[3], [sp]
45 0x00,0xa4,0x40,0x4d = ld3 {v0.d, v1.d, v2.d}[1], [x0]
46 0x00,0x24,0x60,0x4d = ld4 {v0.b, v1.b, v2.b, v3.b}[9], [x0]
47 0xef,0x79,0x60,0x4d = ld4 {v15.h, v16.h, v17.h, v18.h}[7], [x15]
48 0xff,0xb3,0x60,0x4d = ld4 {v31.s, v0.s, v1.s, v2.s}[3], [sp]
49 0x00,0xa4,0x60,0x4d = ld4 {v0.d, v1.d, v2.d, v3.d}[1], [x0]
50 0x00,0x04,0x00,0x4d = st1 {v0.b}[9], [x0]
51 0xef,0x59,0x00,0x4d = st1 {v15.h}[7], [x15]
52 0xff,0x93,0x00,0x4d = st1 {v31.s}[3], [sp]
53 0x00,0x84,0x00,0x4d = st1 {v0.d}[1], [x0]
54 0x00,0x04,0x20,0x4d = st2 {v0.b, v1.b}[9], [x0]
55 0xef,0x59,0x20,0x4d = st2 {v15.h, v16.h}[7], [x15]
56 0xff,0x93,0x20,0x4d = st2 {v31.s, v0.s}[3], [sp]
57 0x00,0x84,0x20,0x4d = st2 {v0.d, v1.d}[1], [x0]
58 0x00,0x24,0x00,0x4d = st3 {v0.b, v1.b, v2.b}[9], [x0]
59 0xef,0x79,0x00,0x4d = st3 {v15.h, v16.h, v17.h}[7], [x15]
60 0xff,0xb3,0x00,0x4d = st3 {v31.s, v0.s, v1.s}[3], [sp]
61 0x00,0xa4,0x00,0x4d = st3 {v0.d, v1.d, v2.d}[1], [x0]
62 0x00,0x24,0x20,0x4d = st4 {v0.b, v1.b, v2.b, v3.b}[9], [x0]
63 0xef,0x79,0x20,0x4d = st4 {v15.h, v16.h, v17.h, v18.h}[7], [x15]
64 0xff,0xb3,0x20,0x4d = st4 {v31.s, v0.s, v1.s, v2.s}[3], [sp]
65 0x00,0xa4,0x20,0x4d = st4 {v0.d, v1.d, v2.d, v3.d}[1], [x0]
66 0x00,0xc0,0xdf,0x4d = ld1r {v0.16b}, [x0], #1
67 0xef,0xc5,0xdf,0x4d = ld1r {v15.8h}, [x15], #2
68 0xff,0xcb,0xdf,0x4d = ld1r {v31.4s}, [sp], #4
69 0x00,0xcc,0xdf,0x4d = ld1r {v0.2d}, [x0], #8
70 0x00,0xc0,0xc0,0x0d = ld1r {v0.8b}, [x0], x0
71 0xef,0xc5,0xc1,0x0d = ld1r {v15.4h}, [x15], x1
72 0xff,0xcb,0xc2,0x0d = ld1r {v31.2s}, [sp], x2
73 0x00,0xcc,0xc3,0x0d = ld1r {v0.1d}, [x0], x3
74 0x00,0xc0,0xff,0x4d = ld2r {v0.16b, v1.16b}, [x0], #2
75 0xef,0xc5,0xff,0x4d = ld2r {v15.8h, v16.8h}, [x15], #4
76 0xff,0xcb,0xff,0x4d = ld2r {v31.4s, v0.4s}, [sp], #8
77 0x00,0xcc,0xff,0x4d = ld2r {v0.2d, v1.2d}, [x0], #16
78 0x00,0xc0,0xe6,0x0d = ld2r {v0.8b, v1.8b}, [x0], x6
79 0xef,0xc5,0xe7,0x0d = ld2r {v15.4h, v16.4h}, [x15], x7
80 0xff,0xcb,0xe9,0x0d = ld2r {v31.2s, v0.2s}, [sp], x9
81 0x1f,0xcc,0xe5,0x0d = ld2r {v31.1d, v0.1d}, [x0], x5
82 0x00,0xe0,0xc9,0x4d = ld3r {v0.16b, v1.16b, v2.16b}, [x0], x9
83 0xef,0xe5,0xc6,0x4d = ld3r {v15.8h, v16.8h, v17.8h}, [x15], x6
84 0xff,0xeb,0xc7,0x4d = ld3r {v31.4s, v0.4s, v1.4s}, [sp], x7
85 0x00,0xec,0xc5,0x4d = ld3r {v0.2d, v1.2d, v2.2d}, [x0], x5
86 0x00,0xe0,0xdf,0x0d = ld3r {v0.8b, v1.8b, v2.8b}, [x0], #3
87 0xef,0xe5,0xdf,0x0d = ld3r {v15.4h, v16.4h, v17.4h}, [x15], #6
88 0xff,0xeb,0xdf,0x0d = ld3r {v31.2s, v0.2s, v1.2s}, [sp], #12
89 0xff,0xef,0xdf,0x0d = ld3r {v31.1d, v0.1d, v1.1d}, [sp], #24
90 0x00,0xe0,0xff,0x4d = ld4r {v0.16b, v1.16b, v2.16b, v3.16b}, [x0], #4
91 0xef,0xe5,0xff,0x4d = ld4r {v15.8h, v16.8h, v17.8h, v18.8h}, [x15], #8
92 0xff,0xeb,0xff,0x4d = ld4r {v31.4s, v0.4s, v1.4s, v2.4s}, [sp], #16
93 0x00,0xec,0xff,0x4d = ld4r {v0.2d, v1.2d, v2.2d, v3.2d}, [x0], #32
94 0x00,0xe0,0xe5,0x0d = ld4r {v0.8b, v1.8b, v2.8b, v3.8b}, [x0], x5
95 0xef,0xe5,0xe9,0x0d = ld4r {v15.4h, v16.4h, v17.4h, v18.4h}, [x15], x9
96 0xff,0xeb,0xfe,0x0d = ld4r {v31.2s, v0.2s, v1.2s, v2.2s}, [sp], x30
97 0xff,0xef,0xe7,0x0d = ld4r {v31.1d, v0.1d, v1.1d, v2.1d}, [sp], x7
98 0x00,0x04,0xdf,0x4d = ld1 {v0.b}[9], [x0], #1
99 0xef,0x59,0xc9,0x4d = ld1 {v15.h}[7], [x15], x9
100 0xff,0x93,0xc6,0x4d = ld1 {v31.s}[3], [sp], x6
101 0x00,0x84,0xdf,0x4d = ld1 {v0.d}[1], [x0], #8
102 0x00,0x04,0xe3,0x4d = ld2 {v0.b, v1.b}[9], [x0], x3
103 0xef,0x59,0xff,0x4d = ld2 {v15.h, v16.h}[7], [x15], #4
104 0xff,0x93,0xff,0x4d = ld2 {v31.s, v0.s}[3], [sp], #8
105 0x00,0x84,0xe0,0x4d = ld2 {v0.d, v1.d}[1], [x0], x0
106 0x00,0x24,0xdf,0x4d = ld3 {v0.b, v1.b, v2.b}[9], [x0], #3
107 0xef,0x79,0xdf,0x4d = ld3 {v15.h, v16.h, v17.h}[7], [x15], #6
108 0xff,0xb3,0xc3,0x4d = ld3 {v31.s, v0.s, v1.s}[3], [sp], x3
109 0x00,0xa4,0xc6,0x4d = ld3 {v0.d, v1.d, v2.d}[1], [x0], x6
110 0x00,0x24,0xe5,0x4d = ld4 {v0.b, v1.b, v2.b, v3.b}[9], [x0], x5
111 0xef,0x79,0xe7,0x4d = ld4 {v15.h, v16.h, v17.h, v18.h}[7], [x15], x7
112 0xff,0xb3,0xff,0x4d = ld4 {v31.s, v0.s, v1.s, v2.s}[3], [sp], #16
113 0x00,0xa4,0xff,0x4d = ld4 {v0.d, v1.d, v2.d, v3.d}[1], [x0], #32
114 0x00,0x04,0x9f,0x4d = st1 {v0.b}[9], [x0], #1
115 0xef,0x59,0x89,0x4d = st1 {v15.h}[7], [x15], x9
116 0xff,0x93,0x86,0x4d = st1 {v31.s}[3], [sp], x6
117 0x00,0x84,0x9f,0x4d = st1 {v0.d}[1], [x0], #8
118 0x00,0x04,0xa3,0x4d = st2 {v0.b, v1.b}[9], [x0], x3
119 0xef,0x59,0xbf,0x4d = st2 {v15.h, v16.h}[7], [x15], #4
120 0xff,0x93,0xbf,0x4d = st2 {v31.s, v0.s}[3], [sp], #8
121 0x00,0x84,0xa0,0x4d = st2 {v0.d, v1.d}[1], [x0], x0
122 0x00,0x24,0x9f,0x4d = st3 {v0.b, v1.b, v2.b}[9], [x0], #3
123 0xef,0x79,0x9f,0x4d = st3 {v15.h, v16.h, v17.h}[7], [x15], #6
124 0xff,0xb3,0x83,0x4d = st3 {v31.s, v0.s, v1.s}[3], [sp], x3
125 0x00,0xa4,0x86,0x4d = st3 {v0.d, v1.d, v2.d}[1], [x0], x6
126 0x00,0x24,0xa5,0x4d = st4 {v0.b, v1.b, v2.b, v3.b}[9], [x0], x5
127 0xef,0x79,0xa7,0x4d = st4 {v15.h, v16.h, v17.h, v18.h}[7], [x15], x7
128 0xff,0xb3,0xbf,0x4d = st4 {v31.s, v0.s, v1.s, v2.s}[3], [sp], #16
129 0x00,0xa4,0xbf,0x4d = st4 {v0.d, v1.d, v2.d, v3.d}[1], [x0], #32
@ v0
Definition: lanai.h:84
@ v1
Definition: lanai.h:85
static int sp
Definition: z80asm.c:91