15 from capstone
import *
18 from random
import randint
23 FILE =
'/usr/bin/python'
26 INTERVALS = (4, 5, 7, 9, 11, 13)
29 (CS_ARCH_X86, CS_MODE_16,
"X86-16bit (Intel syntax)", 0),
30 (CS_ARCH_X86, CS_MODE_16,
"X86-16bit (ATT syntax)", CS_OPT_SYNTAX_ATT),
31 (CS_ARCH_X86, CS_MODE_32,
"X86-32 (Intel syntax)", 0),
32 (CS_ARCH_X86, CS_MODE_32,
"X86-32 (ATT syntax)", CS_OPT_SYNTAX_ATT),
33 (CS_ARCH_X86, CS_MODE_64,
"X86-64 (Intel syntax)", 0),
34 (CS_ARCH_X86, CS_MODE_64,
"X86-64 (ATT syntax)", CS_OPT_SYNTAX_ATT),
35 (CS_ARCH_ARM, CS_MODE_ARM,
"ARM", 0),
36 (CS_ARCH_ARM, CS_MODE_THUMB,
"THUMB (ARM)", 0),
37 (CS_ARCH_MIPS, CS_MODE_MIPS32 + CS_MODE_BIG_ENDIAN,
"MIPS-32 (Big-endian)", 0),
38 (CS_ARCH_MIPS, CS_MODE_MIPS64 + CS_MODE_LITTLE_ENDIAN,
"MIPS-64-EL (Little-endian)", 0),
39 (CS_ARCH_ARM64, CS_MODE_ARM,
"ARM-64 (AArch64)", 0),
40 (CS_ARCH_PPC, CS_MODE_BIG_ENDIAN,
"PPC", 0),
41 (CS_ARCH_PPC, CS_MODE_BIG_ENDIAN,
"PPC, print register with number only", CS_OPT_SYNTAX_NOREGNAME),
42 (CS_ARCH_SPARC, CS_MODE_BIG_ENDIAN,
"Sparc", 0),
43 (CS_ARCH_SYSZ, 0,
"SystemZ", 0),
44 (CS_ARCH_XCORE, 0,
"XCore", 0),
45 (CS_ARCH_M68K, 0,
"M68K", 0),
51 return " ".join(
"0x" +
"{0:x}".format(ord(c)).zfill(2)
for c
in s)
67 insns = md.disasm(code, 0)
69 if i.address == 0x100000:
74 insns = md.disasm_lite(code, 0)
75 for (addr, size, mnem, ops)
in insns:
82 for (arch, mode, comment, syntax)
in all_tests:
85 if not request
in comment.lower():
98 print(
"\nFuzzing disasm() @platform: %s" %comment)
100 print(
"Interval: %u" %ii)
101 for j
in xrange(1, TIMES):
111 print(
"Fuzzing disasm_lite() @platform: %s" %comment)
113 print(
"Interval: %u" %ii)
114 for j
in xrange(1, TIMES):
124 print(
"ERROR: %s" %e)