4 #ifdef CAPSTONE_HAS_ARM64
9 #include "../../utils.h"
13 #define GET_INSTRINFO_ENUM
17 static const name_map reg_name_maps[] = {
285 #ifndef CAPSTONE_DIET
289 return reg_name_maps[
reg].
name;
299 #ifndef CAPSTONE_DIET
300 { 0 }, { 0 }, { 0 }, 0, 0
312 insn->id =
insns[
i].mapid;
315 #ifndef CAPSTONE_DIET
334 static const name_map insn_name_maps[] = {
756 static const name_map alias_insn_name_maps[] = {
808 #ifndef CAPSTONE_DIET
815 return insn_name_maps[
id].
name;
818 for (
i = 0;
i <
ARR_SIZE(alias_insn_name_maps);
i++) {
819 if (alias_insn_name_maps[
i].
id ==
id)
820 return alias_insn_name_maps[
i].
name;
830 #ifndef CAPSTONE_DIET
851 #ifndef CAPSTONE_DIET
877 static const unsigned int map[] = { 0,
892 ARM64_REG_V31, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
893 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
998 #ifndef CAPSTONE_DIET
1001 typedef struct insn_op {
1002 unsigned int eflags_update;
1006 static insn_op insn_ops[] = {
1020 return insn_ops[
i].access;
1027 cs_regs regs_read,
uint8_t *regs_read_count,
1028 cs_regs regs_write,
uint8_t *regs_write_count)
1031 uint8_t read_count, write_count;
1034 read_count = insn->detail->regs_read_count;
1035 write_count = insn->detail->regs_write_count;
1038 memcpy(regs_read, insn->detail->regs_read, read_count *
sizeof(insn->detail->regs_read[0]));
1039 memcpy(regs_write, insn->detail->regs_write, write_count *
sizeof(insn->detail->regs_write[0]));
1042 for (
i = 0;
i <
arm64->op_count;
i++) {
1044 switch((
int)
op->type) {
1058 regs_read[read_count] = (
uint16_t)
op->mem.base;
1062 regs_read[read_count] = (
uint16_t)
op->mem.index;
1066 regs_write[write_count] = (
uint16_t)
op->mem.base;
1074 *regs_read_count = read_count;
1075 *regs_write_count = write_count;
void arm64_op_addFP(MCInst *MI, float fp)
const char * AArch64_insn_name(csh handle, unsigned int id)
uint8_t * AArch64_get_op_access(cs_struct *h, unsigned int id)
arm64_reg AArch64_map_insn(const char *name)
void arm64_op_addImm(MCInst *MI, int64_t imm)
void arm64_op_addVectorElementSizeSpecifier(MCInst *MI, int sp)
void arm64_op_addVectorArrSpecifier(MCInst *MI, int sp)
void AArch64_get_insn_id(cs_struct *h, cs_insn *insn, unsigned int id)
void AArch64_reg_access(const cs_insn *insn, cs_regs regs_read, uint8_t *regs_read_count, cs_regs regs_write, uint8_t *regs_write_count)
arm64_reg AArch64_map_vregister(unsigned int r)
const char * AArch64_reg_name(csh handle, unsigned int reg)
const char * AArch64_group_name(csh handle, unsigned int id)
static name_map group_name_maps[]
static mcore_handle handle
@ ARM64_OP_FP
= CS_OP_FP (Floating-Point operand).
@ ARM64_OP_REG
= CS_OP_REG (Register operand).
@ ARM64_OP_IMM
= CS_OP_IMM (Immediate operand).
@ ARM64_GRP_INVALID
= CS_GRP_INVALID
@ ARM64_GRP_BRANCH_RELATIVE
= CS_GRP_BRANCH_RELATIVE
@ ARM64_GRP_PRIVILEGE
= CS_GRP_PRIVILEGE
@ ARM64_GRP_JUMP
= CS_GRP_JUMP
arm64_reg
ARM64 registers.
@ ARM_OP_MEM
= CS_OP_MEM (Memory operand).
@ CS_AC_READ
Operand read from memory or register.
@ CS_AC_WRITE
Operand write to memory or register.
CAPSTONE_EXPORT bool CAPSTONE_API cs_reg_write(csh ud, const cs_insn *insn, unsigned int reg_id)
size_t map(int syms, int left, int len)
memcpy(mem, inblock.get(), min(CONTAINING_RECORD(inblock.get(), MEMBLOCK, data) ->size, size))
static static fork const void static count static fd const char static mode const char static pathname const char static path const char static dev const char static group static getpid static getuid void void static data static pause access
int name2id(const name_map *map, int max, const char *name)
bool arr_exist(uint16_t *arr, unsigned char max, unsigned int id)
unsigned int count_positive(const uint16_t *list)
unsigned int count_positive8(const unsigned char *list)
unsigned short insn_find(const insn_map *insns, unsigned int max, unsigned int id, unsigned short **cache)
const char * id2name(const name_map *map, int max, const unsigned int id)
static struct insnlist * insns[64]
1.9.1