12 #include "../../MCInst.h"
13 #include "../../LEB128.h"
16 #define FieldFromInstruction(fname, InsnType) \
17 static InsnType fname(InsnType insn, unsigned startBit, unsigned numBits) \
20 if (numBits == sizeof(InsnType)*8) \
21 fieldMask = (InsnType)(-1LL); \
23 fieldMask = (((InsnType)1 << numBits) - 1) << startBit; \
24 return (insn & fieldMask) >> startBit; \
27 static const uint8_t DecoderTableSparc32[] = {
1441 static bool checkDecoderPredicate(
unsigned Idx,
uint64_t Bits)
1446 return getbool(Bits & Sparc_FeatureV9);
1448 return getbool(Bits & Sparc_FeatureVIS3);
1450 return getbool(Bits & Sparc_FeatureVIS);
1452 return getbool(Bits & Sparc_FeatureVIS2);
1456 #define DecodeToMCInst(fname,fieldname, InsnType) \
1457 static DecodeStatus fname(DecodeStatus S, unsigned Idx, InsnType insn, MCInst *MI, \
1458 uint64_t Address, const void *Decoder) \
1464 tmp = fieldname(insn, 0, 22); \
1465 MCOperand_CreateImm0(MI, tmp); \
1468 tmp = fieldname(insn, 0, 19); \
1469 MCOperand_CreateImm0(MI, tmp); \
1470 tmp = fieldname(insn, 25, 4); \
1471 MCOperand_CreateImm0(MI, tmp); \
1474 tmp = fieldname(insn, 0, 22); \
1475 MCOperand_CreateImm0(MI, tmp); \
1476 tmp = fieldname(insn, 25, 4); \
1477 MCOperand_CreateImm0(MI, tmp); \
1480 tmp = fieldname(insn, 14, 5); \
1481 if (DecodeI64RegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1483 tmp |= fieldname(insn, 0, 14) << 0; \
1484 tmp |= fieldname(insn, 20, 2) << 14; \
1485 MCOperand_CreateImm0(MI, tmp); \
1490 tmp = fieldname(insn, 25, 5); \
1491 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1492 tmp = fieldname(insn, 0, 22); \
1493 MCOperand_CreateImm0(MI, tmp); \
1496 tmp = fieldname(insn, 0, 19); \
1497 MCOperand_CreateImm0(MI, tmp); \
1498 tmp = fieldname(insn, 25, 4); \
1499 MCOperand_CreateImm0(MI, tmp); \
1500 tmp = fieldname(insn, 20, 2); \
1501 if (DecodeFCCRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1504 tmp = fieldname(insn, 0, 30); \
1505 if (DecodeCall(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1508 tmp = fieldname(insn, 25, 5); \
1509 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1510 tmp = fieldname(insn, 14, 5); \
1511 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1512 tmp = fieldname(insn, 0, 5); \
1513 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1516 tmp = fieldname(insn, 25, 5); \
1517 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1518 tmp = fieldname(insn, 14, 5); \
1519 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1520 tmp = fieldname(insn, 0, 13); \
1521 if (DecodeSIMM13(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1524 tmp = fieldname(insn, 25, 5); \
1525 if (DecodeI64RegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1526 tmp = fieldname(insn, 14, 5); \
1527 if (DecodeI64RegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1528 tmp = fieldname(insn, 0, 5); \
1529 if (DecodeI64RegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1532 tmp = fieldname(insn, 25, 5); \
1533 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1534 tmp = fieldname(insn, 14, 5); \
1535 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1536 tmp = fieldname(insn, 0, 13); \
1537 MCOperand_CreateImm0(MI, tmp); \
1540 tmp = fieldname(insn, 14, 5); \
1541 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1542 tmp = fieldname(insn, 0, 5); \
1543 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1546 tmp = fieldname(insn, 14, 5); \
1547 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1548 tmp = fieldname(insn, 0, 13); \
1549 if (DecodeSIMM13(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1552 tmp = fieldname(insn, 25, 5); \
1553 if (DecodeI64RegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1554 tmp = fieldname(insn, 14, 5); \
1555 if (DecodeI64RegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1556 tmp = fieldname(insn, 0, 5); \
1557 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1560 tmp = fieldname(insn, 25, 5); \
1561 if (DecodeI64RegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1562 tmp = fieldname(insn, 14, 5); \
1563 if (DecodeI64RegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1564 tmp = fieldname(insn, 0, 6); \
1565 MCOperand_CreateImm0(MI, tmp); \
1568 tmp = fieldname(insn, 0, 13); \
1569 if (DecodeSIMM13(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1572 tmp = fieldname(insn, 25, 5); \
1573 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1574 tmp = fieldname(insn, 0, 5); \
1575 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1576 tmp = fieldname(insn, 25, 5); \
1577 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1578 tmp = fieldname(insn, 14, 4); \
1579 MCOperand_CreateImm0(MI, tmp); \
1582 tmp = fieldname(insn, 25, 5); \
1583 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1584 tmp = fieldname(insn, 11, 2); \
1585 if (DecodeFCCRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1586 tmp = fieldname(insn, 0, 5); \
1587 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1588 tmp = fieldname(insn, 25, 5); \
1589 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1590 tmp = fieldname(insn, 14, 4); \
1591 MCOperand_CreateImm0(MI, tmp); \
1594 tmp = fieldname(insn, 25, 5); \
1595 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1596 tmp = fieldname(insn, 0, 11); \
1597 MCOperand_CreateImm0(MI, tmp); \
1598 tmp = fieldname(insn, 25, 5); \
1599 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1600 tmp = fieldname(insn, 14, 4); \
1601 MCOperand_CreateImm0(MI, tmp); \
1604 tmp = fieldname(insn, 25, 5); \
1605 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1606 tmp = fieldname(insn, 11, 2); \
1607 if (DecodeFCCRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1608 tmp = fieldname(insn, 0, 11); \
1609 MCOperand_CreateImm0(MI, tmp); \
1610 tmp = fieldname(insn, 25, 5); \
1611 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1612 tmp = fieldname(insn, 14, 4); \
1613 MCOperand_CreateImm0(MI, tmp); \
1616 tmp = fieldname(insn, 25, 5); \
1617 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1618 tmp = fieldname(insn, 0, 5); \
1619 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1622 tmp = fieldname(insn, 25, 5); \
1623 if (DecodeI64RegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1624 tmp = fieldname(insn, 14, 5); \
1625 if (DecodeI64RegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1626 tmp = fieldname(insn, 0, 10); \
1627 MCOperand_CreateImm0(MI, tmp); \
1630 tmp = fieldname(insn, 25, 5); \
1631 if (DecodeFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1632 tmp = fieldname(insn, 0, 5); \
1633 if (DecodeFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1636 tmp = fieldname(insn, 25, 5); \
1637 if (DecodeDFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1638 tmp = fieldname(insn, 0, 5); \
1639 if (DecodeDFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1642 tmp = fieldname(insn, 25, 5); \
1643 if (DecodeQFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1644 tmp = fieldname(insn, 0, 5); \
1645 if (DecodeQFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1648 tmp = fieldname(insn, 25, 5); \
1649 if (DecodeFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1650 tmp = fieldname(insn, 14, 5); \
1651 if (DecodeFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1652 tmp = fieldname(insn, 0, 5); \
1653 if (DecodeFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1656 tmp = fieldname(insn, 25, 5); \
1657 if (DecodeDFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1658 tmp = fieldname(insn, 14, 5); \
1659 if (DecodeDFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1660 tmp = fieldname(insn, 0, 5); \
1661 if (DecodeDFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1664 tmp = fieldname(insn, 25, 5); \
1665 if (DecodeQFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1666 tmp = fieldname(insn, 14, 5); \
1667 if (DecodeQFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1668 tmp = fieldname(insn, 0, 5); \
1669 if (DecodeQFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1672 tmp = fieldname(insn, 25, 5); \
1673 if (DecodeDFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1674 tmp = fieldname(insn, 14, 5); \
1675 if (DecodeFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1676 tmp = fieldname(insn, 0, 5); \
1677 if (DecodeFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1680 tmp = fieldname(insn, 25, 5); \
1681 if (DecodeQFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1682 tmp = fieldname(insn, 14, 5); \
1683 if (DecodeDFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1684 tmp = fieldname(insn, 0, 5); \
1685 if (DecodeDFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1688 tmp = fieldname(insn, 25, 5); \
1689 if (DecodeDFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1690 tmp = fieldname(insn, 0, 5); \
1691 if (DecodeFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1694 tmp = fieldname(insn, 25, 5); \
1695 if (DecodeDFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1696 tmp = fieldname(insn, 0, 5); \
1697 if (DecodeQFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1700 tmp = fieldname(insn, 25, 5); \
1701 if (DecodeFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1702 tmp = fieldname(insn, 0, 5); \
1703 if (DecodeDFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1706 tmp = fieldname(insn, 25, 5); \
1707 if (DecodeQFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1708 tmp = fieldname(insn, 0, 5); \
1709 if (DecodeDFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1712 tmp = fieldname(insn, 25, 5); \
1713 if (DecodeFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1714 tmp = fieldname(insn, 0, 5); \
1715 if (DecodeQFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1718 tmp = fieldname(insn, 25, 5); \
1719 if (DecodeQFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1720 tmp = fieldname(insn, 0, 5); \
1721 if (DecodeFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1724 tmp = fieldname(insn, 25, 5); \
1725 if (DecodeFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1726 tmp = fieldname(insn, 0, 5); \
1727 if (DecodeFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1728 tmp = fieldname(insn, 25, 5); \
1729 if (DecodeFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1730 tmp = fieldname(insn, 14, 4); \
1731 MCOperand_CreateImm0(MI, tmp); \
1734 tmp = fieldname(insn, 25, 5); \
1735 if (DecodeFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1736 tmp = fieldname(insn, 11, 2); \
1737 if (DecodeFCCRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1738 tmp = fieldname(insn, 0, 5); \
1739 if (DecodeFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1740 tmp = fieldname(insn, 25, 5); \
1741 if (DecodeFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1742 tmp = fieldname(insn, 14, 4); \
1743 MCOperand_CreateImm0(MI, tmp); \
1746 tmp = fieldname(insn, 25, 5); \
1747 if (DecodeDFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1748 tmp = fieldname(insn, 0, 5); \
1749 if (DecodeDFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1750 tmp = fieldname(insn, 25, 5); \
1751 if (DecodeDFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1752 tmp = fieldname(insn, 14, 4); \
1753 MCOperand_CreateImm0(MI, tmp); \
1756 tmp = fieldname(insn, 25, 5); \
1757 if (DecodeDFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1758 tmp = fieldname(insn, 11, 2); \
1759 if (DecodeFCCRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1760 tmp = fieldname(insn, 0, 5); \
1761 if (DecodeDFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1762 tmp = fieldname(insn, 25, 5); \
1763 if (DecodeDFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1764 tmp = fieldname(insn, 14, 4); \
1765 MCOperand_CreateImm0(MI, tmp); \
1768 tmp = fieldname(insn, 25, 5); \
1769 if (DecodeQFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1770 tmp = fieldname(insn, 0, 5); \
1771 if (DecodeQFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1772 tmp = fieldname(insn, 25, 5); \
1773 if (DecodeQFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1774 tmp = fieldname(insn, 14, 4); \
1775 MCOperand_CreateImm0(MI, tmp); \
1778 tmp = fieldname(insn, 25, 5); \
1779 if (DecodeQFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1780 tmp = fieldname(insn, 11, 2); \
1781 if (DecodeFCCRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1782 tmp = fieldname(insn, 0, 5); \
1783 if (DecodeQFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1784 tmp = fieldname(insn, 25, 5); \
1785 if (DecodeQFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1786 tmp = fieldname(insn, 14, 4); \
1787 MCOperand_CreateImm0(MI, tmp); \
1790 tmp = fieldname(insn, 25, 5); \
1791 if (DecodeFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1792 tmp = fieldname(insn, 14, 5); \
1793 if (DecodeI64RegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1794 tmp = fieldname(insn, 0, 5); \
1795 if (DecodeFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1798 tmp = fieldname(insn, 25, 5); \
1799 if (DecodeFCCRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1800 tmp = fieldname(insn, 14, 5); \
1801 if (DecodeFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1802 tmp = fieldname(insn, 0, 5); \
1803 if (DecodeFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1806 tmp = fieldname(insn, 25, 5); \
1807 if (DecodeFCCRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1808 tmp = fieldname(insn, 14, 5); \
1809 if (DecodeDFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1810 tmp = fieldname(insn, 0, 5); \
1811 if (DecodeDFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1814 tmp = fieldname(insn, 25, 5); \
1815 if (DecodeFCCRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1816 tmp = fieldname(insn, 14, 5); \
1817 if (DecodeQFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1818 tmp = fieldname(insn, 0, 5); \
1819 if (DecodeQFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1822 tmp = fieldname(insn, 25, 5); \
1823 if (DecodeI64RegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1824 tmp = fieldname(insn, 0, 5); \
1825 if (DecodeI64RegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1828 tmp = fieldname(insn, 0, 5); \
1829 if (DecodeI64RegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1832 tmp = fieldname(insn, 25, 5); \
1833 if (DecodeI64RegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1834 tmp = fieldname(insn, 14, 5); \
1835 if (DecodeDFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1836 tmp = fieldname(insn, 0, 5); \
1837 if (DecodeDFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1840 tmp = fieldname(insn, 25, 5); \
1841 if (DecodeDFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1842 tmp = fieldname(insn, 25, 5); \
1843 if (DecodeDFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1846 tmp = fieldname(insn, 25, 5); \
1847 if (DecodeFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1848 tmp = fieldname(insn, 25, 5); \
1849 if (DecodeFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1852 tmp = fieldname(insn, 25, 5); \
1853 if (DecodeDFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1854 tmp = fieldname(insn, 14, 5); \
1855 if (DecodeDFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1858 tmp = fieldname(insn, 25, 5); \
1859 if (DecodeFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1860 tmp = fieldname(insn, 14, 5); \
1861 if (DecodeFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1864 tmp = fieldname(insn, 25, 5); \
1865 if (DecodeI64RegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1866 tmp = fieldname(insn, 0, 5); \
1867 if (DecodeDFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1870 tmp = fieldname(insn, 25, 5); \
1871 if (DecodeDFPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1872 tmp = fieldname(insn, 0, 5); \
1873 if (DecodeI64RegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1876 if (DecodeJMPL(MI, insn, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1879 if (DecodeReturn(MI, insn, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1882 tmp = fieldname(insn, 14, 5); \
1883 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1884 tmp = fieldname(insn, 0, 5); \
1885 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1886 tmp = fieldname(insn, 25, 4); \
1887 MCOperand_CreateImm0(MI, tmp); \
1890 tmp = fieldname(insn, 14, 5); \
1891 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1892 tmp = fieldname(insn, 0, 8); \
1893 MCOperand_CreateImm0(MI, tmp); \
1894 tmp = fieldname(insn, 25, 4); \
1895 MCOperand_CreateImm0(MI, tmp); \
1898 if (DecodeLoadInt(MI, insn, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1901 if (DecodeStoreInt(MI, insn, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1904 if (DecodeSWAP(MI, insn, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1907 if (DecodeLoadFP(MI, insn, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1910 if (DecodeLoadQFP(MI, insn, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1913 if (DecodeLoadDFP(MI, insn, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1916 if (DecodeStoreFP(MI, insn, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1919 if (DecodeStoreQFP(MI, insn, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1922 if (DecodeStoreDFP(MI, insn, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1925 tmp = fieldname(insn, 25, 5); \
1926 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1927 tmp = fieldname(insn, 14, 5); \
1928 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1929 tmp = fieldname(insn, 0, 5); \
1930 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1931 tmp = fieldname(insn, 25, 5); \
1932 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1935 tmp = fieldname(insn, 25, 5); \
1936 if (DecodeI64RegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1937 tmp = fieldname(insn, 14, 5); \
1938 if (DecodeI64RegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1939 tmp = fieldname(insn, 0, 5); \
1940 if (DecodeI64RegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1941 tmp = fieldname(insn, 25, 5); \
1942 if (DecodeI64RegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
1947 #define DecodeInstruction(fname, fieldname, decoder, InsnType) \
1948 static DecodeStatus fname(const uint8_t DecodeTable[], MCInst *MI, \
1949 InsnType insn, uint64_t Address, const MCRegisterInfo *MRI, int feature) \
1951 uint64_t Bits = getFeatureBits(feature); \
1952 const uint8_t *Ptr = DecodeTable; \
1953 uint32_t CurFieldValue = 0, ExpectedValue; \
1954 DecodeStatus S = MCDisassembler_Success; \
1955 unsigned Start, Len, NumToSkip, PIdx, Opc, DecodeIdx; \
1956 InsnType Val, FieldValue, PositiveMask, NegativeMask; \
1961 return MCDisassembler_Fail; \
1962 case MCD_OPC_ExtractField: { \
1966 CurFieldValue = (uint32_t)fieldname(insn, Start, Len); \
1969 case MCD_OPC_FilterValue: { \
1970 Val = (InsnType)decodeULEB128(++Ptr, &Len); \
1972 NumToSkip = *Ptr++; \
1973 NumToSkip |= (*Ptr++) << 8; \
1974 if (Val != CurFieldValue) \
1978 case MCD_OPC_CheckField: { \
1981 FieldValue = fieldname(insn, Start, Len); \
1982 ExpectedValue = (uint32_t)decodeULEB128(++Ptr, &Len); \
1984 NumToSkip = *Ptr++; \
1985 NumToSkip |= (*Ptr++) << 8; \
1986 if (ExpectedValue != FieldValue) \
1990 case MCD_OPC_CheckPredicate: { \
1991 PIdx = (uint32_t)decodeULEB128(++Ptr, &Len); \
1993 NumToSkip = *Ptr++; \
1994 NumToSkip |= (*Ptr++) << 8; \
1995 Pred = checkDecoderPredicate(PIdx, Bits); \
2001 case MCD_OPC_Decode: { \
2002 Opc = (unsigned)decodeULEB128(++Ptr, &Len); \
2004 DecodeIdx = (unsigned)decodeULEB128(Ptr, &Len); \
2006 MCInst_setOpcode(MI, Opc); \
2007 return decoder(S, DecodeIdx, insn, MI, Address, MRI); \
2009 case MCD_OPC_SoftFail: { \
2010 PositiveMask = (InsnType)decodeULEB128(++Ptr, &Len); \
2012 NegativeMask = (InsnType)decodeULEB128(Ptr, &Len); \
2014 Fail = (insn & PositiveMask) || (~insn & NegativeMask); \
2016 S = MCDisassembler_SoftFail; \
2019 case MCD_OPC_Fail: { \
2020 return MCDisassembler_Fail; \
2026 FieldFromInstruction(fieldFromInstruction_4,
uint32_t)
2027 DecodeToMCInst(decodeToMCInst_4, fieldFromInstruction_4,
uint32_t)
2028 DecodeInstruction(decodeInstruction_4, fieldFromInstruction_4, decodeToMCInst_4,
uint32_t)