2820 static const uint32_t OpInfo2[] = {
5624 #ifndef CAPSTONE_DIET
5625 static const char AsmStrs[] = {
5626 's',
'h',
'a',
'1',
's',
'u',
'0',
'.',
'3',
'2', 9, 0,
5627 's',
'h',
'a',
'2',
'5',
'6',
's',
'u',
'0',
'.',
'3',
'2', 9, 0,
5628 's',
'h',
'a',
'1',
's',
'u',
'1',
'.',
'3',
'2', 9, 0,
5629 's',
'h',
'a',
'2',
'5',
'6',
's',
'u',
'1',
'.',
'3',
'2', 9, 0,
5630 's',
'h',
'a',
'2',
'5',
'6',
'h',
'2',
'.',
'3',
'2', 9, 0,
5631 's',
'h',
'a',
'1',
'c',
'.',
'3',
'2', 9, 0,
5632 's',
'h',
'a',
'1',
'h',
'.',
'3',
'2', 9, 0,
5633 's',
'h',
'a',
'2',
'5',
'6',
'h',
'.',
'3',
'2', 9, 0,
5634 's',
'h',
'a',
'1',
'm',
'.',
'3',
'2', 9, 0,
5635 's',
'h',
'a',
'1',
'p',
'.',
'3',
'2', 9, 0,
5636 'v',
'c',
'v',
't',
'a',
'.',
's',
'3',
'2',
'.',
'f',
'3',
'2', 9, 0,
5637 'v',
'c',
'v',
't',
'm',
'.',
's',
'3',
'2',
'.',
'f',
'3',
'2', 9, 0,
5638 'v',
'c',
'v',
't',
'n',
'.',
's',
'3',
'2',
'.',
'f',
'3',
'2', 9, 0,
5639 'v',
'c',
'v',
't',
'p',
'.',
's',
'3',
'2',
'.',
'f',
'3',
'2', 9, 0,
5640 'v',
'c',
'v',
't',
'a',
'.',
'u',
'3',
'2',
'.',
'f',
'3',
'2', 9, 0,
5641 'v',
'c',
'v',
't',
'm',
'.',
'u',
'3',
'2',
'.',
'f',
'3',
'2', 9, 0,
5642 'v',
'c',
'v',
't',
'n',
'.',
'u',
'3',
'2',
'.',
'f',
'3',
'2', 9, 0,
5643 'v',
'c',
'v',
't',
'p',
'.',
'u',
'3',
'2',
'.',
'f',
'3',
'2', 9, 0,
5644 'v',
'r',
'i',
'n',
't',
'a',
'.',
'f',
'3',
'2', 9, 0,
5645 'v',
's',
'e',
'l',
'g',
'e',
'.',
'f',
'3',
'2', 9, 0,
5646 'v',
'm',
'i',
'n',
'n',
'm',
'.',
'f',
'3',
'2', 9, 0,
5647 'v',
'm',
'a',
'x',
'n',
'm',
'.',
'f',
'3',
'2', 9, 0,
5648 'v',
'r',
'i',
'n',
't',
'm',
'.',
'f',
'3',
'2', 9, 0,
5649 'v',
'r',
'i',
'n',
't',
'n',
'.',
'f',
'3',
'2', 9, 0,
5650 'v',
'r',
'i',
'n',
't',
'p',
'.',
'f',
'3',
'2', 9, 0,
5651 'v',
's',
'e',
'l',
'e',
'q',
'.',
'f',
'3',
'2', 9, 0,
5652 'v',
's',
'e',
'l',
'v',
's',
'.',
'f',
'3',
'2', 9, 0,
5653 'v',
's',
'e',
'l',
'g',
't',
'.',
'f',
'3',
'2', 9, 0,
5654 'v',
'r',
'i',
'n',
't',
'x',
'.',
'f',
'3',
'2', 9, 0,
5655 'v',
'r',
'i',
'n',
't',
'z',
'.',
'f',
'3',
'2', 9, 0,
5656 'l',
'd',
'c',
'2', 9, 0,
5657 'm',
'r',
'c',
'2', 9, 0,
5658 'm',
'r',
'r',
'c',
'2', 9, 0,
5659 's',
't',
'c',
'2', 9, 0,
5660 'c',
'd',
'p',
'2', 9, 0,
5661 'm',
'c',
'r',
'2', 9, 0,
5662 'm',
'c',
'r',
'r',
'2', 9, 0,
5663 'v',
'c',
'v',
't',
'a',
'.',
's',
'3',
'2',
'.',
'f',
'6',
'4', 9, 0,
5664 'v',
'c',
'v',
't',
'm',
'.',
's',
'3',
'2',
'.',
'f',
'6',
'4', 9, 0,
5665 'v',
'c',
'v',
't',
'n',
'.',
's',
'3',
'2',
'.',
'f',
'6',
'4', 9, 0,
5666 'v',
'c',
'v',
't',
'p',
'.',
's',
'3',
'2',
'.',
'f',
'6',
'4', 9, 0,
5667 'v',
'c',
'v',
't',
'a',
'.',
'u',
'3',
'2',
'.',
'f',
'6',
'4', 9, 0,
5668 'v',
'c',
'v',
't',
'm',
'.',
'u',
'3',
'2',
'.',
'f',
'6',
'4', 9, 0,
5669 'v',
'c',
'v',
't',
'n',
'.',
'u',
'3',
'2',
'.',
'f',
'6',
'4', 9, 0,
5670 'v',
'c',
'v',
't',
'p',
'.',
'u',
'3',
'2',
'.',
'f',
'6',
'4', 9, 0,
5671 'v',
'r',
'i',
'n',
't',
'a',
'.',
'f',
'6',
'4', 9, 0,
5672 'v',
's',
'e',
'l',
'g',
'e',
'.',
'f',
'6',
'4', 9, 0,
5673 'v',
'm',
'i',
'n',
'n',
'm',
'.',
'f',
'6',
'4', 9, 0,
5674 'v',
'm',
'a',
'x',
'n',
'm',
'.',
'f',
'6',
'4', 9, 0,
5675 'v',
'r',
'i',
'n',
't',
'm',
'.',
'f',
'6',
'4', 9, 0,
5676 'v',
'r',
'i',
'n',
't',
'n',
'.',
'f',
'6',
'4', 9, 0,
5677 'v',
'r',
'i',
'n',
't',
'p',
'.',
'f',
'6',
'4', 9, 0,
5678 'v',
's',
'e',
'l',
'e',
'q',
'.',
'f',
'6',
'4', 9, 0,
5679 'v',
's',
'e',
'l',
'v',
's',
'.',
'f',
'6',
'4', 9, 0,
5680 'v',
's',
'e',
'l',
'g',
't',
'.',
'f',
'6',
'4', 9, 0,
5681 'v',
'm',
'u',
'l',
'l',
'.',
'p',
'6',
'4', 9, 0,
5682 'a',
'e',
's',
'i',
'm',
'c',
'.',
'8', 9, 0,
5683 'a',
'e',
's',
'm',
'c',
'.',
'8', 9, 0,
5684 'a',
'e',
's',
'd',
'.',
'8', 9, 0,
5685 'a',
'e',
's',
'e',
'.',
'8', 9, 0,
5686 'r',
'f',
'e',
'd',
'a', 9, 0,
5687 'r',
'f',
'e',
'i',
'a', 9, 0,
5688 'c',
'r',
'c',
'3',
'2',
'b', 9, 0,
5689 'c',
'r',
'c',
'3',
'2',
'c',
'b', 9, 0,
5690 'r',
'f',
'e',
'd',
'b', 9, 0,
5691 'r',
'f',
'e',
'i',
'b', 9, 0,
5692 'd',
'm',
'b', 9, 0,
5693 'd',
's',
'b', 9, 0,
5694 'i',
's',
'b', 9, 0,
5695 'h',
'v',
'c', 9, 0,
5696 'p',
'l',
'd', 9, 0,
5697 's',
'e',
't',
'e',
'n',
'd', 9, 0,
5698 'u',
'd',
'f', 9, 0,
5699 'c',
'r',
'c',
'3',
'2',
'h', 9, 0,
5700 'c',
'r',
'c',
'3',
'2',
'c',
'h', 9, 0,
5701 'p',
'l',
'i', 9, 0,
5702 'l',
'd',
'c',
'2',
'l', 9, 0,
5703 's',
't',
'c',
'2',
'l', 9, 0,
5705 'c',
'p',
's', 9, 0,
5706 'm',
'o',
'v',
's', 9, 0,
5707 'h',
'l',
't', 9, 0,
5708 'b',
'k',
'p',
't', 9, 0,
5709 'h',
'v',
'c',
'.',
'w', 9, 0,
5710 'u',
'd',
'f',
'.',
'w', 9, 0,
5711 'c',
'r',
'c',
'3',
'2',
'w', 9, 0,
5712 'c',
'r',
'c',
'3',
'2',
'c',
'w', 9, 0,
5713 'p',
'l',
'd',
'w', 9, 0,
5715 'b',
'l',
'x', 9, 0,
5716 'c',
'b',
'z', 9, 0,
5717 'c',
'b',
'n',
'z', 9, 0,
5718 's',
'r',
's',
'd',
'a', 9,
's',
'p',
'!',
',', 32, 0,
5719 's',
'r',
's',
'i',
'a', 9,
's',
'p',
'!',
',', 32, 0,
5720 's',
'r',
's',
'd',
'b', 9,
's',
'p',
'!',
',', 32, 0,
5721 's',
'r',
's',
'i',
'b', 9,
's',
'p',
'!',
',', 32, 0,
5722 's',
'r',
's',
'd',
'a', 9,
's',
'p',
',', 32, 0,
5723 's',
'r',
's',
'i',
'a', 9,
's',
'p',
',', 32, 0,
5724 's',
'r',
's',
'd',
'b', 9,
's',
'p',
',', 32, 0,
5725 's',
'r',
's',
'i',
'b', 9,
's',
'p',
',', 32, 0,
5726 'v',
'l',
'd',
'1', 0,
5727 'd',
'c',
'p',
's',
'1', 0,
5728 'v',
's',
't',
'1', 0,
5729 'v',
'r',
'e',
'v',
'3',
'2', 0,
5730 'l',
'd',
'c',
'2', 0,
5731 'm',
'r',
'c',
'2', 0,
5732 'm',
'r',
'r',
'c',
'2', 0,
5733 's',
't',
'c',
'2', 0,
5734 'v',
'l',
'd',
'2', 0,
5735 'c',
'd',
'p',
'2', 0,
5736 'm',
'c',
'r',
'2', 0,
5737 'm',
'c',
'r',
'r',
'2', 0,
5738 'd',
'c',
'p',
's',
'2', 0,
5739 'v',
's',
't',
'2', 0,
5740 'v',
'l',
'd',
'3', 0,
5741 'd',
'c',
'p',
's',
'3', 0,
5742 'v',
's',
't',
'3', 0,
5743 'v',
'r',
'e',
'v',
'6',
'4', 0,
5744 'v',
'l',
'd',
'4', 0,
5745 'v',
's',
't',
'4', 0,
5746 's',
'x',
't',
'a',
'b',
'1',
'6', 0,
5747 'u',
'x',
't',
'a',
'b',
'1',
'6', 0,
5748 's',
'x',
't',
'b',
'1',
'6', 0,
5749 'u',
'x',
't',
'b',
'1',
'6', 0,
5750 's',
'h',
's',
'u',
'b',
'1',
'6', 0,
5751 'u',
'h',
's',
'u',
'b',
'1',
'6', 0,
5752 'u',
'q',
's',
'u',
'b',
'1',
'6', 0,
5753 's',
's',
'u',
'b',
'1',
'6', 0,
5754 'u',
's',
'u',
'b',
'1',
'6', 0,
5755 's',
'h',
'a',
'd',
'd',
'1',
'6', 0,
5756 'u',
'h',
'a',
'd',
'd',
'1',
'6', 0,
5757 'u',
'q',
'a',
'd',
'd',
'1',
'6', 0,
5758 's',
'a',
'd',
'd',
'1',
'6', 0,
5759 'u',
'a',
'd',
'd',
'1',
'6', 0,
5760 's',
's',
'a',
't',
'1',
'6', 0,
5761 'u',
's',
'a',
't',
'1',
'6', 0,
5762 'v',
'r',
'e',
'v',
'1',
'6', 0,
5763 'u',
's',
'a',
'd',
'a',
'8', 0,
5764 's',
'h',
's',
'u',
'b',
'8', 0,
5765 'u',
'h',
's',
'u',
'b',
'8', 0,
5766 'u',
'q',
's',
'u',
'b',
'8', 0,
5767 's',
's',
'u',
'b',
'8', 0,
5768 'u',
's',
'u',
'b',
'8', 0,
5769 'u',
's',
'a',
'd',
'8', 0,
5770 's',
'h',
'a',
'd',
'd',
'8', 0,
5771 'u',
'h',
'a',
'd',
'd',
'8', 0,
5772 'u',
'q',
'a',
'd',
'd',
'8', 0,
5773 's',
'a',
'd',
'd',
'8', 0,
5774 'u',
'a',
'd',
'd',
'8', 0,
5775 'L',
'I',
'F',
'E',
'T',
'I',
'M',
'E',
'_',
'E',
'N',
'D', 0,
5776 'B',
'U',
'N',
'D',
'L',
'E', 0,
5777 'D',
'B',
'G',
'_',
'V',
'A',
'L',
'U',
'E', 0,
5778 'L',
'I',
'F',
'E',
'T',
'I',
'M',
'E',
'_',
'S',
'T',
'A',
'R',
'T', 0,
5779 'v',
'a',
'b',
'a', 0,
5781 'l',
'd',
'm',
'd',
'a', 0,
5782 's',
't',
'm',
'd',
'a', 0,
5783 'r',
'f',
'e',
'i',
'a', 0,
5784 'v',
'l',
'd',
'm',
'i',
'a', 0,
5785 'v',
's',
't',
'm',
'i',
'a', 0,
5786 's',
'r',
's',
'i',
'a', 0,
5787 's',
'm',
'm',
'l',
'a', 0,
5788 'v',
'n',
'm',
'l',
'a', 0,
5789 'v',
'm',
'l',
'a', 0,
5790 'v',
'f',
'm',
'a', 0,
5791 'v',
'f',
'n',
'm',
'a', 0,
5792 'v',
'r',
's',
'r',
'a', 0,
5793 'v',
's',
'r',
'a', 0,
5794 'l',
'd',
'a',
'b', 0,
5795 's',
'x',
't',
'a',
'b', 0,
5796 'u',
'x',
't',
'a',
'b', 0,
5797 's',
'm',
'l',
'a',
'b',
'b', 0,
5798 's',
'm',
'l',
'a',
'l',
'b',
'b', 0,
5799 's',
'm',
'u',
'l',
'b',
'b', 0,
5801 'r',
'f',
'e',
'd',
'b', 0,
5802 'v',
'l',
'd',
'm',
'd',
'b', 0,
5803 'v',
's',
't',
'm',
'd',
'b', 0,
5804 's',
'r',
's',
'd',
'b', 0,
5805 'l',
'd',
'm',
'i',
'b', 0,
5806 's',
't',
'm',
'i',
'b', 0,
5807 's',
't',
'l',
'b', 0,
5809 's',
'w',
'p',
'b', 0,
5810 'l',
'd',
'r',
'b', 0,
5811 's',
't',
'r',
'b', 0,
5814 'l',
'd',
'r',
's',
'b', 0,
5815 's',
'm',
'l',
'a',
't',
'b', 0,
5816 'p',
'k',
'h',
't',
'b', 0,
5817 's',
'm',
'l',
'a',
'l',
't',
'b', 0,
5818 's',
'm',
'u',
'l',
't',
'b', 0,
5819 'v',
'c',
'v',
't',
'b', 0,
5820 's',
'x',
't',
'b', 0,
5821 'u',
'x',
't',
'b', 0,
5822 'q',
'd',
's',
'u',
'b', 0,
5823 'v',
'h',
's',
'u',
'b', 0,
5824 'v',
'q',
's',
'u',
'b', 0,
5825 'v',
's',
'u',
'b', 0,
5826 's',
'm',
'l',
'a',
'w',
'b', 0,
5827 's',
'm',
'u',
'l',
'w',
'b', 0,
5828 'l',
'd',
'a',
'e',
'x',
'b', 0,
5829 's',
't',
'l',
'e',
'x',
'b', 0,
5830 'l',
'd',
'r',
'e',
'x',
'b', 0,
5831 's',
't',
'r',
'e',
'x',
'b', 0,
5836 'v',
'b',
'i',
'c', 0,
5839 'm',
'r',
'r',
'c', 0,
5843 's',
'm',
'l',
'a',
'd', 0,
5844 's',
'm',
'u',
'a',
'd', 0,
5845 'v',
'a',
'b',
'd', 0,
5846 'q',
'd',
'a',
'd',
'd', 0,
5847 'v',
'r',
'h',
'a',
'd',
'd', 0,
5848 'v',
'h',
'a',
'd',
'd', 0,
5849 'v',
'p',
'a',
'd',
'd', 0,
5850 'v',
'q',
'a',
'd',
'd', 0,
5851 'v',
'a',
'd',
'd', 0,
5852 's',
'm',
'l',
'a',
'l',
'd', 0,
5854 's',
'm',
'l',
's',
'l',
'd', 0,
5855 'v',
'a',
'n',
'd', 0,
5856 'l',
'd',
'r',
'd', 0,
5857 's',
't',
'r',
'd', 0,
5858 's',
'm',
'l',
's',
'd', 0,
5859 's',
'm',
'u',
's',
'd', 0,
5860 'l',
'd',
'a',
'e',
'x',
'd', 0,
5861 's',
't',
'l',
'e',
'x',
'd', 0,
5862 'l',
'd',
'r',
'e',
'x',
'd', 0,
5863 's',
't',
'r',
'e',
'x',
'd', 0,
5864 'v',
'a',
'c',
'g',
'e', 0,
5865 'v',
'c',
'g',
'e', 0,
5866 'v',
'c',
'l',
'e', 0,
5867 'v',
'r',
'e',
'c',
'p',
'e', 0,
5868 'v',
'c',
'm',
'p',
'e', 0,
5869 'v',
'r',
's',
'q',
'r',
't',
'e', 0,
5870 'v',
'b',
'i',
'f', 0,
5872 'v',
'q',
'n',
'e',
'g', 0,
5873 'v',
'n',
'e',
'g', 0,
5874 'l',
'd',
'a',
'h', 0,
5875 's',
'x',
't',
'a',
'h', 0,
5876 'u',
'x',
't',
'a',
'h', 0,
5878 's',
't',
'l',
'h', 0,
5879 'v',
'q',
'd',
'm',
'u',
'l',
'h', 0,
5880 'v',
'q',
'r',
'd',
'm',
'u',
'l',
'h', 0,
5881 'l',
'd',
'r',
'h', 0,
5882 's',
't',
'r',
'h', 0,
5883 'l',
'd',
'r',
's',
'h', 0,
5884 'p',
'u',
's',
'h', 0,
5885 'r',
'e',
'v',
's',
'h', 0,
5886 's',
'x',
't',
'h', 0,
5887 'u',
'x',
't',
'h', 0,
5888 'l',
'd',
'a',
'e',
'x',
'h', 0,
5889 's',
't',
'l',
'e',
'x',
'h', 0,
5890 'l',
'd',
'r',
'e',
'x',
'h', 0,
5891 's',
't',
'r',
'e',
'x',
'h', 0,
5894 'v',
's',
'l',
'i', 0,
5895 'v',
's',
'r',
'i', 0,
5897 'l',
'd',
'c',
'2',
'l', 0,
5898 's',
't',
'c',
'2',
'l', 0,
5899 'u',
'm',
'a',
'a',
'l', 0,
5900 'v',
'a',
'b',
'a',
'l', 0,
5901 'v',
'p',
'a',
'd',
'a',
'l', 0,
5902 'v',
'q',
'd',
'm',
'l',
'a',
'l', 0,
5903 's',
'm',
'l',
'a',
'l', 0,
5904 'u',
'm',
'l',
'a',
'l', 0,
5905 'v',
'm',
'l',
'a',
'l', 0,
5906 'v',
't',
'b',
'l', 0,
5907 'v',
's',
'u',
'b',
'l', 0,
5908 'l',
'd',
'c',
'l', 0,
5909 's',
't',
'c',
'l', 0,
5910 'v',
'a',
'b',
'd',
'l', 0,
5911 'v',
'p',
'a',
'd',
'd',
'l', 0,
5912 'v',
'a',
'd',
'd',
'l', 0,
5914 'v',
'q',
's',
'h',
'l', 0,
5915 'v',
'q',
'r',
's',
'h',
'l', 0,
5916 'v',
'r',
's',
'h',
'l', 0,
5917 'v',
's',
'h',
'l', 0,
5918 'v',
's',
'h',
'l',
'l', 0,
5919 'v',
'q',
'd',
'm',
'u',
'l',
'l', 0,
5920 's',
'm',
'u',
'l',
'l', 0,
5921 'u',
'm',
'u',
'l',
'l', 0,
5922 'v',
'm',
'u',
'l',
'l', 0,
5923 'v',
'b',
's',
'l', 0,
5924 'v',
'q',
'd',
'm',
'l',
's',
'l', 0,
5925 'v',
'm',
'l',
's',
'l', 0,
5927 's',
'm',
'm',
'u',
'l', 0,
5928 'v',
'n',
'm',
'u',
'l', 0,
5929 'v',
'm',
'u',
'l', 0,
5930 'v',
'm',
'o',
'v',
'l', 0,
5933 'v',
'r',
's',
'u',
'b',
'h',
'n', 0,
5934 'v',
's',
'u',
'b',
'h',
'n', 0,
5935 'v',
'r',
'a',
'd',
'd',
'h',
'n', 0,
5936 'v',
'a',
'd',
'd',
'h',
'n', 0,
5937 'v',
'p',
'm',
'i',
'n', 0,
5938 'v',
'm',
'i',
'n', 0,
5940 'v',
'q',
's',
'h',
'r',
'n', 0,
5941 'v',
'q',
'r',
's',
'h',
'r',
'n', 0,
5942 'v',
'r',
's',
'h',
'r',
'n', 0,
5943 'v',
's',
'h',
'r',
'n', 0,
5944 'v',
'o',
'r',
'n', 0,
5945 'v',
't',
'r',
'n', 0,
5946 'v',
'q',
's',
'h',
'r',
'u',
'n', 0,
5947 'v',
'q',
'r',
's',
'h',
'r',
'u',
'n', 0,
5948 'v',
'q',
'm',
'o',
'v',
'u',
'n', 0,
5949 'v',
'm',
'v',
'n', 0,
5950 'v',
'q',
'm',
'o',
'v',
'n', 0,
5951 'v',
'm',
'o',
'v',
'n', 0,
5952 't',
'r',
'a',
'p', 0,
5954 'v',
'z',
'i',
'p', 0,
5955 'v',
'c',
'm',
'p', 0,
5957 'v',
'd',
'u',
'p', 0,
5958 'v',
's',
'w',
'p', 0,
5959 'v',
'u',
'z',
'p', 0,
5960 'v',
'c',
'e',
'q', 0,
5962 's',
'm',
'm',
'l',
'a',
'r', 0,
5965 'v',
'l',
'd',
'r', 0,
5966 'v',
'r',
's',
'h',
'r', 0,
5967 'v',
's',
'h',
'r', 0,
5968 's',
'm',
'm',
'u',
'l',
'r', 0,
5969 'v',
'e',
'o',
'r', 0,
5971 'm',
'c',
'r',
'r', 0,
5972 'v',
'o',
'r',
'r', 0,
5974 's',
'm',
'm',
'l',
's',
'r', 0,
5975 'v',
'm',
's',
'r', 0,
5976 'v',
'r',
'i',
'n',
't',
'r', 0,
5977 'v',
's',
't',
'r', 0,
5978 'v',
'c',
'v',
't',
'r', 0,
5979 'v',
'q',
'a',
'b',
's', 0,
5980 'v',
'a',
'b',
's', 0,
5981 's',
'u',
'b',
's', 0,
5982 'v',
'c',
'l',
's', 0,
5983 's',
'm',
'm',
'l',
's', 0,
5984 'v',
'n',
'm',
'l',
's', 0,
5985 'v',
'm',
'l',
's', 0,
5986 'v',
'f',
'm',
's', 0,
5987 'v',
'f',
'n',
'm',
's', 0,
5988 'v',
'r',
'e',
'c',
'p',
's', 0,
5989 'v',
'm',
'r',
's', 0,
5990 'a',
's',
'r',
's', 0,
5991 'l',
's',
'r',
's', 0,
5992 'v',
'r',
's',
'q',
'r',
't',
's', 0,
5993 'm',
'o',
'v',
's', 0,
5994 's',
's',
'a',
't', 0,
5995 'u',
's',
'a',
't', 0,
5996 's',
'm',
'l',
'a',
'b',
't', 0,
5997 'p',
'k',
'h',
'b',
't', 0,
5998 's',
'm',
'l',
'a',
'l',
'b',
't', 0,
5999 's',
'm',
'u',
'l',
'b',
't', 0,
6000 'l',
'd',
'r',
'b',
't', 0,
6001 's',
't',
'r',
'b',
't', 0,
6002 'l',
'd',
'r',
's',
'b',
't', 0,
6003 'e',
'r',
'e',
't', 0,
6004 'v',
'a',
'c',
'g',
't', 0,
6005 'v',
'c',
'g',
't', 0,
6006 'l',
'd',
'r',
'h',
't', 0,
6007 's',
't',
'r',
'h',
't', 0,
6008 'l',
'd',
'r',
's',
'h',
't', 0,
6009 'r',
'b',
'i',
't', 0,
6010 'v',
'b',
'i',
't', 0,
6011 'v',
'c',
'l',
't', 0,
6012 'v',
'c',
'n',
't', 0,
6013 'h',
'i',
'n',
't', 0,
6014 'l',
'd',
'r',
't', 0,
6015 'v',
's',
'q',
'r',
't', 0,
6016 's',
't',
'r',
't', 0,
6017 'v',
't',
's',
't', 0,
6018 's',
'm',
'l',
'a',
't',
't', 0,
6019 's',
'm',
'l',
'a',
'l',
't',
't', 0,
6020 's',
'm',
'u',
'l',
't',
't', 0,
6021 'v',
'c',
'v',
't',
't', 0,
6022 'v',
'c',
'v',
't', 0,
6023 'm',
'o',
'v',
't', 0,
6024 's',
'm',
'l',
'a',
'w',
't', 0,
6025 's',
'm',
'u',
'l',
'w',
't', 0,
6026 'v',
'e',
'x',
't', 0,
6027 'v',
'q',
's',
'h',
'l',
'u', 0,
6029 's',
'd',
'i',
'v', 0,
6030 'u',
'd',
'i',
'v', 0,
6031 'v',
'd',
'i',
'v', 0,
6032 'v',
'm',
'o',
'v', 0,
6033 'v',
's',
'u',
'b',
'w', 0,
6034 'v',
'a',
'd',
'd',
'w', 0,
6035 'p',
'l',
'd',
'w', 0,
6036 'm',
'o',
'v',
'w', 0,
6037 'f',
'l',
'd',
'm',
'i',
'a',
'x', 0,
6038 'f',
's',
't',
'm',
'i',
'a',
'x', 0,
6039 'v',
'p',
'm',
'a',
'x', 0,
6040 'v',
'm',
'a',
'x', 0,
6041 's',
'h',
's',
'a',
'x', 0,
6042 'u',
'h',
's',
'a',
'x', 0,
6043 'u',
'q',
's',
'a',
'x', 0,
6044 's',
's',
'a',
'x', 0,
6045 'u',
's',
'a',
'x', 0,
6046 'f',
'l',
'd',
'm',
'd',
'b',
'x', 0,
6047 'f',
's',
't',
'm',
'd',
'b',
'x', 0,
6048 'v',
't',
'b',
'x', 0,
6049 's',
'm',
'l',
'a',
'd',
'x', 0,
6050 's',
'm',
'u',
'a',
'd',
'x', 0,
6051 's',
'm',
'l',
'a',
'l',
'd',
'x', 0,
6052 's',
'm',
'l',
's',
'l',
'd',
'x', 0,
6053 's',
'm',
'l',
's',
'd',
'x', 0,
6054 's',
'm',
'u',
's',
'd',
'x', 0,
6055 'l',
'd',
'a',
'e',
'x', 0,
6056 's',
't',
'l',
'e',
'x', 0,
6057 'l',
'd',
'r',
'e',
'x', 0,
6058 'c',
'l',
'r',
'e',
'x', 0,
6059 's',
't',
'r',
'e',
'x', 0,
6060 's',
'b',
'f',
'x', 0,
6061 'u',
'b',
'f',
'x', 0,
6064 's',
'h',
'a',
's',
'x', 0,
6065 'u',
'h',
'a',
's',
'x', 0,
6066 'u',
'q',
'a',
's',
'x', 0,
6067 's',
'a',
's',
'x', 0,
6068 'u',
'a',
's',
'x', 0,
6069 'v',
'r',
'i',
'n',
't',
'x', 0,
6070 'v',
'c',
'l',
'z', 0,
6071 'v',
'r',
'i',
'n',
't',
'z', 0,
6079 uint64_t Bits = (Bits2 << 32) | Bits1;
6081 #ifndef CAPSTONE_DIET
6088 switch ((Bits >> 12) & 31) {
6096 printSBitModifierOperand(MI, 5,
O);
6097 printPredicateOperand(MI, 3,
O);
6101 printSBitModifierOperand(MI, 6,
O);
6102 printPredicateOperand(MI, 4,
O);
6106 printSBitModifierOperand(MI, 7,
O);
6107 printPredicateOperand(MI, 5,
O);
6109 printOperand(MI, 0,
O);
6111 printOperand(MI, 1,
O);
6113 printSORegRegOperand(MI, 2,
O);
6118 printPredicateOperand(MI, 2,
O);
6122 printOperand(MI, 0,
O);
6126 printPredicateOperand(MI, 3,
O);
6130 printPredicateOperand(MI, 4,
O);
6134 printPredicateOperand(MI, 1,
O);
6138 printPredicateOperand(MI, 0,
O);
6142 printPredicateOperand(MI, 6,
O);
6146 printPImmediate(MI, 0,
O);
6151 printCPSIMod(MI, 0,
O);
6155 printMemBOption(MI, 0,
O);
6160 printInstSyncBOption(MI, 0,
O);
6165 printThumbITMask(MI, 1,
O);
6169 printPredicateOperand(MI, 5,
O);
6173 printSBitModifierOperand(MI, 4,
O);
6174 printPredicateOperand(MI, 2,
O);
6178 printPImmediate(MI, 1,
O);
6180 printOperand(MI, 2,
O);
6182 printOperand(MI, 0,
O);
6184 printCImmediate(MI, 3,
O);
6186 printCImmediate(MI, 4,
O);
6188 printOperand(MI, 5,
O);
6193 printAddrModeImm12Operand(MI, 0,
O,
false);
6198 printAddrMode2Operand(MI, 0,
O);
6203 printSetendOperand(MI, 0,
O);
6208 printSBitModifierOperand(MI, 8,
O);
6209 printPredicateOperand(MI, 6,
O);
6211 printOperand(MI, 0,
O);
6213 printOperand(MI, 1,
O);
6215 printOperand(MI, 2,
O);
6217 printOperand(MI, 3,
O);
6222 printPredicateOperand(MI, 7,
O);
6226 printPredicateOperand(MI, 9,
O);
6230 printPredicateOperand(MI, 11,
O);
6234 printPredicateOperand(MI, 8,
O);
6238 printPredicateOperand(MI, 13,
O);
6242 printSBitModifierOperand(MI, 1,
O);
6249 switch ((Bits >> 17) & 127) {
6275 printOperand(MI, 1,
O);
6282 printOperand(MI, 0,
O);
6288 printOperand(MI, 0,
O);
6299 printCImmediate(MI, 1,
O);
6318 printOperand(MI, 0,
O);
6325 printOperand(MI, 0,
O);
6332 printOperand(MI, 0,
O);
6339 printOperand(MI, 0,
O);
6346 printOperand(MI, 0,
O);
6353 printOperand(MI, 0,
O);
6360 printOperand(MI, 0,
O);
6367 printOperand(MI, 0,
O);
6374 printOperand(MI, 0,
O);
6381 printOperand(MI, 0,
O);
6393 printOperand(MI, 0,
O);
6395 printOperand(MI, 1,
O);
6402 printOperand(MI, 0,
O);
6404 printOperand(MI, 1,
O);
6411 printOperand(MI, 0,
O);
6413 printOperand(MI, 1,
O);
6420 printOperand(MI, 0,
O);
6422 printOperand(MI, 1,
O);
6429 printOperand(MI, 0,
O);
6431 printOperand(MI, 1,
O);
6438 printOperand(MI, 0,
O);
6440 printOperand(MI, 1,
O);
6447 printOperand(MI, 0,
O);
6449 printOperand(MI, 1,
O);
6455 printOperand(MI, 0,
O);
6457 printOperand(MI, 1,
O);
6463 printOperand(MI, 0,
O);
6465 printOperand(MI, 1,
O);
6471 printOperand(MI, 0,
O);
6473 printOperand(MI, 1,
O);
6509 printOperand(MI, 0,
O);
6516 printOperand(MI, 0,
O);
6523 printOperand(MI, 0,
O);
6530 printOperand(MI, 0,
O);
6537 printOperand(MI, 0,
O);
6544 printOperand(MI, 0,
O);
6546 printOperand(MI, 1,
O);
6548 printOperand(MI, 2,
O);
6555 printOperand(MI, 0,
O);
6562 printOperand(MI, 0,
O);
6569 printOperand(MI, 0,
O);
6571 printOperand(MI, 1,
O);
6573 printFBits16(MI, 2,
O);
6580 printOperand(MI, 0,
O);
6582 printOperand(MI, 1,
O);
6584 printFBits16(MI, 2,
O);
6591 printOperand(MI, 0,
O);
6593 printOperand(MI, 1,
O);
6599 printOperand(MI, 0,
O);
6601 printOperand(MI, 1,
O);
6603 printFBits16(MI, 2,
O);
6610 printOperand(MI, 0,
O);
6612 printOperand(MI, 1,
O);
6614 printFBits16(MI, 2,
O);
6621 printOperand(MI, 0,
O);
6623 printOperand(MI, 1,
O);
6629 printOperand(MI, 0,
O);
6631 printOperand(MI, 1,
O);
6633 printFBits16(MI, 2,
O);
6640 printOperand(MI, 0,
O);
6642 printOperand(MI, 1,
O);
6644 printFBits16(MI, 2,
O);
6651 printOperand(MI, 0,
O);
6653 printOperand(MI, 1,
O);
6659 printOperand(MI, 0,
O);
6661 printOperand(MI, 1,
O);
6663 printFBits16(MI, 2,
O);
6670 printOperand(MI, 0,
O);
6672 printOperand(MI, 1,
O);
6674 printFBits16(MI, 2,
O);
6681 printOperand(MI, 0,
O);
6683 printOperand(MI, 1,
O);
6693 printOperand(MI, 0,
O);
6700 printOperand(MI, 0,
O);
6708 printOperand(MI, 0,
O);
6713 printPredicateOperand(MI, 4,
O);
6715 printOperand(MI, 0,
O);
6720 printPredicateOperand(MI, 3,
O);
6722 printOperand(MI, 0,
O);
6724 printOperand(MI, 2,
O);
6731 switch ((Bits >> 24) & 63) {
6735 printOperand(MI, 0,
O);
6739 printOperand(MI, 2,
O);
6743 printOperand(MI, 1,
O);
6747 printPImmediate(MI, 0,
O);
6752 printCImmediate(MI, 2,
O);
6754 printCImmediate(MI, 3,
O);
6756 printCImmediate(MI, 4,
O);
6758 printOperand(MI, 5,
O);
6763 printCPSIFlag(MI, 1,
O);
6771 printMandatoryPredicateOperand(MI, 0,
O);
6776 printGPRPairOperand(MI, 0,
O, MRI);
6778 printAddrMode7Operand(MI, 1,
O);
6783 printAddrMode5Operand(MI, 2,
O,
false);
6788 printAddrMode7Operand(MI, 2,
O);
6793 printAddrMode5Operand(MI, 2,
O,
true);
6799 printPImmediate(MI, 1,
O);
6801 printOperand(MI, 2,
O);
6803 printOperand(MI, 0,
O);
6805 printCImmediate(MI, 3,
O);
6807 printCImmediate(MI, 4,
O);
6809 printOperand(MI, 5,
O);
6814 printMSRMaskOperand(MI, 0,
O);
6819 printBankedRegOperand(MI, 0,
O);
6821 printOperand(MI, 1,
O);
6826 printNEONModImmOperand(MI, 1,
O);
6841 printVectorListOneAllLanes(MI, 0,
O);
6846 printVectorListTwoAllLanes(MI, 0,
O, MRI);
6851 printVectorListOne(MI, 0,
O);
6856 printVectorListFour(MI, 0,
O);
6861 printVectorListThree(MI, 0,
O);
6866 printVectorListTwo(MI, 0,
O, MRI);
6871 printVectorListTwoSpacedAllLanes(MI, 0,
O, MRI);
6876 printVectorListTwoSpaced(MI, 0,
O, MRI);
6881 printVectorListThreeAllLanes(MI, 0,
O);
6883 printAddrMode6Operand(MI, 1,
O);
6887 printVectorListThreeSpacedAllLanes(MI, 0,
O);
6889 printAddrMode6Operand(MI, 1,
O);
6893 printVectorListThreeSpaced(MI, 0,
O);
6895 printAddrMode6Operand(MI, 1,
O);
6899 printVectorListFourAllLanes(MI, 0,
O);
6901 printAddrMode6Operand(MI, 1,
O);
6905 printVectorListFourSpacedAllLanes(MI, 0,
O);
6907 printAddrMode6Operand(MI, 1,
O);
6911 printVectorListFourSpaced(MI, 0,
O);
6913 printAddrMode6Operand(MI, 1,
O);
6917 printOperand(MI, 4,
O);
6921 printVectorListOne(MI, 2,
O);
6923 printAddrMode6Operand(MI, 0,
O);
6928 printVectorListFour(MI, 2,
O);
6930 printAddrMode6Operand(MI, 0,
O);
6935 printVectorListFour(MI, 3,
O);
6937 printAddrMode6Operand(MI, 1,
O);
6943 printVectorListFour(MI, 4,
O);
6945 printAddrMode6Operand(MI, 1,
O);
6947 printOperand(MI, 3,
O);
6952 printVectorListThree(MI, 2,
O);
6954 printAddrMode6Operand(MI, 0,
O);
6959 printVectorListThree(MI, 3,
O);
6961 printAddrMode6Operand(MI, 1,
O);
6967 printVectorListThree(MI, 4,
O);
6969 printAddrMode6Operand(MI, 1,
O);
6971 printOperand(MI, 3,
O);
6976 printVectorListOne(MI, 3,
O);
6978 printAddrMode6Operand(MI, 1,
O);
6984 printVectorListOne(MI, 4,
O);
6986 printAddrMode6Operand(MI, 1,
O);
6988 printOperand(MI, 3,
O);
6993 printVectorListTwo(MI, 2,
O, MRI);
6995 printAddrMode6Operand(MI, 0,
O);
7000 printVectorListTwo(MI, 3,
O, MRI);
7002 printAddrMode6Operand(MI, 1,
O);
7008 printVectorListTwo(MI, 4,
O, MRI);
7010 printAddrMode6Operand(MI, 1,
O);
7012 printOperand(MI, 3,
O);
7017 printVectorListTwoSpaced(MI, 2,
O, MRI);
7019 printAddrMode6Operand(MI, 0,
O);
7024 printVectorListTwoSpaced(MI, 3,
O, MRI);
7026 printAddrMode6Operand(MI, 1,
O);
7032 printVectorListTwoSpaced(MI, 4,
O, MRI);
7034 printAddrMode6Operand(MI, 1,
O);
7036 printOperand(MI, 3,
O);
7041 printMemBOption(MI, 0,
O);
7046 printInstSyncBOption(MI, 0,
O);
7051 printAddrModeImm12Operand(MI, 0,
O,
false);
7056 printT2AddrModeImm8Operand(MI, 0,
O,
false);
7061 printT2AddrModeSoRegOperand(MI, 0,
O);
7066 printThumbLdrLabelOperand(MI, 0,
O);
7071 printAddrModeTBB(MI, 0,
O);
7076 printAddrModeTBH(MI, 0,
O);
7081 printOperand(MI, 3,
O);
7086 printRegisterList(MI, 2,
O);
7094 switch ((Bits >> 30) & 31) {
7106 printOperand(MI, 1,
O);
7110 printFPImmOperand(MI, 1,
O);
7116 printRegisterList(MI, 4,
O);
7120 printCoprocOptionImm(MI, 3,
O);
7125 printPostIdxImm8s4Operand(MI, 3,
O);
7130 printCImmediate(MI, 1,
O);
7147 printModImmOperand(MI, 1,
O);
7158 printOperand(MI, 2,
O);
7162 printVectorIndex(MI, 2,
O);
7167 printAddrMode6Operand(MI, 1,
O);
7171 printAddrMode6Operand(MI, 2,
O);
7176 set_mem_access(MI,
true);
7181 printOperand(MI, 1,
O);
7183 printOperand(MI, 2,
O);
7240 printVectorIndex(MI, 3,
O);
7242 printOperand(MI, 2,
O);
7247 printFBits32(MI, 2,
O);
7255 switch ((Bits >> 35) & 63) {
7259 printOperand(MI, 1,
O);
7263 printAdrLabelOperand(MI, 1,
O, 0);
7268 printBitfieldInvMaskImmOperand(MI, 2,
O);
7273 printOperand(MI, 2,
O);
7281 printModImmOperand(MI, 1,
O);
7286 printSORegImmOperand(MI, 1,
O);
7291 printSORegRegOperand(MI, 1,
O);
7300 printRegisterList(MI, 3,
O);
7304 printAddrMode7Operand(MI, 1,
O);
7309 printAddrMode5Operand(MI, 2,
O,
false);
7314 printAddrMode7Operand(MI, 2,
O);
7318 printAddrMode5Operand(MI, 2,
O,
true);
7324 printAddrModeImm12Operand(MI, 2,
O,
true);
7330 printAddrMode2Operand(MI, 2,
O);
7336 printAddrModeImm12Operand(MI, 1,
O,
false);
7341 printAddrMode2Operand(MI, 1,
O);
7346 printAddrMode3Operand(MI, 1,
O,
false);
7351 printAddrMode3Operand(MI, 2,
O,
true);
7357 printCImmediate(MI, 3,
O);
7359 printCImmediate(MI, 4,
O);
7361 printOperand(MI, 5,
O);
7366 printOperand(MI, 3,
O);
7370 printBankedRegOperand(MI, 1,
O);
7375 printImmPlusOneOperand(MI, 1,
O);
7377 printOperand(MI, 2,
O);
7381 printGPRPairOperand(MI, 1,
O, MRI);
7383 printAddrMode7Operand(MI, 2,
O);
7399 printNoHashImmediate(MI, 4,
O);
7403 printNoHashImmediate(MI, 6,
O);
7407 printAddrMode6Operand(MI, 2,
O);
7411 printNoHashImmediate(MI, 8,
O);
7413 set_mem_access(MI,
false);
7421 printNoHashImmediate(MI, 10,
O);
7423 set_mem_access(MI,
false);
7424 printOperand(MI, 1,
O);
7426 set_mem_access(MI,
true);
7427 printNoHashImmediate(MI, 10,
O);
7429 set_mem_access(MI,
false);
7430 printOperand(MI, 2,
O);
7432 set_mem_access(MI,
true);
7433 printNoHashImmediate(MI, 10,
O);
7438 printOperand(MI, 3,
O);
7443 printNoHashImmediate(MI, 12,
O);
7445 set_mem_access(MI,
false);
7446 printOperand(MI, 1,
O);
7448 set_mem_access(MI,
true);
7449 printNoHashImmediate(MI, 12,
O);
7451 set_mem_access(MI,
false);
7452 printOperand(MI, 2,
O);
7454 set_mem_access(MI,
true);
7455 printNoHashImmediate(MI, 12,
O);
7457 set_mem_access(MI,
false);
7458 printOperand(MI, 3,
O);
7460 set_mem_access(MI,
true);
7461 printNoHashImmediate(MI, 12,
O);
7463 set_mem_access(MI,
false);
7464 printAddrMode6Operand(MI, 5,
O);
7465 printAddrMode6OffsetOperand(MI, 7,
O);
7470 printAddrMode5Operand(MI, 1,
O,
false);
7475 printNoHashImmediate(MI, 3,
O);
7477 set_mem_access(MI,
false);
7478 printAddrMode6Operand(MI, 0,
O);
7483 printNoHashImmediate(MI, 5,
O);
7487 printNoHashImmediate(MI, 7,
O);
7489 set_mem_access(MI,
false);
7490 printOperand(MI, 5,
O);
7492 set_mem_access(MI,
true);
7493 printNoHashImmediate(MI, 7,
O);
7495 set_mem_access(MI,
false);
7496 printOperand(MI, 6,
O);
7498 set_mem_access(MI,
true);
7499 printNoHashImmediate(MI, 7,
O);
7501 set_mem_access(MI,
false);
7502 printAddrMode6Operand(MI, 1,
O);
7503 printAddrMode6OffsetOperand(MI, 3,
O);
7508 printOperand(MI, 5,
O);
7510 printOperand(MI, 6,
O);
7514 printVectorListOne(MI, 1,
O);
7516 printOperand(MI, 2,
O);
7521 printVectorListTwo(MI, 1,
O, MRI);
7523 printOperand(MI, 2,
O);
7528 printVectorListThree(MI, 1,
O);
7530 printOperand(MI, 2,
O);
7535 printVectorListFour(MI, 1,
O);
7537 printOperand(MI, 2,
O);
7542 printVectorListOne(MI, 2,
O);
7544 printOperand(MI, 3,
O);
7549 printVectorListTwo(MI, 2,
O, MRI);
7551 printOperand(MI, 3,
O);
7556 printVectorListThree(MI, 2,
O);
7558 printOperand(MI, 3,
O);
7563 printVectorListFour(MI, 2,
O);
7565 printOperand(MI, 3,
O);
7576 printT2SOOperand(MI, 1,
O);
7581 printT2AddrModeImm8Operand(MI, 1,
O,
false);
7586 printT2AddrModeImm8Operand(MI, 2,
O,
true);
7592 printThumbLdrLabelOperand(MI, 1,
O);
7597 printT2AddrModeSoRegOperand(MI, 1,
O);
7602 printT2AddrModeImm0_1020s4Operand(MI, 1,
O);
7607 printMSRMaskOperand(MI, 1,
O);
7612 printThumbS4ImmOperand(MI, 2,
O);
7617 printAdrLabelOperand(MI, 1,
O, 2);
7622 printThumbSRImm(MI, 3,
O);
7627 printThumbAddrModeImm5S1Operand(MI, 1,
O);
7632 printThumbAddrModeRROperand(MI, 1,
O);
7637 printThumbAddrModeImm5S2Operand(MI, 1,
O);
7642 printThumbAddrModeImm5S4Operand(MI, 1,
O);
7647 printThumbAddrModeSPOperand(MI, 1,
O);
7655 switch ((Bits >> 41) & 31) {
7663 printCImmediate(MI, 2,
O);
7665 printCImmediate(MI, 3,
O);
7667 printCImmediate(MI, 4,
O);
7669 printOperand(MI, 5,
O);
7678 printOperand(MI, 2,
O);
7682 printShiftImmOperand(MI, 3,
O);
7687 printRotImmOperand(MI, 2,
O);
7692 printVectorIndex(MI, 2,
O);
7697 printOperand(MI, 3,
O);
7701 printOperand(MI, 4,
O);
7707 set_mem_access(MI,
false);
7717 set_mem_access(MI,
false);
7721 printOperand(MI, 1,
O);
7723 set_mem_access(MI,
true);
7724 printNoHashImmediate(MI, 8,
O);
7728 printAddrMode6Operand(MI, 3,
O);
7733 printAddrMode6Operand(MI, 4,
O);
7737 printAddrMode6Operand(MI, 5,
O);
7738 printAddrMode6OffsetOperand(MI, 7,
O);
7743 printVectorIndex(MI, 4,
O);
7748 printVectorIndex(MI, 3,
O);
7754 printAddrMode6Operand(MI, 1,
O);
7755 printAddrMode6OffsetOperand(MI, 3,
O);
7760 printOperand(MI, 5,
O);
7762 set_mem_access(MI,
true);
7763 printNoHashImmediate(MI, 8,
O);
7765 set_mem_access(MI,
false);
7766 printOperand(MI, 6,
O);
7768 set_mem_access(MI,
true);
7769 printNoHashImmediate(MI, 8,
O);
7771 set_mem_access(MI,
false);
7772 printOperand(MI, 7,
O);
7774 set_mem_access(MI,
true);
7775 printNoHashImmediate(MI, 8,
O);
7777 set_mem_access(MI,
false);
7778 printAddrMode6Operand(MI, 1,
O);
7779 printAddrMode6OffsetOperand(MI, 3,
O);
7790 printT2AddrModeImm8OffsetOperand(MI, 3,
O);
7804 switch ((Bits >> 46) & 63) {
7808 printModImmOperand(MI, 2,
O);
7813 printOperand(MI, 2,
O);
7817 printSORegImmOperand(MI, 2,
O);
7822 printBitfieldInvMaskImmOperand(MI, 3,
O);
7827 printCoprocOptionImm(MI, 3,
O);
7832 printPostIdxImm8s4Operand(MI, 3,
O);
7837 printAddrMode2OffsetOperand(MI, 3,
O);
7842 printAddrMode3Operand(MI, 2,
O,
false);
7847 printAddrMode7Operand(MI, 3,
O);
7851 printAddrMode3Operand(MI, 3,
O,
true);
7857 printPostIdxImm8Operand(MI, 3,
O);
7862 printPostIdxRegOperand(MI, 3,
O);
7867 printAddrMode3OffsetOperand(MI, 3,
O);
7876 printCImmediate(MI, 4,
O);
7881 printAddrMode7Operand(MI, 2,
O);
7890 printOperand(MI, 3,
O);
7894 printAddrMode6Operand(MI, 1,
O);
7898 printAddrMode6Operand(MI, 2,
O);
7899 printAddrMode6OffsetOperand(MI, 4,
O);
7904 printOperand(MI, 4,
O);
7908 printOperand(MI, 1,
O);
7910 set_mem_access(MI,
true);
7911 printNoHashImmediate(MI, 6,
O);
7913 set_mem_access(MI,
false);
7914 printAddrMode6Operand(MI, 2,
O);
7920 set_mem_access(MI,
false);
7921 printAddrMode6Operand(MI, 3,
O);
7922 printAddrMode6OffsetOperand(MI, 5,
O);
7927 printAddrMode6OffsetOperand(MI, 6,
O);
7933 set_mem_access(MI,
false);
7934 printOperand(MI, 2,
O);
7936 set_mem_access(MI,
true);
7937 printNoHashImmediate(MI, 8,
O);
7939 set_mem_access(MI,
false);
7940 printAddrMode6Operand(MI, 3,
O);
7945 printAddrMode6Operand(MI, 4,
O);
7946 printAddrMode6OffsetOperand(MI, 6,
O);
7951 printVectorIndex(MI, 4,
O);
7956 printVectorIndex(MI, 3,
O);
7961 printOperand(MI, 5,
O);
7963 set_mem_access(MI,
true);
7964 printNoHashImmediate(MI, 6,
O);
7966 set_mem_access(MI,
false);
7967 printAddrMode6Operand(MI, 1,
O);
7968 printAddrMode6OffsetOperand(MI, 3,
O);
7973 printOperand(MI, 7,
O);
7975 printAddrMode6Operand(MI, 1,
O);
7976 printAddrMode6OffsetOperand(MI, 3,
O);
7981 printT2SOOperand(MI, 2,
O);
7986 printThumbSRImm(MI, 2,
O);
7991 printT2AddrModeImm8s4Operand(MI, 3,
O,
true);
7997 printT2AddrModeImm8s4Operand(MI, 2,
O,
false);
8002 printT2AddrModeImm0_1020s4Operand(MI, 2,
O);
8007 printThumbS4ImmOperand(MI, 2,
O);
8015 switch ((Bits >> 52) & 15) {
8027 printCImmediate(MI, 3,
O);
8029 printCImmediate(MI, 4,
O);
8031 printOperand(MI, 5,
O);
8036 printOperand(MI, 3,
O);
8038 printCImmediate(MI, 4,
O);
8043 printPKHLSLShiftImm(MI, 3,
O);
8048 printPKHASRShiftImm(MI, 3,
O);
8053 printRotImmOperand(MI, 3,
O);
8058 printShiftImmOperand(MI, 3,
O);
8068 set_mem_access(MI,
true);
8072 printAddrMode6OffsetOperand(MI, 3,
O);
8077 printT2AddrModeImm8s4OffsetOperand(MI, 4,
O);
8085 switch ((Bits >> 56) & 15) {
8089 printAddrMode3OffsetOperand(MI, 4,
O);
8094 printOperand(MI, 3,
O);
8098 printImmPlusOneOperand(MI, 3,
O);
8103 printAddrMode6Operand(MI, 3,
O);
8108 printAddrMode6Operand(MI, 4,
O);
8109 printAddrMode6OffsetOperand(MI, 6,
O);
8114 printNoHashImmediate(MI, 10,
O);
8116 set_mem_access(MI,
false);
8117 printAddrMode6Operand(MI, 4,
O);
8122 printNoHashImmediate(MI, 4,
O);
8124 set_mem_access(MI,
false);
8125 printAddrMode6Operand(MI, 0,
O);
8130 printNoHashImmediate(MI, 5,
O);
8132 set_mem_access(MI,
false);
8133 printOperand(MI, 4,
O);
8135 set_mem_access(MI,
true);
8136 printNoHashImmediate(MI, 5,
O);
8138 set_mem_access(MI,
false);
8139 printAddrMode6Operand(MI, 0,
O);
8144 printAddrMode6Operand(MI, 0,
O);
8149 printNoHashImmediate(MI, 6,
O);
8151 set_mem_access(MI,
false);
8152 printOperand(MI, 4,
O);
8154 set_mem_access(MI,
true);
8155 printNoHashImmediate(MI, 6,
O);
8157 set_mem_access(MI,
false);
8158 printOperand(MI, 5,
O);
8160 set_mem_access(MI,
true);
8161 printNoHashImmediate(MI, 6,
O);
8163 set_mem_access(MI,
false);
8164 printAddrMode6Operand(MI, 0,
O);
8169 printOperand(MI, 5,
O);
8171 printAddrMode6Operand(MI, 0,
O);
8176 printOperand(MI, 2,
O);
8181 printAddrMode7Operand(MI, 3,
O);
8189 if ((Bits >> 60) & 1) {
8200 if ((Bits >> 61) & 1) {
8202 printAddrMode6Operand(MI, 5,
O);
8203 printAddrMode6OffsetOperand(MI, 7,
O);
8207 printAddrMode6Operand(MI, 4,
O);
8216 static const char *getRegisterName(
unsigned RegNo)
8220 #ifndef CAPSTONE_DIET
8221 static const char AsmStrs[] = {
8222 'D',
'4',
'_',
'D',
'6',
'_',
'D',
'8',
'_',
'D',
'1',
'0', 0,
8223 'D',
'7',
'_',
'D',
'8',
'_',
'D',
'9',
'_',
'D',
'1',
'0', 0,
8224 'Q',
'7',
'_',
'Q',
'8',
'_',
'Q',
'9',
'_',
'Q',
'1',
'0', 0,
8228 'D',
'1',
'4',
'_',
'D',
'1',
'6',
'_',
'D',
'1',
'8',
'_',
'D',
'2',
'0', 0,
8229 'D',
'1',
'7',
'_',
'D',
'1',
'8',
'_',
'D',
'1',
'9',
'_',
'D',
'2',
'0', 0,
8232 'D',
'2',
'4',
'_',
'D',
'2',
'6',
'_',
'D',
'2',
'8',
'_',
'D',
'3',
'0', 0,
8233 'D',
'2',
'7',
'_',
'D',
'2',
'8',
'_',
'D',
'2',
'9',
'_',
'D',
'3',
'0', 0,
8238 'm',
'v',
'f',
'r',
'0', 0,
8240 'D',
'9',
'_',
'D',
'1',
'0',
'_',
'D',
'1',
'1', 0,
8241 'D',
'5',
'_',
'D',
'7',
'_',
'D',
'9',
'_',
'D',
'1',
'1', 0,
8242 'Q',
'8',
'_',
'Q',
'9',
'_',
'Q',
'1',
'0',
'_',
'Q',
'1',
'1', 0,
8243 'R',
'1',
'0',
'_',
'R',
'1',
'1', 0,
8247 'D',
'1',
'9',
'_',
'D',
'2',
'0',
'_',
'D',
'2',
'1', 0,
8248 'D',
'1',
'5',
'_',
'D',
'1',
'7',
'_',
'D',
'1',
'9',
'_',
'D',
'2',
'1', 0,
8251 'D',
'2',
'9',
'_',
'D',
'3',
'0',
'_',
'D',
'3',
'1', 0,
8252 'D',
'2',
'5',
'_',
'D',
'2',
'7',
'_',
'D',
'2',
'9',
'_',
'D',
'3',
'1', 0,
8255 'Q',
'0',
'_',
'Q',
'1', 0,
8256 'R',
'0',
'_',
'R',
'1', 0,
8259 'm',
'v',
'f',
'r',
'1', 0,
8261 'D',
'6',
'_',
'D',
'8',
'_',
'D',
'1',
'0',
'_',
'D',
'1',
'2', 0,
8262 'D',
'9',
'_',
'D',
'1',
'0',
'_',
'D',
'1',
'1',
'_',
'D',
'1',
'2', 0,
8263 'Q',
'9',
'_',
'Q',
'1',
'0',
'_',
'Q',
'1',
'1',
'_',
'Q',
'1',
'2', 0,
8267 'D',
'1',
'6',
'_',
'D',
'1',
'8',
'_',
'D',
'2',
'0',
'_',
'D',
'2',
'2', 0,
8268 'D',
'1',
'9',
'_',
'D',
'2',
'0',
'_',
'D',
'2',
'1',
'_',
'D',
'2',
'2', 0,
8271 'D',
'0',
'_',
'D',
'2', 0,
8272 'D',
'0',
'_',
'D',
'1',
'_',
'D',
'2', 0,
8273 'Q',
'1',
'_',
'Q',
'2', 0,
8276 'm',
'v',
'f',
'r',
'2', 0,
8278 'f',
'p',
'i',
'n',
's',
't',
'2', 0,
8279 'D',
'7',
'_',
'D',
'9',
'_',
'D',
'1',
'1',
'_',
'D',
'1',
'3', 0,
8280 'D',
'1',
'1',
'_',
'D',
'1',
'2',
'_',
'D',
'1',
'3', 0,
8281 'Q',
'1',
'0',
'_',
'Q',
'1',
'1',
'_',
'Q',
'1',
'2',
'_',
'Q',
'1',
'3', 0,
8285 'D',
'1',
'7',
'_',
'D',
'1',
'9',
'_',
'D',
'2',
'1',
'_',
'D',
'2',
'3', 0,
8286 'D',
'2',
'1',
'_',
'D',
'2',
'2',
'_',
'D',
'2',
'3', 0,
8289 'D',
'1',
'_',
'D',
'3', 0,
8290 'D',
'1',
'_',
'D',
'2',
'_',
'D',
'3', 0,
8291 'Q',
'0',
'_',
'Q',
'1',
'_',
'Q',
'2',
'_',
'Q',
'3', 0,
8292 'R',
'2',
'_',
'R',
'3', 0,
8297 'D',
'8',
'_',
'D',
'1',
'0',
'_',
'D',
'1',
'2',
'_',
'D',
'1',
'4', 0,
8298 'D',
'1',
'1',
'_',
'D',
'1',
'2',
'_',
'D',
'1',
'3',
'_',
'D',
'1',
'4', 0,
8299 'Q',
'1',
'1',
'_',
'Q',
'1',
'2',
'_',
'Q',
'1',
'3',
'_',
'Q',
'1',
'4', 0,
8303 'D',
'1',
'8',
'_',
'D',
'2',
'0',
'_',
'D',
'2',
'2',
'_',
'D',
'2',
'4', 0,
8304 'D',
'2',
'1',
'_',
'D',
'2',
'2',
'_',
'D',
'2',
'3',
'_',
'D',
'2',
'4', 0,
8307 'D',
'0',
'_',
'D',
'2',
'_',
'D',
'4', 0,
8308 'D',
'1',
'_',
'D',
'2',
'_',
'D',
'3',
'_',
'D',
'4', 0,
8309 'Q',
'1',
'_',
'Q',
'2',
'_',
'Q',
'3',
'_',
'Q',
'4', 0,
8314 'D',
'9',
'_',
'D',
'1',
'1',
'_',
'D',
'1',
'3',
'_',
'D',
'1',
'5', 0,
8315 'D',
'1',
'3',
'_',
'D',
'1',
'4',
'_',
'D',
'1',
'5', 0,
8316 'Q',
'1',
'2',
'_',
'Q',
'1',
'3',
'_',
'Q',
'1',
'4',
'_',
'Q',
'1',
'5', 0,
8320 'D',
'1',
'9',
'_',
'D',
'2',
'1',
'_',
'D',
'2',
'3',
'_',
'D',
'2',
'5', 0,
8321 'D',
'2',
'3',
'_',
'D',
'2',
'4',
'_',
'D',
'2',
'5', 0,
8324 'D',
'1',
'_',
'D',
'3',
'_',
'D',
'5', 0,
8325 'D',
'3',
'_',
'D',
'4',
'_',
'D',
'5', 0,
8326 'Q',
'2',
'_',
'Q',
'3',
'_',
'Q',
'4',
'_',
'Q',
'5', 0,
8327 'R',
'4',
'_',
'R',
'5', 0,
8332 'D',
'1',
'0',
'_',
'D',
'1',
'2',
'_',
'D',
'1',
'4',
'_',
'D',
'1',
'6', 0,
8333 'D',
'1',
'3',
'_',
'D',
'1',
'4',
'_',
'D',
'1',
'5',
'_',
'D',
'1',
'6', 0,
8336 'D',
'2',
'0',
'_',
'D',
'2',
'2',
'_',
'D',
'2',
'4',
'_',
'D',
'2',
'6', 0,
8337 'D',
'2',
'3',
'_',
'D',
'2',
'4',
'_',
'D',
'2',
'5',
'_',
'D',
'2',
'6', 0,
8340 'D',
'0',
'_',
'D',
'2',
'_',
'D',
'4',
'_',
'D',
'6', 0,
8341 'D',
'3',
'_',
'D',
'4',
'_',
'D',
'5',
'_',
'D',
'6', 0,
8342 'Q',
'3',
'_',
'Q',
'4',
'_',
'Q',
'5',
'_',
'Q',
'6', 0,
8347 'D',
'1',
'1',
'_',
'D',
'1',
'3',
'_',
'D',
'1',
'5',
'_',
'D',
'1',
'7', 0,
8348 'D',
'1',
'5',
'_',
'D',
'1',
'6',
'_',
'D',
'1',
'7', 0,
8351 'D',
'2',
'1',
'_',
'D',
'2',
'3',
'_',
'D',
'2',
'5',
'_',
'D',
'2',
'7', 0,
8352 'D',
'2',
'5',
'_',
'D',
'2',
'6',
'_',
'D',
'2',
'7', 0,
8355 'D',
'1',
'_',
'D',
'3',
'_',
'D',
'5',
'_',
'D',
'7', 0,
8356 'D',
'5',
'_',
'D',
'6',
'_',
'D',
'7', 0,
8357 'Q',
'4',
'_',
'Q',
'5',
'_',
'Q',
'6',
'_',
'Q',
'7', 0,
8358 'R',
'6',
'_',
'R',
'7', 0,
8363 'D',
'1',
'2',
'_',
'D',
'1',
'4',
'_',
'D',
'1',
'6',
'_',
'D',
'1',
'8', 0,
8364 'D',
'1',
'5',
'_',
'D',
'1',
'6',
'_',
'D',
'1',
'7',
'_',
'D',
'1',
'8', 0,
8367 'D',
'2',
'2',
'_',
'D',
'2',
'4',
'_',
'D',
'2',
'6',
'_',
'D',
'2',
'8', 0,
8368 'D',
'2',
'5',
'_',
'D',
'2',
'6',
'_',
'D',
'2',
'7',
'_',
'D',
'2',
'8', 0,
8371 'D',
'2',
'_',
'D',
'4',
'_',
'D',
'6',
'_',
'D',
'8', 0,
8372 'D',
'5',
'_',
'D',
'6',
'_',
'D',
'7',
'_',
'D',
'8', 0,
8373 'Q',
'5',
'_',
'Q',
'6',
'_',
'Q',
'7',
'_',
'Q',
'8', 0,
8378 'D',
'1',
'3',
'_',
'D',
'1',
'5',
'_',
'D',
'1',
'7',
'_',
'D',
'1',
'9', 0,
8379 'D',
'1',
'7',
'_',
'D',
'1',
'8',
'_',
'D',
'1',
'9', 0,
8382 'D',
'2',
'3',
'_',
'D',
'2',
'5',
'_',
'D',
'2',
'7',
'_',
'D',
'2',
'9', 0,
8383 'D',
'2',
'7',
'_',
'D',
'2',
'8',
'_',
'D',
'2',
'9', 0,
8386 'D',
'3',
'_',
'D',
'5',
'_',
'D',
'7',
'_',
'D',
'9', 0,
8387 'D',
'7',
'_',
'D',
'8',
'_',
'D',
'9', 0,
8388 'Q',
'6',
'_',
'Q',
'7',
'_',
'Q',
'8',
'_',
'Q',
'9', 0,
8389 'R',
'8',
'_',
'R',
'9', 0,
8393 'R',
'1',
'2',
'_',
'S',
'P', 0,
8396 'f',
'p',
'e',
'x',
'c', 0,
8397 'f',
'p',
's',
'i',
'd', 0,
8398 'i',
't',
's',
't',
'a',
't',
'e', 0,
8403 'f',
'p',
's',
'c',
'r', 0,
8405 'a',
'p',
's',
'r', 0,
8406 'c',
'p',
's',
'r', 0,
8407 's',
'p',
's',
'r', 0,
8408 'f',
'p',
'i',
'n',
's',
't', 0,
8409 'f',
'p',
's',
'c',
'r',
'_',
'n',
'z',
'c',
'v', 0,
8410 'a',
'p',
's',
'r',
'_',
'n',
'z',
'c',
'v', 0,
8413 static const uint16_t RegAsmOffset[] = {
8414 1414, 1447, 1419, 1373, 1429, 1405, 1436, 1379, 1385, 1411, 1370, 1402, 1424, 131,
8415 288, 420, 566, 710, 849, 977, 1100, 1228, 1351, 39, 192, 347, 485, 625,
8416 765, 893, 1017, 1144, 1268, 83, 232, 391, 525, 669, 805, 933, 1053, 1184,
8417 1304, 123, 268, 435, 137, 294, 426, 134, 291, 423, 569, 713, 852, 980,
8418 1103, 1231, 1354, 43, 196, 351, 489, 629, 769, 140, 297, 429, 572, 716,
8419 855, 983, 1106, 1234, 1367, 1393, 1396, 1399, 143, 300, 432, 575, 719, 858,
8420 986, 1109, 1237, 1357, 47, 200, 355, 493, 633, 773, 897, 1021, 1148, 1272,
8421 87, 236, 395, 529, 673, 809, 937, 1057, 1188, 1308, 127, 272, 399, 533,
8422 680, 816, 947, 1067, 1198, 1318, 6, 163, 309, 449, 585, 729, 869, 997,
8423 1120, 1248, 59, 224, 367, 505, 645, 785, 909, 1033, 1160, 1284, 99, 260,
8424 276, 414, 554, 704, 837, 971, 1088, 1222, 1339, 32, 176, 339, 477, 617,
8425 757, 548, 698, 831, 965, 1082, 1216, 1333, 26, 170, 332, 469, 609, 749,
8426 1360, 282, 560, 843, 1094, 1345, 184, 405, 539, 689, 822, 956, 1073, 1207,
8427 1324, 16, 146, 320, 457, 597, 737, 881, 1005, 1132, 1256, 71, 204, 379,
8428 513, 657, 793, 921, 1041, 1172, 1292, 111, 240, 677, 813, 944, 1064, 1195,
8429 1315, 3, 160, 306, 446, 581, 725, 865, 993, 1116, 1244, 55, 220, 363,
8430 501, 641, 781, 905, 1029, 1156, 1280, 95, 256, 941, 1061, 1192, 1312, 0,
8431 157, 303, 443, 578, 722, 861, 989, 1112, 1240, 51, 216, 359, 497, 637,
8432 777, 901, 1025, 1152, 1276, 91, 252, 408, 692, 959, 1210, 19, 324, 601,
8433 885, 1136, 75, 383, 661, 925, 1176, 115, 686, 953, 1204, 13, 317, 593,
8434 877, 1128, 67, 375, 653, 917, 1168, 107,
8441 return AsmStrs+RegAsmOffset[RegNo-1];
8448 static const char *getRegisterName2(
unsigned RegNo)
8452 #ifndef CAPSTONE_DIET
8453 static const char AsmStrs[] = {
8454 'D',
'4',
'_',
'D',
'6',
'_',
'D',
'8',
'_',
'D',
'1',
'0', 0,
8455 'D',
'7',
'_',
'D',
'8',
'_',
'D',
'9',
'_',
'D',
'1',
'0', 0,
8456 'Q',
'7',
'_',
'Q',
'8',
'_',
'Q',
'9',
'_',
'Q',
'1',
'0', 0,
8461 'D',
'1',
'4',
'_',
'D',
'1',
'6',
'_',
'D',
'1',
'8',
'_',
'D',
'2',
'0', 0,
8462 'D',
'1',
'7',
'_',
'D',
'1',
'8',
'_',
'D',
'1',
'9',
'_',
'D',
'2',
'0', 0,
8465 'D',
'2',
'4',
'_',
'D',
'2',
'6',
'_',
'D',
'2',
'8',
'_',
'D',
'3',
'0', 0,
8466 'D',
'2',
'7',
'_',
'D',
'2',
'8',
'_',
'D',
'2',
'9',
'_',
'D',
'3',
'0', 0,
8471 'm',
'v',
'f',
'r',
'0', 0,
8473 'D',
'9',
'_',
'D',
'1',
'0',
'_',
'D',
'1',
'1', 0,
8474 'D',
'5',
'_',
'D',
'7',
'_',
'D',
'9',
'_',
'D',
'1',
'1', 0,
8475 'Q',
'8',
'_',
'Q',
'9',
'_',
'Q',
'1',
'0',
'_',
'Q',
'1',
'1', 0,
8476 'R',
'1',
'0',
'_',
'R',
'1',
'1', 0,
8481 'D',
'1',
'9',
'_',
'D',
'2',
'0',
'_',
'D',
'2',
'1', 0,
8482 'D',
'1',
'5',
'_',
'D',
'1',
'7',
'_',
'D',
'1',
'9',
'_',
'D',
'2',
'1', 0,
8485 'D',
'2',
'9',
'_',
'D',
'3',
'0',
'_',
'D',
'3',
'1', 0,
8486 'D',
'2',
'5',
'_',
'D',
'2',
'7',
'_',
'D',
'2',
'9',
'_',
'D',
'3',
'1', 0,
8489 'Q',
'0',
'_',
'Q',
'1', 0,
8490 'R',
'0',
'_',
'R',
'1', 0,
8493 'm',
'v',
'f',
'r',
'1', 0,
8495 'D',
'6',
'_',
'D',
'8',
'_',
'D',
'1',
'0',
'_',
'D',
'1',
'2', 0,
8496 'D',
'9',
'_',
'D',
'1',
'0',
'_',
'D',
'1',
'1',
'_',
'D',
'1',
'2', 0,
8497 'Q',
'9',
'_',
'Q',
'1',
'0',
'_',
'Q',
'1',
'1',
'_',
'Q',
'1',
'2', 0,
8502 'D',
'1',
'6',
'_',
'D',
'1',
'8',
'_',
'D',
'2',
'0',
'_',
'D',
'2',
'2', 0,
8503 'D',
'1',
'9',
'_',
'D',
'2',
'0',
'_',
'D',
'2',
'1',
'_',
'D',
'2',
'2', 0,
8506 'D',
'0',
'_',
'D',
'2', 0,
8507 'D',
'0',
'_',
'D',
'1',
'_',
'D',
'2', 0,
8508 'Q',
'1',
'_',
'Q',
'2', 0,
8511 'm',
'v',
'f',
'r',
'2', 0,
8513 'f',
'p',
'i',
'n',
's',
't',
'2', 0,
8514 'D',
'7',
'_',
'D',
'9',
'_',
'D',
'1',
'1',
'_',
'D',
'1',
'3', 0,
8515 'D',
'1',
'1',
'_',
'D',
'1',
'2',
'_',
'D',
'1',
'3', 0,
8516 'Q',
'1',
'0',
'_',
'Q',
'1',
'1',
'_',
'Q',
'1',
'2',
'_',
'Q',
'1',
'3', 0,
8520 'D',
'1',
'7',
'_',
'D',
'1',
'9',
'_',
'D',
'2',
'1',
'_',
'D',
'2',
'3', 0,
8521 'D',
'2',
'1',
'_',
'D',
'2',
'2',
'_',
'D',
'2',
'3', 0,
8524 'D',
'1',
'_',
'D',
'3', 0,
8525 'D',
'1',
'_',
'D',
'2',
'_',
'D',
'3', 0,
8526 'Q',
'0',
'_',
'Q',
'1',
'_',
'Q',
'2',
'_',
'Q',
'3', 0,
8527 'R',
'2',
'_',
'R',
'3', 0,
8532 'D',
'8',
'_',
'D',
'1',
'0',
'_',
'D',
'1',
'2',
'_',
'D',
'1',
'4', 0,
8533 'D',
'1',
'1',
'_',
'D',
'1',
'2',
'_',
'D',
'1',
'3',
'_',
'D',
'1',
'4', 0,
8534 'Q',
'1',
'1',
'_',
'Q',
'1',
'2',
'_',
'Q',
'1',
'3',
'_',
'Q',
'1',
'4', 0,
8538 'D',
'1',
'8',
'_',
'D',
'2',
'0',
'_',
'D',
'2',
'2',
'_',
'D',
'2',
'4', 0,
8539 'D',
'2',
'1',
'_',
'D',
'2',
'2',
'_',
'D',
'2',
'3',
'_',
'D',
'2',
'4', 0,
8542 'D',
'0',
'_',
'D',
'2',
'_',
'D',
'4', 0,
8543 'D',
'1',
'_',
'D',
'2',
'_',
'D',
'3',
'_',
'D',
'4', 0,
8544 'Q',
'1',
'_',
'Q',
'2',
'_',
'Q',
'3',
'_',
'Q',
'4', 0,
8549 'D',
'9',
'_',
'D',
'1',
'1',
'_',
'D',
'1',
'3',
'_',
'D',
'1',
'5', 0,
8550 'D',
'1',
'3',
'_',
'D',
'1',
'4',
'_',
'D',
'1',
'5', 0,
8551 'Q',
'1',
'2',
'_',
'Q',
'1',
'3',
'_',
'Q',
'1',
'4',
'_',
'Q',
'1',
'5', 0,
8555 'D',
'1',
'9',
'_',
'D',
'2',
'1',
'_',
'D',
'2',
'3',
'_',
'D',
'2',
'5', 0,
8556 'D',
'2',
'3',
'_',
'D',
'2',
'4',
'_',
'D',
'2',
'5', 0,
8559 'D',
'1',
'_',
'D',
'3',
'_',
'D',
'5', 0,
8560 'D',
'3',
'_',
'D',
'4',
'_',
'D',
'5', 0,
8561 'Q',
'2',
'_',
'Q',
'3',
'_',
'Q',
'4',
'_',
'Q',
'5', 0,
8562 'R',
'4',
'_',
'R',
'5', 0,
8567 'D',
'1',
'0',
'_',
'D',
'1',
'2',
'_',
'D',
'1',
'4',
'_',
'D',
'1',
'6', 0,
8568 'D',
'1',
'3',
'_',
'D',
'1',
'4',
'_',
'D',
'1',
'5',
'_',
'D',
'1',
'6', 0,
8571 'D',
'2',
'0',
'_',
'D',
'2',
'2',
'_',
'D',
'2',
'4',
'_',
'D',
'2',
'6', 0,
8572 'D',
'2',
'3',
'_',
'D',
'2',
'4',
'_',
'D',
'2',
'5',
'_',
'D',
'2',
'6', 0,
8575 'D',
'0',
'_',
'D',
'2',
'_',
'D',
'4',
'_',
'D',
'6', 0,
8576 'D',
'3',
'_',
'D',
'4',
'_',
'D',
'5',
'_',
'D',
'6', 0,
8577 'Q',
'3',
'_',
'Q',
'4',
'_',
'Q',
'5',
'_',
'Q',
'6', 0,
8582 'D',
'1',
'1',
'_',
'D',
'1',
'3',
'_',
'D',
'1',
'5',
'_',
'D',
'1',
'7', 0,
8583 'D',
'1',
'5',
'_',
'D',
'1',
'6',
'_',
'D',
'1',
'7', 0,
8586 'D',
'2',
'1',
'_',
'D',
'2',
'3',
'_',
'D',
'2',
'5',
'_',
'D',
'2',
'7', 0,
8587 'D',
'2',
'5',
'_',
'D',
'2',
'6',
'_',
'D',
'2',
'7', 0,
8590 'D',
'1',
'_',
'D',
'3',
'_',
'D',
'5',
'_',
'D',
'7', 0,
8591 'D',
'5',
'_',
'D',
'6',
'_',
'D',
'7', 0,
8592 'Q',
'4',
'_',
'Q',
'5',
'_',
'Q',
'6',
'_',
'Q',
'7', 0,
8593 'R',
'6',
'_',
'R',
'7', 0,
8598 'D',
'1',
'2',
'_',
'D',
'1',
'4',
'_',
'D',
'1',
'6',
'_',
'D',
'1',
'8', 0,
8599 'D',
'1',
'5',
'_',
'D',
'1',
'6',
'_',
'D',
'1',
'7',
'_',
'D',
'1',
'8', 0,
8602 'D',
'2',
'2',
'_',
'D',
'2',
'4',
'_',
'D',
'2',
'6',
'_',
'D',
'2',
'8', 0,
8603 'D',
'2',
'5',
'_',
'D',
'2',
'6',
'_',
'D',
'2',
'7',
'_',
'D',
'2',
'8', 0,
8606 'D',
'2',
'_',
'D',
'4',
'_',
'D',
'6',
'_',
'D',
'8', 0,
8607 'D',
'5',
'_',
'D',
'6',
'_',
'D',
'7',
'_',
'D',
'8', 0,
8608 'Q',
'5',
'_',
'Q',
'6',
'_',
'Q',
'7',
'_',
'Q',
'8', 0,
8613 'D',
'1',
'3',
'_',
'D',
'1',
'5',
'_',
'D',
'1',
'7',
'_',
'D',
'1',
'9', 0,
8614 'D',
'1',
'7',
'_',
'D',
'1',
'8',
'_',
'D',
'1',
'9', 0,
8617 'D',
'2',
'3',
'_',
'D',
'2',
'5',
'_',
'D',
'2',
'7',
'_',
'D',
'2',
'9', 0,
8618 'D',
'2',
'7',
'_',
'D',
'2',
'8',
'_',
'D',
'2',
'9', 0,
8621 'D',
'3',
'_',
'D',
'5',
'_',
'D',
'7',
'_',
'D',
'9', 0,
8622 'D',
'7',
'_',
'D',
'8',
'_',
'D',
'9', 0,
8623 'Q',
'6',
'_',
'Q',
'7',
'_',
'Q',
'8',
'_',
'Q',
'9', 0,
8624 'R',
'8',
'_',
'R',
'9', 0,
8629 'R',
'1',
'2',
'_',
'S',
'P', 0,
8631 'f',
'p',
'e',
'x',
'c', 0,
8632 'f',
'p',
's',
'i',
'd', 0,
8633 'i',
't',
's',
't',
'a',
't',
'e', 0,
8635 'f',
'p',
's',
'c',
'r', 0,
8637 'a',
'p',
's',
'r', 0,
8638 'c',
'p',
's',
'r', 0,
8639 's',
'p',
's',
'r', 0,
8640 'f',
'p',
'i',
'n',
's',
't', 0,
8641 'f',
'p',
's',
'c',
'r',
'_',
'n',
'z',
'c',
'v', 0,
8642 'a',
'p',
's',
'r',
'_',
'n',
'z',
'c',
'v', 0,
8645 static const uint32_t RegAsmOffset[] = {
8646 1417, 1450, 1422, 1385, 1432, 1408, 1439, 1391, 1397, 1414, 1382, 1405, 1427, 135,
8647 296, 432, 578, 722, 861, 989, 1112, 1240, 1363, 39, 196, 355, 497, 637,
8648 777, 905, 1029, 1156, 1280, 87, 240, 403, 537, 681, 817, 945, 1065, 1196,
8649 1316, 127, 276, 447, 141, 302, 438, 138, 299, 435, 581, 725, 864, 992,
8650 1115, 1243, 1366, 43, 200, 359, 501, 641, 781, 144, 305, 441, 584, 728,
8651 867, 995, 1118, 1246, 1369, 47, 204, 363, 147, 308, 444, 587, 731, 870,
8652 998, 1121, 1249, 1372, 51, 208, 367, 505, 645, 785, 909, 1033, 1160, 1284,
8653 91, 244, 407, 541, 685, 821, 949, 1069, 1200, 1320, 131, 280, 411, 545,
8654 692, 828, 959, 1079, 1210, 1330, 6, 167, 317, 461, 597, 741, 881, 1009,
8655 1132, 1260, 63, 232, 379, 517, 657, 797, 921, 1045, 1172, 1296, 103, 268,
8656 284, 426, 566, 716, 849, 983, 1100, 1234, 1351, 32, 180, 347, 489, 629,
8657 769, 560, 710, 843, 977, 1094, 1228, 1345, 26, 174, 340, 481, 621, 761,
8658 1375, 290, 572, 855, 1106, 1357, 188, 417, 551, 701, 834, 968, 1085, 1219,
8659 1336, 16, 150, 328, 469, 609, 749, 893, 1017, 1144, 1268, 75, 212, 391,
8660 525, 669, 805, 933, 1053, 1184, 1304, 115, 248, 689, 825, 956, 1076, 1207,
8661 1327, 3, 164, 314, 458, 593, 737, 877, 1005, 1128, 1256, 59, 228, 375,
8662 513, 653, 793, 917, 1041, 1168, 1292, 99, 264, 953, 1073, 1204, 1324, 0,
8663 161, 311, 455, 590, 734, 873, 1001, 1124, 1252, 55, 224, 371, 509, 649,
8664 789, 913, 1037, 1164, 1288, 95, 260, 420, 704, 971, 1222, 19, 332, 613,
8665 897, 1148, 79, 395, 673, 937, 1188, 119, 698, 965, 1216, 13, 325, 605,
8666 889, 1140, 71, 387, 665, 929, 1180, 111,
8673 return AsmStrs+RegAsmOffset[RegNo-1];
8679 #ifdef PRINT_ALIAS_INSTR
8680 #undef PRINT_ALIAS_INSTR
8682 static void printCustomAliasOperand(
MCInst *MI,
unsigned OpIdx,
8685 switch (PrintMethodIdx) {
8690 printPredicateOperand(MI, OpIdx,
OS);
8693 printSBitModifierOperand(MI, OpIdx,
OS);
8696 printFPImmOperand(MI, OpIdx,
OS);
8699 printRegisterList(MI, OpIdx,
OS);
8702 printPImmediate(MI, OpIdx,
OS);
8705 printCImmediate(MI, OpIdx,
OS);
8708 printImmPlusOneOperand(MI, OpIdx,
OS);
8711 printAddrMode5Operand(MI, OpIdx,
OS,
false);
8714 printNEONModImmOperand(MI, OpIdx,
OS);
8717 printT2SOOperand(MI, OpIdx,
OS);
8720 printAdrLabelOperand<0>(MI, OpIdx,
OS, 0);
8723 printThumbSRImm(MI, OpIdx,
OS);
8726 printAddrModeImm12Operand(MI, OpIdx,
OS,
false);
8729 printThumbLdrLabelOperand(MI, OpIdx,
OS);
8732 printT2AddrModeSoRegOperand(MI, OpIdx,
OS);
8735 printRotImmOperand(MI, OpIdx,
OS);
8738 printCPSIMod(MI, OpIdx,
OS);
8745 #define GETREGCLASS_CONTAIN(_class, _reg) MCRegisterClass_contains(MCRegisterInfo_getRegClass(MRI, _class), MCOperand_getReg(MCInst_getOperand(MI, _reg)))
8746 const char *AsmString;
8747 char *
tmp, *AsmMnem, *AsmOps, *
c;
8748 int OpIdx, PrintMethodIdx;
8751 default:
return NULL;
8755 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0) &&
8757 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 1)) {
8759 AsmString =
"bic$\xFF\x06\x02$\xFF\x04\x01 $\x01, $\x02, $\x03";
8764 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0) &&
8768 AsmString =
"bic$\xFF\x06\x02$\xFF\x04\x01 $\x01, $\x03";
8775 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0) &&
8777 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 1)) {
8779 AsmString =
"and$\xFF\x06\x02$\xFF\x04\x01 $\x01, $\x02, $\x03";
8784 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0) &&
8788 AsmString =
"and$\xFF\x06\x02$\xFF\x04\x01 $\x01, $\x03";
8804 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0)) {
8806 AsmString =
"cmp$\xFF\x03\x01 $\x01, $\x02";
8813 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0)) {
8815 AsmString =
"cmn$\xFF\x03\x01 $\x01, $\x02";
8840 GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 0)) {
8842 AsmString =
"fconstd$\xFF\x03\x01 $\x01, $\xFF\x02\x03";
8849 GETREGCLASS_CONTAIN(ARM_SPRRegClassID, 0)) {
8851 AsmString =
"fconsts$\xFF\x03\x01 $\x01, $\xFF\x02\x03";
8858 AsmString =
"fmstat$\xFF\x01\x01";
8867 AsmString =
"nop$\xFF\x02\x01";
8874 AsmString =
"yield$\xFF\x02\x01";
8881 AsmString =
"wfe$\xFF\x02\x01";
8888 AsmString =
"wfi$\xFF\x02\x01";
8895 AsmString =
"sev$\xFF\x02\x01";
8902 AsmString =
"sevl$\xFF\x02\x01";
8919 AsmString =
"pop$\xFF\x02\x01 $\xFF\x04\x04";
8926 GETREGCLASS_CONTAIN(ARM_GPRRegClassID, 2) &&
8930 AsmString =
"mcr$\xFF\x07\x01 $\xFF\x01\x05, $\x02, $\x03, $\xFF\x04\x06, $\xFF\x05\x06";
8937 GETREGCLASS_CONTAIN(ARM_GPRRegClassID, 2) &&
8941 AsmString =
"mcr2 $\xFF\x01\x05, $\x02, $\x03, $\xFF\x04\x06, $\xFF\x05\x06";
8948 GETREGCLASS_CONTAIN(ARM_GPRnopcRegClassID, 0) &&
8950 GETREGCLASS_CONTAIN(ARM_GPRnopcRegClassID, 1) &&
8952 GETREGCLASS_CONTAIN(ARM_GPRnopcRegClassID, 2) &&
8954 GETREGCLASS_CONTAIN(ARM_GPRnopcRegClassID, 3)) {
8956 AsmString =
"mla$\xFF\x07\x02$\xFF\x05\x01 $\x01, $\x02, $\x03, $\x04";
8963 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0)) {
8965 AsmString =
"mvn$\xFF\x05\x02$\xFF\x03\x01 $\x01, $\x02";
8972 GETREGCLASS_CONTAIN(ARM_GPRRegClassID, 0)) {
8974 AsmString =
"mov$\xFF\x03\x01 $\x01, $\x02";
8981 GETREGCLASS_CONTAIN(ARM_GPRwithAPSRRegClassID, 0) &&
8985 AsmString =
"mrc$\xFF\x07\x01 $\xFF\x02\x05, $\x03, $\x01, $\xFF\x04\x06, $\xFF\x05\x06";
8992 GETREGCLASS_CONTAIN(ARM_GPRwithAPSRRegClassID, 0) &&
8996 AsmString =
"mrc2 $\xFF\x02\x05, $\x03, $\x01, $\xFF\x04\x06, $\xFF\x05\x06";
9003 GETREGCLASS_CONTAIN(ARM_GPRnopcRegClassID, 0)) {
9005 AsmString =
"mrs$\xFF\x02\x01 $\x01, cpsr";
9012 GETREGCLASS_CONTAIN(ARM_GPRnopcRegClassID, 0) &&
9014 GETREGCLASS_CONTAIN(ARM_GPRnopcRegClassID, 1) &&
9016 GETREGCLASS_CONTAIN(ARM_GPRnopcRegClassID, 2)) {
9018 AsmString =
"mul$\xFF\x06\x02$\xFF\x04\x01 $\x01, $\x02, $\x03";
9025 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0)) {
9027 AsmString =
"mov$\xFF\x05\x02$\xFF\x03\x01 $\x01, $\x02";
9034 GETREGCLASS_CONTAIN(ARM_GPRRegClassID, 0) &&
9036 GETREGCLASS_CONTAIN(ARM_GPRRegClassID, 1) &&
9040 AsmString =
"neg$\xFF\x06\x02$\xFF\x04\x01 $\x01, $\x02";
9047 GETREGCLASS_CONTAIN(ARM_GPRRegClassID, 0) &&
9049 GETREGCLASS_CONTAIN(ARM_GPRRegClassID, 1) &&
9051 GETREGCLASS_CONTAIN(ARM_GPRRegClassID, 2) &&
9053 GETREGCLASS_CONTAIN(ARM_GPRRegClassID, 3)) {
9055 AsmString =
"smlal$\xFF\x07\x02$\xFF\x05\x01 $\x01, $\x02, $\x03, $\x04";
9062 GETREGCLASS_CONTAIN(ARM_GPRRegClassID, 0) &&
9064 GETREGCLASS_CONTAIN(ARM_GPRRegClassID, 1) &&
9066 GETREGCLASS_CONTAIN(ARM_GPRRegClassID, 2) &&
9068 GETREGCLASS_CONTAIN(ARM_GPRRegClassID, 3)) {
9070 AsmString =
"smull$\xFF\x07\x02$\xFF\x05\x01 $\x01, $\x02, $\x03, $\x04";
9077 AsmString =
"srsda $\x01";
9084 AsmString =
"srsda $\x01!";
9091 AsmString =
"srsdb $\x01";
9098 AsmString =
"srsdb $\x01!";
9105 AsmString =
"srsia $\x01";
9112 AsmString =
"srsia $\x01!";
9119 AsmString =
"srsib $\x01";
9126 AsmString =
"srsib $\x01!";
9133 GETREGCLASS_CONTAIN(ARM_GPRnopcRegClassID, 0) &&
9135 GETREGCLASS_CONTAIN(ARM_GPRnopcRegClassID, 2) &&
9139 AsmString =
"ssat$\xFF\x05\x01 $\x01, $\xFF\x02\x07, $\x03";
9147 AsmString =
"push$\xFF\x02\x01 $\xFF\x04\x04";
9154 GETREGCLASS_CONTAIN(ARM_GPRRegClassID, 0) &&
9156 GETREGCLASS_CONTAIN(ARM_GPRRegClassID, 1)) {
9158 AsmString =
"add$\xFF\x06\x02$\xFF\x04\x01 $\x01, $\x02, $\x03";
9163 GETREGCLASS_CONTAIN(ARM_GPRRegClassID, 0) &&
9167 AsmString =
"add$\xFF\x06\x02$\xFF\x04\x01 $\x01, $\x03";
9174 GETREGCLASS_CONTAIN(ARM_GPRnopcRegClassID, 0) &&
9176 GETREGCLASS_CONTAIN(ARM_GPRRegClassID, 1) &&
9178 GETREGCLASS_CONTAIN(ARM_GPRnopcRegClassID, 2) &&
9182 AsmString =
"sxtab$\xFF\x05\x01 $\x01, $\x02, $\x03";
9189 GETREGCLASS_CONTAIN(ARM_GPRnopcRegClassID, 0) &&
9191 GETREGCLASS_CONTAIN(ARM_GPRRegClassID, 1) &&
9193 GETREGCLASS_CONTAIN(ARM_GPRnopcRegClassID, 2) &&
9197 AsmString =
"sxtab16$\xFF\x05\x01 $\x01, $\x02, $\x03";
9204 GETREGCLASS_CONTAIN(ARM_GPRnopcRegClassID, 0) &&
9206 GETREGCLASS_CONTAIN(ARM_GPRRegClassID, 1) &&
9208 GETREGCLASS_CONTAIN(ARM_GPRnopcRegClassID, 2) &&
9212 AsmString =
"sxtah$\xFF\x05\x01 $\x01, $\x02, $\x03";
9219 GETREGCLASS_CONTAIN(ARM_GPRnopcRegClassID, 0) &&
9221 GETREGCLASS_CONTAIN(ARM_GPRnopcRegClassID, 1) &&
9225 AsmString =
"sxtb$\xFF\x04\x01 $\x01, $\x02";
9232 GETREGCLASS_CONTAIN(ARM_GPRnopcRegClassID, 0) &&
9234 GETREGCLASS_CONTAIN(ARM_GPRnopcRegClassID, 1) &&
9238 AsmString =
"sxtb16$\xFF\x04\x01 $\x01, $\x02";
9245 GETREGCLASS_CONTAIN(ARM_GPRnopcRegClassID, 0) &&
9247 GETREGCLASS_CONTAIN(ARM_GPRnopcRegClassID, 1) &&
9251 AsmString =
"sxth$\xFF\x04\x01 $\x01, $\x02";
9258 GETREGCLASS_CONTAIN(ARM_GPRRegClassID, 0) &&
9260 GETREGCLASS_CONTAIN(ARM_GPRRegClassID, 1) &&
9262 GETREGCLASS_CONTAIN(ARM_GPRRegClassID, 2) &&
9264 GETREGCLASS_CONTAIN(ARM_GPRRegClassID, 3)) {
9266 AsmString =
"umlal$\xFF\x07\x02$\xFF\x05\x01 $\x01, $\x02, $\x03, $\x04";
9273 GETREGCLASS_CONTAIN(ARM_GPRRegClassID, 0) &&
9275 GETREGCLASS_CONTAIN(ARM_GPRRegClassID, 1) &&
9277 GETREGCLASS_CONTAIN(ARM_GPRRegClassID, 2) &&
9279 GETREGCLASS_CONTAIN(ARM_GPRRegClassID, 3)) {
9281 AsmString =
"umull$\xFF\x07\x02$\xFF\x05\x01 $\x01, $\x02, $\x03, $\x04";
9288 GETREGCLASS_CONTAIN(ARM_GPRnopcRegClassID, 0) &&
9290 GETREGCLASS_CONTAIN(ARM_GPRnopcRegClassID, 2) &&
9294 AsmString =
"usat$\xFF\x05\x01 $\x01, $\x02, $\x03";
9301 GETREGCLASS_CONTAIN(ARM_GPRnopcRegClassID, 0) &&
9303 GETREGCLASS_CONTAIN(ARM_GPRRegClassID, 1) &&
9305 GETREGCLASS_CONTAIN(ARM_GPRnopcRegClassID, 2) &&
9309 AsmString =
"uxtab$\xFF\x05\x01 $\x01, $\x02, $\x03";
9316 GETREGCLASS_CONTAIN(ARM_GPRnopcRegClassID, 0) &&
9318 GETREGCLASS_CONTAIN(ARM_GPRRegClassID, 1) &&
9320 GETREGCLASS_CONTAIN(ARM_GPRnopcRegClassID, 2) &&
9324 AsmString =
"uxtab16$\xFF\x05\x01 $\x01, $\x02, $\x03";
9331 GETREGCLASS_CONTAIN(ARM_GPRnopcRegClassID, 0) &&
9333 GETREGCLASS_CONTAIN(ARM_GPRRegClassID, 1) &&
9335 GETREGCLASS_CONTAIN(ARM_GPRnopcRegClassID, 2) &&
9339 AsmString =
"uxtah$\xFF\x05\x01 $\x01, $\x02, $\x03";
9346 GETREGCLASS_CONTAIN(ARM_GPRnopcRegClassID, 0) &&
9348 GETREGCLASS_CONTAIN(ARM_GPRnopcRegClassID, 1) &&
9352 AsmString =
"uxtb$\xFF\x04\x01 $\x01, $\x02";
9359 GETREGCLASS_CONTAIN(ARM_GPRnopcRegClassID, 0) &&
9361 GETREGCLASS_CONTAIN(ARM_GPRnopcRegClassID, 1) &&
9365 AsmString =
"uxtb16$\xFF\x04\x01 $\x01, $\x02";
9372 GETREGCLASS_CONTAIN(ARM_GPRnopcRegClassID, 0) &&
9374 GETREGCLASS_CONTAIN(ARM_GPRnopcRegClassID, 1) &&
9378 AsmString =
"uxth$\xFF\x04\x01 $\x01, $\x02";
9385 GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 0) &&
9387 GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 1) &&
9389 GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 2)) {
9391 AsmString =
"vacle$\xFF\x04\x01.f32 $\x01, $\x03, $\x02";
9396 GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 0) &&
9398 GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 1) &&
9402 AsmString =
"vacle$\xFF\x04\x01.f32 $\x01, $\x02";
9409 GETREGCLASS_CONTAIN(ARM_QPRRegClassID, 0) &&
9411 GETREGCLASS_CONTAIN(ARM_QPRRegClassID, 1) &&
9413 GETREGCLASS_CONTAIN(ARM_QPRRegClassID, 2)) {
9415 AsmString =
"vacle$\xFF\x04\x01.f32 $\x01, $\x03, $\x02";
9420 GETREGCLASS_CONTAIN(ARM_QPRRegClassID, 0) &&
9422 GETREGCLASS_CONTAIN(ARM_QPRRegClassID, 1) &&
9426 AsmString =
"vacle$\xFF\x04\x01.f32 $\x01, $\x02";
9433 GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 0) &&
9435 GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 1) &&
9437 GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 2)) {
9439 AsmString =
"vaclt$\xFF\x04\x01.f32 $\x01, $\x03, $\x02";
9444 GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 0) &&
9446 GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 1) &&
9450 AsmString =
"vaclt$\xFF\x04\x01.f32 $\x01, $\x02";
9457 GETREGCLASS_CONTAIN(ARM_QPRRegClassID, 0) &&
9459 GETREGCLASS_CONTAIN(ARM_QPRRegClassID, 1) &&
9461 GETREGCLASS_CONTAIN(ARM_QPRRegClassID, 2)) {
9463 AsmString =
"vaclt$\xFF\x04\x01.f32 $\x01, $\x03, $\x02";
9468 GETREGCLASS_CONTAIN(ARM_QPRRegClassID, 0) &&
9470 GETREGCLASS_CONTAIN(ARM_QPRRegClassID, 1) &&
9474 AsmString =
"vaclt$\xFF\x04\x01.f32 $\x01, $\x02";
9481 GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 0) &&
9483 GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 1) &&
9485 GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 2)) {
9487 AsmString =
"faddd$\xFF\x04\x01 $\x01, $\x02, $\x03";
9494 GETREGCLASS_CONTAIN(ARM_SPRRegClassID, 0) &&
9496 GETREGCLASS_CONTAIN(ARM_SPRRegClassID, 1) &&
9498 GETREGCLASS_CONTAIN(ARM_SPRRegClassID, 2)) {
9500 AsmString =
"fadds$\xFF\x04\x01 $\x01, $\x02, $\x03";
9504 case ARM_VBICiv2i32:
9507 GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 0)) {
9509 AsmString =
"vand$\xFF\x03\x01.i32 $\x01, $\x02";
9513 case ARM_VBICiv4i16:
9516 GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 0)) {
9518 AsmString =
"vand$\xFF\x03\x01.i16 $\x01, $\x02";
9522 case ARM_VBICiv4i32:
9525 GETREGCLASS_CONTAIN(ARM_QPRRegClassID, 0)) {
9527 AsmString =
"vand$\xFF\x03\x01.i32 $\x01, $\x02";
9531 case ARM_VBICiv8i16:
9534 GETREGCLASS_CONTAIN(ARM_QPRRegClassID, 0)) {
9536 AsmString =
"vand$\xFF\x03\x01.i16 $\x01, $\x02";
9543 GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 0) &&
9545 GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 1) &&
9547 GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 2)) {
9549 AsmString =
"vcle$\xFF\x04\x01.f32 $\x01, $\x03, $\x02";
9556 GETREGCLASS_CONTAIN(ARM_QPRRegClassID, 0) &&
9558 GETREGCLASS_CONTAIN(ARM_QPRRegClassID, 1) &&
9560 GETREGCLASS_CONTAIN(ARM_QPRRegClassID, 2)) {
9562 AsmString =
"vcle$\xFF\x04\x01.f32 $\x01, $\x03, $\x02";
9566 case ARM_VCGEsv16i8:
9569 GETREGCLASS_CONTAIN(ARM_QPRRegClassID, 0) &&
9571 GETREGCLASS_CONTAIN(ARM_QPRRegClassID, 1) &&
9573 GETREGCLASS_CONTAIN(ARM_QPRRegClassID, 2)) {
9575 AsmString =
"vcle$\xFF\x04\x01.s8 $\x01, $\x03, $\x02";
9579 case ARM_VCGEsv2i32:
9582 GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 0) &&
9584 GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 1) &&
9586 GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 2)) {
9588 AsmString =
"vcle$\xFF\x04\x01.s32 $\x01, $\x03, $\x02";
9592 case ARM_VCGEsv4i16:
9595 GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 0) &&
9597 GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 1) &&
9599 GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 2)) {
9601 AsmString =
"vcle$\xFF\x04\x01.s16 $\x01, $\x03, $\x02";
9605 case ARM_VCGEsv4i32:
9608 GETREGCLASS_CONTAIN(ARM_QPRRegClassID, 0) &&
9610 GETREGCLASS_CONTAIN(ARM_QPRRegClassID, 1) &&
9612 GETREGCLASS_CONTAIN(ARM_QPRRegClassID, 2)) {
9614 AsmString =
"vcle$\xFF\x04\x01.s32 $\x01, $\x03, $\x02";
9618 case ARM_VCGEsv8i16:
9621 GETREGCLASS_CONTAIN(ARM_QPRRegClassID, 0) &&
9623 GETREGCLASS_CONTAIN(ARM_QPRRegClassID, 1) &&
9625 GETREGCLASS_CONTAIN(ARM_QPRRegClassID, 2)) {
9627 AsmString =
"vcle$\xFF\x04\x01.s16 $\x01, $\x03, $\x02";
9634 GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 0) &&
9636 GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 1) &&
9638 GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 2)) {
9640 AsmString =
"vcle$\xFF\x04\x01.s8 $\x01, $\x03, $\x02";
9644 case ARM_VCGEuv16i8:
9647 GETREGCLASS_CONTAIN(ARM_QPRRegClassID, 0) &&
9649 GETREGCLASS_CONTAIN(ARM_QPRRegClassID, 1) &&
9651 GETREGCLASS_CONTAIN(ARM_QPRRegClassID, 2)) {
9653 AsmString =
"vcle$\xFF\x04\x01.u8 $\x01, $\x03, $\x02";
9657 case ARM_VCGEuv2i32:
9660 GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 0) &&
9662 GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 1) &&
9664 GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 2)) {
9666 AsmString =
"vcle$\xFF\x04\x01.u32 $\x01, $\x03, $\x02";
9670 case ARM_VCGEuv4i16:
9673 GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 0) &&
9675 GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 1) &&
9677 GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 2)) {
9679 AsmString =
"vcle$\xFF\x04\x01.u16 $\x01, $\x03, $\x02";
9683 case ARM_VCGEuv4i32:
9686 GETREGCLASS_CONTAIN(ARM_QPRRegClassID, 0) &&
9688 GETREGCLASS_CONTAIN(ARM_QPRRegClassID, 1) &&
9690 GETREGCLASS_CONTAIN(ARM_QPRRegClassID, 2)) {
9692 AsmString =
"vcle$\xFF\x04\x01.u32 $\x01, $\x03, $\x02";
9696 case ARM_VCGEuv8i16:
9699 GETREGCLASS_CONTAIN(ARM_QPRRegClassID, 0) &&
9701 GETREGCLASS_CONTAIN(ARM_QPRRegClassID, 1) &&
9703 GETREGCLASS_CONTAIN(ARM_QPRRegClassID, 2)) {
9705 AsmString =
"vcle$\xFF\x04\x01.u16 $\x01, $\x03, $\x02";
9712 GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 0) &&
9714 GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 1) &&
9716 GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 2)) {
9718 AsmString =
"vcle$\xFF\x04\x01.u8 $\x01, $\x03, $\x02";
9725 GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 0) &&
9727 GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 1) &&
9729 GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 2)) {
9731 AsmString =
"vclt$\xFF\x04\x01.f32 $\x01, $\x03, $\x02";
9738 GETREGCLASS_CONTAIN(ARM_QPRRegClassID, 0) &&
9740 GETREGCLASS_CONTAIN(ARM_QPRRegClassID, 1) &&
9742 GETREGCLASS_CONTAIN(ARM_QPRRegClassID, 2)) {
9744 AsmString =
"vclt$\xFF\x04\x01.f32 $\x01, $\x03, $\x02";
9748 case ARM_VCGTsv16i8:
9751 GETREGCLASS_CONTAIN(ARM_QPRRegClassID, 0) &&
9753 GETREGCLASS_CONTAIN(ARM_QPRRegClassID, 1) &&
9755 GETREGCLASS_CONTAIN(ARM_QPRRegClassID, 2)) {
9757 AsmString =
"vclt$\xFF\x04\x01.s8 $\x01, $\x03, $\x02";
9761 case ARM_VCGTsv2i32:
9764 GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 0) &&
9766 GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 1) &&
9768 GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 2)) {
9770 AsmString =
"vclt$\xFF\x04\x01.s32 $\x01, $\x03, $\x02";
9774 case ARM_VCGTsv4i16:
9777 GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 0) &&
9779 GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 1) &&
9781 GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 2)) {
9783 AsmString =
"vclt$\xFF\x04\x01.s16 $\x01, $\x03, $\x02";
9787 case ARM_VCGTsv4i32:
9790 GETREGCLASS_CONTAIN(ARM_QPRRegClassID, 0) &&
9792 GETREGCLASS_CONTAIN(ARM_QPRRegClassID, 1) &&
9794 GETREGCLASS_CONTAIN(ARM_QPRRegClassID, 2)) {
9796 AsmString =
"vclt$\xFF\x04\x01.s32 $\x01, $\x03, $\x02";
9800 case ARM_VCGTsv8i16:
9803 GETREGCLASS_CONTAIN(ARM_QPRRegClassID, 0) &&
9805 GETREGCLASS_CONTAIN(ARM_QPRRegClassID, 1) &&
9807 GETREGCLASS_CONTAIN(ARM_QPRRegClassID, 2)) {
9809 AsmString =
"vclt$\xFF\x04\x01.s16 $\x01, $\x03, $\x02";
9816 GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 0) &&
9818 GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 1) &&
9820 GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 2)) {
9822 AsmString =
"vclt$\xFF\x04\x01.s8 $\x01, $\x03, $\x02";
9826 case ARM_VCGTuv16i8:
9829 GETREGCLASS_CONTAIN(ARM_QPRRegClassID, 0) &&
9831 GETREGCLASS_CONTAIN(ARM_QPRRegClassID, 1) &&
9833 GETREGCLASS_CONTAIN(ARM_QPRRegClassID, 2)) {
9835 AsmString =
"vclt$\xFF\x04\x01.u8 $\x01, $\x03, $\x02";
9839 case ARM_VCGTuv2i32:
9842 GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 0) &&
9844 GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 1) &&
9846 GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 2)) {
9848 AsmString =
"vclt$\xFF\x04\x01.u32 $\x01, $\x03, $\x02";
9852 case ARM_VCGTuv4i16:
9855 GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 0) &&
9857 GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 1) &&
9859 GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 2)) {
9861 AsmString =
"vclt$\xFF\x04\x01.u16 $\x01, $\x03, $\x02";
9865 case ARM_VCGTuv4i32:
9868 GETREGCLASS_CONTAIN(ARM_QPRRegClassID, 0) &&
9870 GETREGCLASS_CONTAIN(ARM_QPRRegClassID, 1) &&
9872 GETREGCLASS_CONTAIN(ARM_QPRRegClassID, 2)) {
9874 AsmString =
"vclt$\xFF\x04\x01.u32 $\x01, $\x03, $\x02";
9878 case ARM_VCGTuv8i16:
9881 GETREGCLASS_CONTAIN(ARM_QPRRegClassID, 0) &&
9883 GETREGCLASS_CONTAIN(ARM_QPRRegClassID, 1) &&
9885 GETREGCLASS_CONTAIN(ARM_QPRRegClassID, 2)) {
9887 AsmString =
"vclt$\xFF\x04\x01.u16 $\x01, $\x03, $\x02";
9894 GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 0) &&
9896 GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 1) &&
9898 GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 2)) {
9900 AsmString =
"vclt$\xFF\x04\x01.u8 $\x01, $\x03, $\x02";
9907 GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 0)) {
9909 AsmString =
"fcmpzd$\xFF\x02\x01 $\x01";
9916 GETREGCLASS_CONTAIN(ARM_SPRRegClassID, 0)) {
9918 AsmString =
"fcmpzs$\xFF\x02\x01 $\x01";
9925 GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 0)) {
9927 AsmString =
"vldr$\xFF\x04\x01.64 $\x01, $\xFF\x02\x08";
9934 GETREGCLASS_CONTAIN(ARM_SPRRegClassID, 0)) {
9936 AsmString =
"vldr$\xFF\x04\x01.32 $\x01, $\xFF\x02\x08";
9943 GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 0) &&
9945 GETREGCLASS_CONTAIN(ARM_GPRRegClassID, 1) &&
9947 GETREGCLASS_CONTAIN(ARM_GPRRegClassID, 2)) {
9949 AsmString =
"vmov$\xFF\x04\x01.f64 $\x01, $\x02, $\x03";
9956 GETREGCLASS_CONTAIN(ARM_GPRRegClassID, 0) &&
9958 GETREGCLASS_CONTAIN(ARM_GPRRegClassID, 1) &&
9960 GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 2)) {
9962 AsmString =
"vmov$\xFF\x04\x01.f64 $\x01, $\x02, $\x03";
9969 GETREGCLASS_CONTAIN(ARM_SPRRegClassID, 0) &&
9971 GETREGCLASS_CONTAIN(ARM_SPRRegClassID, 1)) {
9973 AsmString =
"vmov$\xFF\x03\x01 $\x01, $\x02";
9980 GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 0)) {
9982 AsmString =
"vmov$\xFF\x03\x01.i32 $\x01, $\xFF\x02\x09";
9989 GETREGCLASS_CONTAIN(ARM_QPRRegClassID, 0)) {
9991 AsmString =
"vmov$\xFF\x03\x01.i32 $\x01, $\xFF\x02\x09";
9998 GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 0) &&
10000 GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 1)) {
10002 AsmString =
"vrinta.f64.f64 $\x01, $\x02";
10009 GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 0) &&
10011 GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 1)) {
10013 AsmString =
"vrinta.f32.f32 $\x01, $\x02";
10020 GETREGCLASS_CONTAIN(ARM_QPRRegClassID, 0) &&
10022 GETREGCLASS_CONTAIN(ARM_QPRRegClassID, 1)) {
10024 AsmString =
"vrinta.f32.f32 $\x01, $\x02";
10031 GETREGCLASS_CONTAIN(ARM_SPRRegClassID, 0) &&
10033 GETREGCLASS_CONTAIN(ARM_SPRRegClassID, 1)) {
10035 AsmString =
"vrinta.f32.f32 $\x01, $\x02";
10042 GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 0) &&
10044 GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 1)) {
10046 AsmString =
"vrintm.f64.f64 $\x01, $\x02";
10053 GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 0) &&
10055 GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 1)) {
10057 AsmString =
"vrintm.f32.f32 $\x01, $\x02";
10064 GETREGCLASS_CONTAIN(ARM_QPRRegClassID, 0) &&
10066 GETREGCLASS_CONTAIN(ARM_QPRRegClassID, 1)) {
10068 AsmString =
"vrintm.f32.f32 $\x01, $\x02";
10075 GETREGCLASS_CONTAIN(ARM_SPRRegClassID, 0) &&
10077 GETREGCLASS_CONTAIN(ARM_SPRRegClassID, 1)) {
10079 AsmString =
"vrintm.f32.f32 $\x01, $\x02";
10086 GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 0) &&
10088 GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 1)) {
10090 AsmString =
"vrintn.f64.f64 $\x01, $\x02";
10097 GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 0) &&
10099 GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 1)) {
10101 AsmString =
"vrintn.f32.f32 $\x01, $\x02";
10108 GETREGCLASS_CONTAIN(ARM_QPRRegClassID, 0) &&
10110 GETREGCLASS_CONTAIN(ARM_QPRRegClassID, 1)) {
10112 AsmString =
"vrintn.f32.f32 $\x01, $\x02";
10119 GETREGCLASS_CONTAIN(ARM_SPRRegClassID, 0) &&
10121 GETREGCLASS_CONTAIN(ARM_SPRRegClassID, 1)) {
10123 AsmString =
"vrintn.f32.f32 $\x01, $\x02";
10130 GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 0) &&
10132 GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 1)) {
10134 AsmString =
"vrintp.f64.f64 $\x01, $\x02";
10141 GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 0) &&
10143 GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 1)) {
10145 AsmString =
"vrintp.f32.f32 $\x01, $\x02";
10152 GETREGCLASS_CONTAIN(ARM_QPRRegClassID, 0) &&
10154 GETREGCLASS_CONTAIN(ARM_QPRRegClassID, 1)) {
10156 AsmString =
"vrintp.f32.f32 $\x01, $\x02";
10163 GETREGCLASS_CONTAIN(ARM_SPRRegClassID, 0) &&
10165 GETREGCLASS_CONTAIN(ARM_SPRRegClassID, 1)) {
10167 AsmString =
"vrintp.f32.f32 $\x01, $\x02";
10174 GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 0) &&
10176 GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 1)) {
10178 AsmString =
"vrintr$\xFF\x03\x01.f64.f64 $\x01, $\x02";
10185 GETREGCLASS_CONTAIN(ARM_SPRRegClassID, 0) &&
10187 GETREGCLASS_CONTAIN(ARM_SPRRegClassID, 1)) {
10189 AsmString =
"vrintr$\xFF\x03\x01.f32.f32 $\x01, $\x02";
10196 GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 0) &&
10198 GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 1)) {
10200 AsmString =
"vrintx$\xFF\x03\x01.f64.f64 $\x01, $\x02";
10207 GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 0) &&
10209 GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 1)) {
10211 AsmString =
"vrintx.f32.f32 $\x01, $\x02";
10218 GETREGCLASS_CONTAIN(ARM_QPRRegClassID, 0) &&
10220 GETREGCLASS_CONTAIN(ARM_QPRRegClassID, 1)) {
10222 AsmString =
"vrintx.f32.f32 $\x01, $\x02";
10229 GETREGCLASS_CONTAIN(ARM_SPRRegClassID, 0) &&
10231 GETREGCLASS_CONTAIN(ARM_SPRRegClassID, 1)) {
10233 AsmString =
"vrintx$\xFF\x03\x01.f32.f32 $\x01, $\x02";
10240 GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 0) &&
10242 GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 1)) {
10244 AsmString =
"vrintz$\xFF\x03\x01.f64.f64 $\x01, $\x02";
10251 GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 0) &&
10253 GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 1)) {
10255 AsmString =
"vrintz.f32.f32 $\x01, $\x02";
10262 GETREGCLASS_CONTAIN(ARM_QPRRegClassID, 0) &&
10264 GETREGCLASS_CONTAIN(ARM_QPRRegClassID, 1)) {
10266 AsmString =
"vrintz.f32.f32 $\x01, $\x02";
10273 GETREGCLASS_CONTAIN(ARM_SPRRegClassID, 0) &&
10275 GETREGCLASS_CONTAIN(ARM_SPRRegClassID, 1)) {
10277 AsmString =
"vrintz$\xFF\x03\x01.f32.f32 $\x01, $\x02";
10281 case ARM_VSETLNi32:
10284 GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 0) &&
10286 GETREGCLASS_CONTAIN(ARM_GPRRegClassID, 1) &&
10290 AsmString =
"fmdhr$\xFF\x04\x01 $\x01, $\x02";
10295 GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 0) &&
10297 GETREGCLASS_CONTAIN(ARM_GPRRegClassID, 1) &&
10301 AsmString =
"fmdlr$\xFF\x04\x01 $\x01, $\x02";
10308 GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 0) &&
10310 GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 1)) {
10312 AsmString =
"vsqrt$\xFF\x03\x01 $\x01, $\x02";
10319 GETREGCLASS_CONTAIN(ARM_SPRRegClassID, 0) &&
10321 GETREGCLASS_CONTAIN(ARM_SPRRegClassID, 1)) {
10323 AsmString =
"vsqrt$\xFF\x03\x01 $\x01, $\x02";
10330 GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 0)) {
10332 AsmString =
"vstr$\xFF\x04\x01.64 $\x01, $\xFF\x02\x08";
10339 GETREGCLASS_CONTAIN(ARM_SPRRegClassID, 0)) {
10341 AsmString =
"vstr$\xFF\x04\x01.32 $\x01, $\xFF\x02\x08";
10348 GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 0) &&
10350 GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 1) &&
10352 GETREGCLASS_CONTAIN(ARM_DPRRegClassID, 2)) {
10354 AsmString =
"fsubd$\xFF\x04\x01 $\x01, $\x02, $\x03";
10361 GETREGCLASS_CONTAIN(ARM_SPRRegClassID, 0) &&
10363 GETREGCLASS_CONTAIN(ARM_SPRRegClassID, 1) &&
10365 GETREGCLASS_CONTAIN(ARM_SPRRegClassID, 2)) {
10367 AsmString =
"fsubs$\xFF\x04\x01 $\x01, $\x02, $\x03";
10374 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0) &&
10376 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 1) &&
10378 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 2)) {
10380 AsmString =
"adc$\xFF\x06\x02$\xFF\x04\x01 $\x01, $\x02, $\x03";
10387 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0) &&
10389 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 1)) {
10391 AsmString =
"adc$\xFF\x07\x02$\xFF\x05\x01 $\x01, $\x02, $\xFF\x03\x0A";
10398 GETREGCLASS_CONTAIN(ARM_GPRnopcRegClassID, 0) &&
10400 GETREGCLASS_CONTAIN(ARM_GPRnopcRegClassID, 1)) {
10402 AsmString =
"add$\xFF\x06\x02$\xFF\x04\x01 $\x01, $\x02, $\x03";
10407 GETREGCLASS_CONTAIN(ARM_GPRnopcRegClassID, 0) &&
10411 AsmString =
"add$\xFF\x06\x02$\xFF\x04\x01 $\x01, $\x03";
10415 case ARM_t2ADDri12:
10418 GETREGCLASS_CONTAIN(ARM_GPRnopcRegClassID, 0) &&
10420 GETREGCLASS_CONTAIN(ARM_GPRRegClassID, 1)) {
10422 AsmString =
"add$\xFF\x04\x01 $\x01, $\x02, $\x03";
10427 GETREGCLASS_CONTAIN(ARM_GPRnopcRegClassID, 0) &&
10431 AsmString =
"add$\xFF\x04\x01 $\x01, $\x03";
10438 GETREGCLASS_CONTAIN(ARM_GPRnopcRegClassID, 0) &&
10440 GETREGCLASS_CONTAIN(ARM_GPRnopcRegClassID, 1) &&
10442 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 2)) {
10444 AsmString =
"add$\xFF\x06\x02$\xFF\x04\x01 $\x01, $\x02, $\x03";
10449 GETREGCLASS_CONTAIN(ARM_GPRnopcRegClassID, 0) &&
10453 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 2)) {
10455 AsmString =
"add$\xFF\x06\x02$\xFF\x04\x01 $\x01, $\x03";
10462 GETREGCLASS_CONTAIN(ARM_GPRnopcRegClassID, 0) &&
10464 GETREGCLASS_CONTAIN(ARM_GPRnopcRegClassID, 1)) {
10466 AsmString =
"add$\xFF\x07\x02$\xFF\x05\x01 $\x01, $\x02, $\xFF\x03\x0A";
10471 GETREGCLASS_CONTAIN(ARM_GPRnopcRegClassID, 0) &&
10475 AsmString =
"add$\xFF\x07\x02$\xFF\x05\x01 $\x01, $\xFF\x03\x0A";
10482 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0)) {
10484 AsmString =
"adr$\xFF\x03\x01 $\x01, $\xFF\x02\x0B";
10491 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0) &&
10493 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 1) &&
10495 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 2)) {
10497 AsmString =
"and$\xFF\x06\x02$\xFF\x04\x01 $\x01, $\x02, $\x03";
10504 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0) &&
10506 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 1)) {
10508 AsmString =
"and$\xFF\x07\x02$\xFF\x05\x01 $\x01, $\x02, $\xFF\x03\x0A";
10515 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0) &&
10517 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 1)) {
10519 AsmString =
"asr$\xFF\x06\x02$\xFF\x04\x01 $\x01, $\x02, $\xFF\x03\x0C";
10526 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0) &&
10528 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 1) &&
10530 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 2)) {
10532 AsmString =
"asr$\xFF\x06\x02$\xFF\x04\x01 $\x01, $\x02, $\x03";
10539 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0) &&
10541 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 1) &&
10543 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 2)) {
10545 AsmString =
"bic$\xFF\x06\x02$\xFF\x04\x01 $\x01, $\x02, $\x03";
10552 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0) &&
10554 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 1)) {
10556 AsmString =
"bic$\xFF\x07\x02$\xFF\x05\x01 $\x01, $\x02, $\xFF\x03\x0A";
10563 GETREGCLASS_CONTAIN(ARM_GPRnopcRegClassID, 0)) {
10565 AsmString =
"cmn$\xFF\x03\x01 $\x01, $\x02";
10570 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0)) {
10572 AsmString =
"cmp$\xFF\x03\x01 $\x01, $\x02";
10579 GETREGCLASS_CONTAIN(ARM_GPRnopcRegClassID, 0) &&
10581 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 1)) {
10583 AsmString =
"cmn$\xFF\x03\x01 $\x01, $\x02";
10590 GETREGCLASS_CONTAIN(ARM_GPRnopcRegClassID, 0)) {
10592 AsmString =
"cmn$\xFF\x04\x01 $\x01, $\xFF\x02\x0A";
10599 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0)) {
10601 AsmString =
"cmn$\xFF\x03\x01 $\x01, $\x02";
10606 GETREGCLASS_CONTAIN(ARM_GPRnopcRegClassID, 0)) {
10608 AsmString =
"cmp$\xFF\x03\x01 $\x01, $\x02";
10615 GETREGCLASS_CONTAIN(ARM_GPRnopcRegClassID, 0)) {
10617 AsmString =
"cmp$\xFF\x04\x01 $\x01, $\xFF\x02\x0A";
10626 AsmString =
"dmb$\xFF\x02\x01";
10635 AsmString =
"dsb$\xFF\x02\x01";
10642 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0) &&
10644 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 1)) {
10646 AsmString =
"eor$\xFF\x06\x02$\xFF\x04\x01.w $\x01, $\x02, $\x03";
10653 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0) &&
10655 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 1) &&
10657 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 2)) {
10659 AsmString =
"eor$\xFF\x06\x02$\xFF\x04\x01 $\x01, $\x02, $\x03";
10666 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0) &&
10668 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 1)) {
10670 AsmString =
"eor$\xFF\x07\x02$\xFF\x05\x01 $\x01, $\x02, $\xFF\x03\x0A";
10677 AsmString =
"hint$\xFF\x02\x01 $\x01";
10684 AsmString =
"nop$\xFF\x02\x01.w";
10691 AsmString =
"yield$\xFF\x02\x01.w";
10698 AsmString =
"wfe$\xFF\x02\x01.w";
10705 AsmString =
"wfi$\xFF\x02\x01.w";
10712 AsmString =
"sev$\xFF\x02\x01.w";
10719 AsmString =
"sevl$\xFF\x02\x01.w";
10726 AsmString =
"hvc $\x01";
10735 AsmString =
"isb$\xFF\x02\x01";
10742 GETREGCLASS_CONTAIN(ARM_GPRRegClassID, 0)) {
10744 AsmString =
"ldmdb$\xFF\x02\x01.w $\x01, $\xFF\x04\x04";
10748 case ARM_t2LDMDB_UPD:
10751 GETREGCLASS_CONTAIN(ARM_GPRRegClassID, 0)) {
10753 AsmString =
"ldmdb$\xFF\x02\x01.w $\x01!, $\xFF\x04\x04";
10760 GETREGCLASS_CONTAIN(ARM_GPRRegClassID, 0)) {
10762 AsmString =
"ldm$\xFF\x02\x01 $\x01, $\xFF\x04\x04";
10766 case ARM_t2LDMIA_UPD:
10769 GETREGCLASS_CONTAIN(ARM_GPRRegClassID, 0)) {
10771 AsmString =
"ldm$\xFF\x02\x01 $\x01!, $\xFF\x04\x04";
10775 case ARM_t2LDRBi12:
10778 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0)) {
10780 AsmString =
"ldrb$\xFF\x04\x01 $\x01, $\xFF\x02\x0D";
10784 case ARM_t2LDRBpci:
10787 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0)) {
10789 AsmString =
"ldrb$\xFF\x03\x01 $\x01, $\xFF\x02\x0E";
10793 case ARM_t2LDRBpcrel:
10796 GETREGCLASS_CONTAIN(ARM_GPRnopcRegClassID, 0)) {
10798 AsmString =
"ldrb$\xFF\x03\x01.w $\x01, $\x02";
10805 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0)) {
10807 AsmString =
"ldrb$\xFF\x05\x01 $\x01, $\xFF\x02\x0F";
10811 case ARM_t2LDRHi12:
10814 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0)) {
10816 AsmString =
"ldrh$\xFF\x04\x01 $\x01, $\xFF\x02\x0D";
10820 case ARM_t2LDRHpci:
10823 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0)) {
10825 AsmString =
"ldrh$\xFF\x03\x01 $\x01, $\xFF\x02\x0E";
10829 case ARM_t2LDRHpcrel:
10832 GETREGCLASS_CONTAIN(ARM_GPRnopcRegClassID, 0)) {
10834 AsmString =
"ldrh$\xFF\x03\x01.w $\x01, $\x02";
10841 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0)) {
10843 AsmString =
"ldrh$\xFF\x05\x01 $\x01, $\xFF\x02\x0F";
10847 case ARM_t2LDRSBi12:
10850 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0)) {
10852 AsmString =
"ldrsb$\xFF\x04\x01 $\x01, $\xFF\x02\x0D";
10856 case ARM_t2LDRSBpci:
10859 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0)) {
10861 AsmString =
"ldrsb$\xFF\x03\x01 $\x01, $\xFF\x02\x0E";
10865 case ARM_t2LDRSBpcrel:
10868 GETREGCLASS_CONTAIN(ARM_GPRnopcRegClassID, 0)) {
10870 AsmString =
"ldrsb$\xFF\x03\x01.w $\x01, $\x02";
10877 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0)) {
10879 AsmString =
"ldrsb$\xFF\x05\x01 $\x01, $\xFF\x02\x0F";
10883 case ARM_t2LDRSHi12:
10886 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0)) {
10888 AsmString =
"ldrsh$\xFF\x04\x01 $\x01, $\xFF\x02\x0D";
10892 case ARM_t2LDRSHpci:
10895 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0)) {
10897 AsmString =
"ldrsh$\xFF\x03\x01 $\x01, $\xFF\x02\x0E";
10901 case ARM_t2LDRSHpcrel:
10904 GETREGCLASS_CONTAIN(ARM_GPRnopcRegClassID, 0)) {
10906 AsmString =
"ldrsh$\xFF\x03\x01.w $\x01, $\x02";
10913 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0)) {
10915 AsmString =
"ldrsh$\xFF\x05\x01 $\x01, $\xFF\x02\x0F";
10922 GETREGCLASS_CONTAIN(ARM_GPRRegClassID, 0)) {
10924 AsmString =
"ldr$\xFF\x04\x01 $\x01, $\xFF\x02\x0D";
10931 GETREGCLASS_CONTAIN(ARM_GPRnopcRegClassID, 0)) {
10933 AsmString =
"ldr$\xFF\x03\x01 $\x01, $\xFF\x02\x0E";
10940 GETREGCLASS_CONTAIN(ARM_GPRRegClassID, 0)) {
10942 AsmString =
"ldr$\xFF\x05\x01 $\x01, $\xFF\x02\x0F";
10949 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0) &&
10951 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 1)) {
10953 AsmString =
"lsl$\xFF\x06\x02$\xFF\x04\x01 $\x01, $\x02, $\x03";
10960 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0) &&
10962 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 1) &&
10964 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 2)) {
10966 AsmString =
"lsl$\xFF\x06\x02$\xFF\x04\x01 $\x01, $\x02, $\x03";
10973 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0) &&
10975 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 1)) {
10977 AsmString =
"lsr$\xFF\x06\x02$\xFF\x04\x01 $\x01, $\x02, $\xFF\x03\x0C";
10984 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0) &&
10986 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 1) &&
10988 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 2)) {
10990 AsmString =
"lsr$\xFF\x06\x02$\xFF\x04\x01 $\x01, $\x02, $\x03";
10997 GETREGCLASS_CONTAIN(ARM_GPRRegClassID, 2) &&
11001 AsmString =
"mcr$\xFF\x07\x01 $\xFF\x01\x05, $\x02, $\x03, $\xFF\x04\x06, $\xFF\x05\x06";
11008 GETREGCLASS_CONTAIN(ARM_GPRRegClassID, 2) &&
11012 AsmString =
"mcr2$\xFF\x07\x01 $\xFF\x01\x05, $\x02, $\x03, $\xFF\x04\x06, $\xFF\x05\x06";
11019 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0)) {
11021 AsmString =
"mov$\xFF\x03\x01 $\x01, $\x02";
11028 GETREGCLASS_CONTAIN(ARM_GPRwithAPSRRegClassID, 0) &&
11032 AsmString =
"mrc$\xFF\x07\x01 $\xFF\x02\x05, $\x03, $\x01, $\xFF\x04\x06, $\xFF\x05\x06";
11039 GETREGCLASS_CONTAIN(ARM_GPRwithAPSRRegClassID, 0) &&
11043 AsmString =
"mrc2$\xFF\x07\x01 $\xFF\x02\x05, $\x03, $\x01, $\xFF\x04\x06, $\xFF\x05\x06";
11050 GETREGCLASS_CONTAIN(ARM_GPRRegClassID, 0)) {
11052 AsmString =
"mrs$\xFF\x02\x01 $\x01, cpsr";
11059 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0) &&
11061 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 1) &&
11065 AsmString =
"mul$\xFF\x04\x01 $\x01, $\x02";
11072 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0)) {
11074 AsmString =
"mvn$\xFF\x05\x02$\xFF\x03\x01.w $\x01, $\x02";
11081 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0) &&
11083 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 1)) {
11085 AsmString =
"mvn$\xFF\x05\x02$\xFF\x03\x01 $\x01, $\x02";
11092 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0)) {
11094 AsmString =
"mvn$\xFF\x06\x02$\xFF\x04\x01 $\x01, $\xFF\x02\x0A";
11101 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0) &&
11105 AsmString =
"orn$\xFF\x06\x02$\xFF\x04\x01 $\x01, $\x03";
11112 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0) &&
11116 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 2)) {
11118 AsmString =
"orn$\xFF\x06\x02$\xFF\x04\x01 $\x01, $\x03";
11125 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0) &&
11129 AsmString =
"orn$\xFF\x07\x02$\xFF\x05\x01 $\x01, $\xFF\x03\x0A";
11136 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0) &&
11138 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 1)) {
11140 AsmString =
"orr$\xFF\x06\x02$\xFF\x04\x01.w $\x01, $\x02, $\x03";
11147 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0) &&
11149 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 1) &&
11151 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 2)) {
11153 AsmString =
"orr$\xFF\x06\x02$\xFF\x04\x01 $\x01, $\x02, $\x03";
11160 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0) &&
11162 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 1)) {
11164 AsmString =
"orr$\xFF\x07\x02$\xFF\x05\x01 $\x01, $\x02, $\xFF\x03\x0A";
11171 AsmString =
"pld$\xFF\x02\x01 $\x01";
11178 AsmString =
"pli$\xFF\x02\x01 $\x01";
11185 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0) &&
11187 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 1)) {
11189 AsmString =
"rev$\xFF\x03\x01 $\x01, $\x02";
11196 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0) &&
11198 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 1)) {
11200 AsmString =
"rev16$\xFF\x03\x01 $\x01, $\x02";
11207 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0) &&
11209 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 1)) {
11211 AsmString =
"revsh$\xFF\x03\x01 $\x01, $\x02";
11218 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0) &&
11220 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 1)) {
11222 AsmString =
"ror$\xFF\x06\x02$\xFF\x04\x01 $\x01, $\x02, $\x03";
11229 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0) &&
11231 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 1) &&
11233 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 2)) {
11235 AsmString =
"ror$\xFF\x06\x02$\xFF\x04\x01 $\x01, $\x02, $\x03";
11242 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0) &&
11244 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 1)) {
11246 AsmString =
"rsb$\xFF\x06\x02$\xFF\x04\x01 $\x01, $\x02, $\x03";
11251 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0) &&
11255 AsmString =
"rsb$\xFF\x06\x02$\xFF\x04\x01 $\x01, $\x03";
11260 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0) &&
11262 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 1) &&
11266 AsmString =
"neg$\xFF\x06\x02$\xFF\x04\x01 $\x01, $\x02";
11273 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0) &&
11277 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 2)) {
11279 AsmString =
"rsb$\xFF\x06\x02$\xFF\x04\x01 $\x01, $\x03";
11286 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0) &&
11290 AsmString =
"rsb$\xFF\x07\x02$\xFF\x05\x01 $\x01, $\xFF\x03\x0A";
11297 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0) &&
11299 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 1) &&
11301 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 2)) {
11303 AsmString =
"sbc$\xFF\x06\x02$\xFF\x04\x01 $\x01, $\x02, $\x03";
11310 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0) &&
11312 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 1)) {
11314 AsmString =
"sbc$\xFF\x07\x02$\xFF\x05\x01 $\x01, $\x02, $\xFF\x03\x0A";
11321 AsmString =
"srsdb$\xFF\x02\x01 $\x01";
11325 case ARM_t2SRSDB_UPD:
11328 AsmString =
"srsdb$\xFF\x02\x01 $\x01!";
11335 AsmString =
"srsia$\xFF\x02\x01 $\x01";
11339 case ARM_t2SRSIA_UPD:
11342 AsmString =
"srsia$\xFF\x02\x01 $\x01!";
11349 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0) &&
11351 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 2) &&
11355 AsmString =
"ssat$\xFF\x05\x01 $\x01, $\xFF\x02\x07, $\x03";
11362 GETREGCLASS_CONTAIN(ARM_GPRRegClassID, 0)) {
11364 AsmString =
"stmdb$\xFF\x02\x01.w $\x01, $\xFF\x04\x04";
11368 case ARM_t2STMDB_UPD:
11371 GETREGCLASS_CONTAIN(ARM_GPRRegClassID, 0)) {
11373 AsmString =
"stmdb$\xFF\x02\x01.w $\x01!, $\xFF\x04\x04";
11377 case ARM_t2STMIA_UPD:
11380 GETREGCLASS_CONTAIN(ARM_GPRRegClassID, 0)) {
11382 AsmString =
"stm$\xFF\x02\x01 $\x01!, $\xFF\x04\x04";
11386 case ARM_t2STRBi12:
11389 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0)) {
11391 AsmString =
"strb$\xFF\x04\x01 $\x01, $\xFF\x02\x0D";
11398 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0)) {
11400 AsmString =
"strb$\xFF\x05\x01 $\x01, $\xFF\x02\x0F";
11404 case ARM_t2STRHi12:
11407 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0)) {
11409 AsmString =
"strh$\xFF\x04\x01 $\x01, $\xFF\x02\x0D";
11416 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0)) {
11418 AsmString =
"strh$\xFF\x05\x01 $\x01, $\xFF\x02\x0F";
11425 GETREGCLASS_CONTAIN(ARM_GPRRegClassID, 0)) {
11427 AsmString =
"str$\xFF\x04\x01 $\x01, $\xFF\x02\x0D";
11434 GETREGCLASS_CONTAIN(ARM_GPRRegClassID, 0)) {
11436 AsmString =
"str$\xFF\x05\x01 $\x01, $\xFF\x02\x0F";
11440 case ARM_t2SUBS_PC_LR:
11445 AsmString =
"eret$\xFF\x02\x01";
11452 GETREGCLASS_CONTAIN(ARM_GPRnopcRegClassID, 0) &&
11454 GETREGCLASS_CONTAIN(ARM_GPRnopcRegClassID, 1) &&
11456 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 2)) {
11458 AsmString =
"sub$\xFF\x06\x02$\xFF\x04\x01 $\x01, $\x02, $\x03";
11465 GETREGCLASS_CONTAIN(ARM_GPRnopcRegClassID, 0) &&
11467 GETREGCLASS_CONTAIN(ARM_GPRnopcRegClassID, 1)) {
11469 AsmString =
"sub$\xFF\x07\x02$\xFF\x05\x01 $\x01, $\x02, $\xFF\x03\x0A";
11474 GETREGCLASS_CONTAIN(ARM_GPRnopcRegClassID, 0) &&
11478 AsmString =
"sub$\xFF\x07\x02$\xFF\x05\x01 $\x01, $\xFF\x03\x0A";
11485 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0) &&
11487 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 1) &&
11489 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 2) &&
11493 AsmString =
"sxtab$\xFF\x05\x01 $\x01, $\x02, $\x03";
11497 case ARM_t2SXTAB16:
11500 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0) &&
11502 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 1) &&
11504 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 2) &&
11508 AsmString =
"sxtab16$\xFF\x05\x01 $\x01, $\x02, $\x03";
11515 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0) &&
11517 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 1) &&
11519 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 2) &&
11523 AsmString =
"sxtah$\xFF\x05\x01 $\x01, $\x02, $\x03";
11530 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0) &&
11532 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 1)) {
11534 AsmString =
"sxtb$\xFF\x04\x01 $\x01, $\x02$\xFF\x03\x10";
11541 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0) &&
11543 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 1) &&
11547 AsmString =
"sxtb16$\xFF\x04\x01 $\x01, $\x02";
11552 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0) &&
11554 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 1)) {
11556 AsmString =
"sxtb16$\xFF\x04\x01 $\x01, $\x02$\xFF\x03\x10";
11563 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0) &&
11565 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 1)) {
11567 AsmString =
"sxth$\xFF\x04\x01 $\x01, $\x02$\xFF\x03\x10";
11574 GETREGCLASS_CONTAIN(ARM_GPRnopcRegClassID, 0)) {
11576 AsmString =
"teq$\xFF\x03\x01 $\x01, $\x02";
11583 GETREGCLASS_CONTAIN(ARM_GPRnopcRegClassID, 0) &&
11585 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 1)) {
11587 AsmString =
"teq$\xFF\x03\x01 $\x01, $\x02";
11594 GETREGCLASS_CONTAIN(ARM_GPRnopcRegClassID, 0)) {
11596 AsmString =
"teq$\xFF\x04\x01 $\x01, $\xFF\x02\x0A";
11603 GETREGCLASS_CONTAIN(ARM_GPRnopcRegClassID, 0)) {
11605 AsmString =
"tst$\xFF\x03\x01 $\x01, $\x02";
11612 GETREGCLASS_CONTAIN(ARM_GPRnopcRegClassID, 0) &&
11614 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 1)) {
11616 AsmString =
"tst$\xFF\x03\x01 $\x01, $\x02";
11623 GETREGCLASS_CONTAIN(ARM_GPRnopcRegClassID, 0)) {
11625 AsmString =
"tst$\xFF\x04\x01 $\x01, $\xFF\x02\x0A";
11632 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0) &&
11634 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 2) &&
11638 AsmString =
"usat$\xFF\x05\x01 $\x01, $\x02, $\x03";
11645 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0) &&
11647 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 1) &&
11649 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 2) &&
11653 AsmString =
"uxtab$\xFF\x05\x01 $\x01, $\x02, $\x03";
11657 case ARM_t2UXTAB16:
11660 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0) &&
11662 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 1) &&
11664 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 2) &&
11668 AsmString =
"uxtab16$\xFF\x05\x01 $\x01, $\x02, $\x03";
11675 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0) &&
11677 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 1) &&
11679 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 2) &&
11683 AsmString =
"uxtah$\xFF\x05\x01 $\x01, $\x02, $\x03";
11690 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0) &&
11692 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 1)) {
11694 AsmString =
"uxtb$\xFF\x04\x01 $\x01, $\x02$\xFF\x03\x10";
11701 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0) &&
11703 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 1) &&
11707 AsmString =
"uxtb16$\xFF\x04\x01 $\x01, $\x02";
11712 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0) &&
11714 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 1)) {
11716 AsmString =
"uxtb16$\xFF\x04\x01 $\x01, $\x02$\xFF\x03\x10";
11723 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 0) &&
11725 GETREGCLASS_CONTAIN(ARM_rGPRRegClassID, 1)) {
11727 AsmString =
"uxth$\xFF\x04\x01 $\x01, $\x02$\xFF\x03\x10";
11734 GETREGCLASS_CONTAIN(ARM_tGPRRegClassID, 0) &&
11738 AsmString =
"asr$\xFF\x02\x02$\xFF\x05\x01 $\x01, $\xFF\x04\x0C";
11747 AsmString =
"bkpt";
11756 AsmString =
"nop$\xFF\x02\x01";
11763 AsmString =
"yield$\xFF\x02\x01";
11770 AsmString =
"wfe$\xFF\x02\x01";
11777 AsmString =
"wfi$\xFF\x02\x01";
11784 AsmString =
"sev$\xFF\x02\x01";
11791 AsmString =
"sevl$\xFF\x02\x01";
11798 GETREGCLASS_CONTAIN(ARM_tGPRRegClassID, 0)) {
11800 AsmString =
"ldm$\xFF\x02\x01 $\x01!, $\xFF\x04\x04";
11807 GETREGCLASS_CONTAIN(ARM_tGPRRegClassID, 0) &&
11811 AsmString =
"lsl$\xFF\x02\x02$\xFF\x05\x01 $\x01, $\x04";
11818 GETREGCLASS_CONTAIN(ARM_tGPRRegClassID, 0) &&
11822 AsmString =
"lsr$\xFF\x02\x02$\xFF\x05\x01 $\x01, $\xFF\x04\x0C";
11829 GETREGCLASS_CONTAIN(ARM_tGPRRegClassID, 0) &&
11836 AsmString =
"movs $\x01, $\x03";
11856 GETREGCLASS_CONTAIN(ARM_tGPRRegClassID, 0) &&
11858 GETREGCLASS_CONTAIN(ARM_tGPRRegClassID, 2)) {
11860 AsmString =
"mul$\xFF\x02\x02$\xFF\x04\x01 $\x01, $\x03";
11867 GETREGCLASS_CONTAIN(ARM_tGPRRegClassID, 0) &&
11869 GETREGCLASS_CONTAIN(ARM_tGPRRegClassID, 2)) {
11871 AsmString =
"neg$\xFF\x02\x02$\xFF\x04\x01 $\x01, $\x03";
11879 AsmString =
"add$\xFF\x03\x01 sp, $\x02";
11887 for(AsmOps =
tmp; *AsmOps; AsmOps++) {
11888 if (*AsmOps ==
' ' || *AsmOps ==
'\t') {
11898 for (
c = AsmOps; *
c;
c++) {
11901 if (*
c == (
char)0xff) {
11905 PrintMethodIdx = *
c - 1;
11906 printCustomAliasOperand(MI, OpIdx, PrintMethodIdx,
OS);
11908 printOperand(MI, *
c - 1,
OS);
void ARM_addVectorDataType(MCInst *MI, arm_vectordata_type vd)
void ARM_addVectorDataSize(MCInst *MI, int size)
void ARM_addReg(MCInst *MI, int reg)
void ARM_addUserMode(MCInst *MI)
unsigned MCInst_getOpcode(const MCInst *inst)
unsigned MCInst_getNumOperands(const MCInst *inst)
MCOperand * MCInst_getOperand(MCInst *inst, unsigned i)
bool MCOperand_isReg(const MCOperand *op)
int64_t MCOperand_getImm(MCOperand *op)
unsigned MCOperand_getReg(const MCOperand *op)
getReg - Returns the register number.
bool MCOperand_isImm(const MCOperand *op)
void SStream_concat(SStream *ss, const char *fmt,...)
void SStream_concat0(SStream *ss, const char *s)
void op_addImm(MCInst *MI, int v)
RzBinInfo * info(RzBinFile *bf)
char * cs_strdup(const char *str)
1.9.1