Rizin
unix-like reverse engineering framework and cli tools
AArch64MappingInsnOp.inc
Go to the documentation of this file.
1 { /* AArch64_ABSv16i8, ARM64_INS_ABS: abs.16b $rd, $rn */
2  0,
3  { CS_AC_WRITE, CS_AC_READ, 0 }
4 },
5 { /* AArch64_ABSv1i64, ARM64_INS_ABS: abs $rd, $rn */
6  0,
7  { CS_AC_WRITE, CS_AC_READ, 0 }
8 },
9 { /* AArch64_ABSv2i32, ARM64_INS_ABS: abs.2s $rd, $rn */
10  0,
11  { CS_AC_WRITE, CS_AC_READ, 0 }
12 },
13 { /* AArch64_ABSv2i64, ARM64_INS_ABS: abs.2d $rd, $rn */
14  0,
15  { CS_AC_WRITE, CS_AC_READ, 0 }
16 },
17 { /* AArch64_ABSv4i16, ARM64_INS_ABS: abs.4h $rd, $rn */
18  0,
19  { CS_AC_WRITE, CS_AC_READ, 0 }
20 },
21 { /* AArch64_ABSv4i32, ARM64_INS_ABS: abs.4s $rd, $rn */
22  0,
23  { CS_AC_WRITE, CS_AC_READ, 0 }
24 },
25 { /* AArch64_ABSv8i16, ARM64_INS_ABS: abs.8h $rd, $rn */
26  0,
27  { CS_AC_WRITE, CS_AC_READ, 0 }
28 },
29 { /* AArch64_ABSv8i8, ARM64_INS_ABS: abs.8b $rd, $rn */
30  0,
31  { CS_AC_WRITE, CS_AC_READ, 0 }
32 },
33 { /* AArch64_ADCSWr, ARM64_INS_ADCS: adcs $rd, $rn, $rm */
34  0,
36 },
37 { /* AArch64_ADCSXr, ARM64_INS_ADCS: adcs $rd, $rn, $rm */
38  0,
40 },
41 { /* AArch64_ADCWr, ARM64_INS_ADC: adc $rd, $rn, $rm */
42  0,
44 },
45 { /* AArch64_ADCXr, ARM64_INS_ADC: adc $rd, $rn, $rm */
46  0,
48 },
49 { /* AArch64_ADDHNv2i64_v2i32, ARM64_INS_ADDHN: addhn.2s $rd, $rn, $rm */
50  0,
52 },
53 { /* AArch64_ADDHNv2i64_v4i32, ARM64_INS_ADDHN2: addhn2.4s $rd, $rn, $rm */
54  0,
56 },
57 { /* AArch64_ADDHNv4i32_v4i16, ARM64_INS_ADDHN: addhn.4h $rd, $rn, $rm */
58  0,
60 },
61 { /* AArch64_ADDHNv4i32_v8i16, ARM64_INS_ADDHN2: addhn2.8h $rd, $rn, $rm */
62  0,
64 },
65 { /* AArch64_ADDHNv8i16_v16i8, ARM64_INS_ADDHN2: addhn2.16b $rd, $rn, $rm */
66  0,
68 },
69 { /* AArch64_ADDHNv8i16_v8i8, ARM64_INS_ADDHN: addhn.8b $rd, $rn, $rm */
70  0,
72 },
73 { /* AArch64_ADDPv16i8, ARM64_INS_ADDP: addp.16b $rd, $rn, $rm| */
74  0,
76 },
77 { /* AArch64_ADDPv2i32, ARM64_INS_ADDP: addp.2s $rd, $rn, $rm| */
78  0,
80 },
81 { /* AArch64_ADDPv2i64, ARM64_INS_ADDP: addp.2d $rd, $rn, $rm| */
82  0,
84 },
85 { /* AArch64_ADDPv2i64p, ARM64_INS_ADDP: addp.2d $rd, $rn */
86  0,
87  { CS_AC_WRITE, CS_AC_READ, 0 }
88 },
89 { /* AArch64_ADDPv4i16, ARM64_INS_ADDP: addp.4h $rd, $rn, $rm| */
90  0,
92 },
93 { /* AArch64_ADDPv4i32, ARM64_INS_ADDP: addp.4s $rd, $rn, $rm| */
94  0,
96 },
97 { /* AArch64_ADDPv8i16, ARM64_INS_ADDP: addp.8h $rd, $rn, $rm| */
98  0,
100 },
101 { /* AArch64_ADDPv8i8, ARM64_INS_ADDP: addp.8b $rd, $rn, $rm| */
102  0,
104 },
105 { /* AArch64_ADDSWri, ARM64_INS_ADDS: adds $rd, $rn, $imm */
106  0,
108 },
109 { /* AArch64_ADDSWrs, ARM64_INS_ADDS: adds $rd, $rn, $rm */
110  0,
112 },
113 { /* AArch64_ADDSWrx, ARM64_INS_ADDS: adds $r1, $r2, $r3 */
114  0,
116 },
117 { /* AArch64_ADDSXri, ARM64_INS_ADDS: adds $rd, $rn, $imm */
118  0,
120 },
121 { /* AArch64_ADDSXrs, ARM64_INS_ADDS: adds $rd, $rn, $rm */
122  0,
124 },
125 { /* AArch64_ADDSXrx, ARM64_INS_ADDS: adds $r1, $r2, $r3 */
126  0,
128 },
129 { /* AArch64_ADDSXrx64, ARM64_INS_ADDS: adds $rd, $rn, $rm$ext */
130  0,
132 },
133 { /* AArch64_ADDVv16i8v, ARM64_INS_ADDV: addv.16b $rd, $rn */
134  0,
135  { CS_AC_WRITE, CS_AC_READ, 0 }
136 },
137 { /* AArch64_ADDVv4i16v, ARM64_INS_ADDV: addv.4h $rd, $rn */
138  0,
139  { CS_AC_WRITE, CS_AC_READ, 0 }
140 },
141 { /* AArch64_ADDVv4i32v, ARM64_INS_ADDV: addv.4s $rd, $rn */
142  0,
143  { CS_AC_WRITE, CS_AC_READ, 0 }
144 },
145 { /* AArch64_ADDVv8i16v, ARM64_INS_ADDV: addv.8h $rd, $rn */
146  0,
147  { CS_AC_WRITE, CS_AC_READ, 0 }
148 },
149 { /* AArch64_ADDVv8i8v, ARM64_INS_ADDV: addv.8b $rd, $rn */
150  0,
151  { CS_AC_WRITE, CS_AC_READ, 0 }
152 },
153 { /* AArch64_ADDWri, ARM64_INS_ADD: add $rd, $rn, $imm */
154  0,
156 },
157 { /* AArch64_ADDWrs, ARM64_INS_ADD: add $rd, $rn, $rm */
158  0,
160 },
161 { /* AArch64_ADDWrx, ARM64_INS_ADD: add $r1, $r2, $r3 */
162  0,
164 },
165 { /* AArch64_ADDXri, ARM64_INS_ADD: add $rd, $rn, $imm */
166  0,
168 },
169 { /* AArch64_ADDXrs, ARM64_INS_ADD: add $rd, $rn, $rm */
170  0,
172 },
173 { /* AArch64_ADDXrx, ARM64_INS_ADD: add $r1, $r2, $r3 */
174  0,
176 },
177 { /* AArch64_ADDXrx64, ARM64_INS_ADD: add $rd, $rn, $rm$ext */
178  0,
180 },
181 { /* AArch64_ADDv16i8, ARM64_INS_ADD: add.16b $rd, $rn, $rm| */
182  0,
184 },
185 { /* AArch64_ADDv1i64, ARM64_INS_ADD: add $rd, $rn, $rm */
186  0,
188 },
189 { /* AArch64_ADDv2i32, ARM64_INS_ADD: add.2s $rd, $rn, $rm| */
190  0,
192 },
193 { /* AArch64_ADDv2i64, ARM64_INS_ADD: add.2d $rd, $rn, $rm| */
194  0,
196 },
197 { /* AArch64_ADDv4i16, ARM64_INS_ADD: add.4h $rd, $rn, $rm| */
198  0,
200 },
201 { /* AArch64_ADDv4i32, ARM64_INS_ADD: add.4s $rd, $rn, $rm| */
202  0,
204 },
205 { /* AArch64_ADDv8i16, ARM64_INS_ADD: add.8h $rd, $rn, $rm| */
206  0,
208 },
209 { /* AArch64_ADDv8i8, ARM64_INS_ADD: add.8b $rd, $rn, $rm| */
210  0,
212 },
213 { /* AArch64_ADR, ARM64_INS_ADR: adr $xd, $label */
214  0,
215  { CS_AC_WRITE, CS_AC_READ, 0 }
216 },
217 { /* AArch64_ADRP, ARM64_INS_ADRP: adrp $xd, $label */
218  0,
219  { CS_AC_WRITE, CS_AC_READ, 0 }
220 },
221 { /* AArch64_AESDrr, ARM64_INS_AESD: aesd.16b $rd, $rn */
222  0,
224 },
225 { /* AArch64_AESErr, ARM64_INS_AESE: aese.16b $rd, $rn */
226  0,
228 },
229 { /* AArch64_AESIMCrr, ARM64_INS_AESIMC: aesimc.16b $rd, $rn */
230  0,
232 },
233 { /* AArch64_AESMCrr, ARM64_INS_AESMC: aesmc.16b $rd, $rn */
234  0,
236 },
237 { /* AArch64_ANDSWri, ARM64_INS_ANDS: ands $rd, $rn, $imm */
238  0,
240 },
241 { /* AArch64_ANDSWrs, ARM64_INS_ANDS: ands $rd, $rn, $rm */
242  0,
244 },
245 { /* AArch64_ANDSXri, ARM64_INS_ANDS: ands $rd, $rn, $imm */
246  0,
248 },
249 { /* AArch64_ANDSXrs, ARM64_INS_ANDS: ands $rd, $rn, $rm */
250  0,
252 },
253 { /* AArch64_ANDWri, ARM64_INS_AND: and $rd, $rn, $imm */
254  0,
256 },
257 { /* AArch64_ANDWrs, ARM64_INS_AND: and $rd, $rn, $rm */
258  0,
260 },
261 { /* AArch64_ANDXri, ARM64_INS_AND: and $rd, $rn, $imm */
262  0,
264 },
265 { /* AArch64_ANDXrs, ARM64_INS_AND: and $rd, $rn, $rm */
266  0,
268 },
269 { /* AArch64_ANDv16i8, ARM64_INS_AND: and.16b $rd, $rn, $rm| */
270  0,
272 },
273 { /* AArch64_ANDv8i8, ARM64_INS_AND: and.8b $rd, $rn, $rm| */
274  0,
276 },
277 { /* AArch64_ASRVWr, ARM64_INS_ASR: asr $rd, $rn, $rm */
278  0,
280 },
281 { /* AArch64_ASRVXr, ARM64_INS_ASR: asr $rd, $rn, $rm */
282  0,
284 },
285 { /* AArch64_B, ARM64_INS_B: b $addr */
286  0,
287  { CS_AC_READ, 0 }
288 },
289 { /* AArch64_BFMWri, ARM64_INS_BFM: bfm $rd, $rn, $immr, $imms */
290  0,
292 },
293 { /* AArch64_BFMXri, ARM64_INS_BFM: bfm $rd, $rn, $immr, $imms */
294  0,
296 },
297 { /* AArch64_BICSWrs, ARM64_INS_BICS: bics $rd, $rn, $rm */
298  0,
300 },
301 { /* AArch64_BICSXrs, ARM64_INS_BICS: bics $rd, $rn, $rm */
302  0,
304 },
305 { /* AArch64_BICWrs, ARM64_INS_BIC: bic $rd, $rn, $rm */
306  0,
308 },
309 { /* AArch64_BICXrs, ARM64_INS_BIC: bic $rd, $rn, $rm */
310  0,
312 },
313 { /* AArch64_BICv16i8, ARM64_INS_BIC: bic.16b $rd, $rn, $rm| */
314  0,
316 },
317 { /* AArch64_BICv2i32, ARM64_INS_BIC: bic.2s $rd, $imm8$shift */
318  0,
319  { CS_AC_WRITE, CS_AC_READ, 0 }
320 },
321 { /* AArch64_BICv4i16, ARM64_INS_BIC: bic.4h $rd, $imm8$shift */
322  0,
323  { CS_AC_WRITE, CS_AC_READ, 0 }
324 },
325 { /* AArch64_BICv4i32, ARM64_INS_BIC: bic.4s $rd, $imm8$shift */
326  0,
327  { CS_AC_WRITE, CS_AC_READ, 0 }
328 },
329 { /* AArch64_BICv8i16, ARM64_INS_BIC: bic.8h $rd, $imm8$shift */
330  0,
331  { CS_AC_WRITE, CS_AC_READ, 0 }
332 },
333 { /* AArch64_BICv8i8, ARM64_INS_BIC: bic.8b $rd, $rn, $rm| */
334  0,
335  { CS_AC_WRITE, CS_AC_READ, 0 }
336 },
337 { /* AArch64_BIFv16i8, ARM64_INS_BIF: bif.16b $rd, $rn, $rm| */
338  0,
340 },
341 { /* AArch64_BIFv8i8, ARM64_INS_BIF: bif.8b $rd, $rn, $rm| */
342  0,
344 },
345 { /* AArch64_BITv16i8, ARM64_INS_BIT: bit.16b $rd, $rn, $rm */
346  0,
348 },
349 { /* AArch64_BITv8i8, ARM64_INS_BIT: bit.8b $rd, $rn, $rm */
350  0,
352 },
353 { /* AArch64_BL, ARM64_INS_BL: bl $addr */
354  0,
355  { CS_AC_READ, 0 }
356 },
357 { /* AArch64_BLR, ARM64_INS_BLR: blr $rn */
358  0,
359  { CS_AC_READ, 0 }
360 },
361 { /* AArch64_BR, ARM64_INS_BR: br $rn */
362  0,
363  { CS_AC_READ, 0 }
364 },
365 { /* AArch64_BRK, ARM64_INS_BRK: brk $imm */
366  0,
367  { CS_AC_READ, 0 }
368 },
369 { /* AArch64_BSLv16i8, ARM64_INS_BSL: bsl.16b $rd, $rn, $rm */
370  0,
372 },
373 { /* AArch64_BSLv8i8, ARM64_INS_BSL: bsl.8b $rd, $rn, $rm */
374  0,
376 },
377 { /* AArch64_Bcc, ARM64_INS_B: b.$cond $target */
378  0,
379  { CS_AC_READ, 0 }
380 },
381 { /* AArch64_CBNZW, ARM64_INS_CBNZ: cbnz $rt, $target */
382  0,
383  { CS_AC_READ, CS_AC_READ, 0 }
384 },
385 { /* AArch64_CBNZX, ARM64_INS_CBNZ: cbnz $rt, $target */
386  0,
387  { CS_AC_READ, CS_AC_READ, 0 }
388 },
389 { /* AArch64_CBZW, ARM64_INS_CBZ: cbz $rt, $target */
390  0,
391  { CS_AC_READ, CS_AC_READ, 0 }
392 },
393 { /* AArch64_CBZX, ARM64_INS_CBZ: cbz $rt, $target */
394  0,
395  { CS_AC_READ, CS_AC_READ, 0 }
396 },
397 { /* AArch64_CCMNWi, ARM64_INS_CCMN: ccmn $rn, $imm, $nzcv, $cond */
398  0,
400 },
401 { /* AArch64_CCMNWr, ARM64_INS_CCMN: ccmn $rn, $rm, $nzcv, $cond */
402  0,
404 },
405 { /* AArch64_CCMNXi, ARM64_INS_CCMN: ccmn $rn, $imm, $nzcv, $cond */
406  0,
408 },
409 { /* AArch64_CCMNXr, ARM64_INS_CCMN: ccmn $rn, $rm, $nzcv, $cond */
410  0,
412 },
413 { /* AArch64_CCMPWi, ARM64_INS_CCMP: ccmp $rn, $imm, $nzcv, $cond */
414  0,
416 },
417 { /* AArch64_CCMPWr, ARM64_INS_CCMP: ccmp $rn, $rm, $nzcv, $cond */
418  0,
420 },
421 { /* AArch64_CCMPXi, ARM64_INS_CCMP: ccmp $rn, $imm, $nzcv, $cond */
422  0,
424 },
425 { /* AArch64_CCMPXr, ARM64_INS_CCMP: ccmp $rn, $rm, $nzcv, $cond */
426  0,
428 },
429 { /* AArch64_CLREX, ARM64_INS_CLREX: clrex $crm */
430  0,
431  { CS_AC_READ, 0 }
432 },
433 { /* AArch64_CLSWr, ARM64_INS_CLS: cls $rd, $rn */
434  0,
435  { CS_AC_WRITE, CS_AC_READ, 0 }
436 },
437 { /* AArch64_CLSXr, ARM64_INS_CLS: cls $rd, $rn */
438  0,
439  { CS_AC_WRITE, CS_AC_READ, 0 }
440 },
441 { /* AArch64_CLSv16i8, ARM64_INS_CLS: cls.16b $rd, $rn */
442  0,
443  { CS_AC_WRITE, CS_AC_READ, 0 }
444 },
445 { /* AArch64_CLSv2i32, ARM64_INS_CLS: cls.2s $rd, $rn */
446  0,
447  { CS_AC_WRITE, CS_AC_READ, 0 }
448 },
449 { /* AArch64_CLSv4i16, ARM64_INS_CLS: cls.4h $rd, $rn */
450  0,
451  { CS_AC_WRITE, CS_AC_READ, 0 }
452 },
453 { /* AArch64_CLSv4i32, ARM64_INS_CLS: cls.4s $rd, $rn */
454  0,
455  { CS_AC_WRITE, CS_AC_READ, 0 }
456 },
457 { /* AArch64_CLSv8i16, ARM64_INS_CLS: cls.8h $rd, $rn */
458  0,
459  { CS_AC_WRITE, CS_AC_READ, 0 }
460 },
461 { /* AArch64_CLSv8i8, ARM64_INS_CLS: cls.8b $rd, $rn */
462  0,
463  { CS_AC_WRITE, CS_AC_READ, 0 }
464 },
465 { /* AArch64_CLZWr, ARM64_INS_CLZ: clz $rd, $rn */
466  0,
467  { CS_AC_WRITE, CS_AC_READ, 0 }
468 },
469 { /* AArch64_CLZXr, ARM64_INS_CLZ: clz $rd, $rn */
470  0,
471  { CS_AC_WRITE, CS_AC_READ, 0 }
472 },
473 { /* AArch64_CLZv16i8, ARM64_INS_CLZ: clz.16b $rd, $rn */
474  0,
475  { CS_AC_WRITE, CS_AC_READ, 0 }
476 },
477 { /* AArch64_CLZv2i32, ARM64_INS_CLZ: clz.2s $rd, $rn */
478  0,
479  { CS_AC_WRITE, CS_AC_READ, 0 }
480 },
481 { /* AArch64_CLZv4i16, ARM64_INS_CLZ: clz.4h $rd, $rn */
482  0,
483  { CS_AC_WRITE, CS_AC_READ, 0 }
484 },
485 { /* AArch64_CLZv4i32, ARM64_INS_CLZ: clz.4s $rd, $rn */
486  0,
487  { CS_AC_WRITE, CS_AC_READ, 0 }
488 },
489 { /* AArch64_CLZv8i16, ARM64_INS_CLZ: clz.8h $rd, $rn */
490  0,
491  { CS_AC_WRITE, CS_AC_READ, 0 }
492 },
493 { /* AArch64_CLZv8i8, ARM64_INS_CLZ: clz.8b $rd, $rn */
494  0,
495  { CS_AC_WRITE, CS_AC_READ, 0 }
496 },
497 { /* AArch64_CMEQv16i8, ARM64_INS_CMEQ: cmeq.16b $rd, $rn, $rm| */
498  0,
500 },
501 { /* AArch64_CMEQv16i8rz, ARM64_INS_CMEQ: cmeq.16b $rd, $rn, #0 */
502  0,
504 },
505 { /* AArch64_CMEQv1i64, ARM64_INS_CMEQ: cmeq $rd, $rn, $rm */
506  0,
508 },
509 { /* AArch64_CMEQv1i64rz, ARM64_INS_CMEQ: cmeq $rd, $rn, #0 */
510  0,
512 },
513 { /* AArch64_CMEQv2i32, ARM64_INS_CMEQ: cmeq.2s $rd, $rn, $rm| */
514  0,
516 },
517 { /* AArch64_CMEQv2i32rz, ARM64_INS_CMEQ: cmeq.2s $rd, $rn, #0 */
518  0,
520 },
521 { /* AArch64_CMEQv2i64, ARM64_INS_CMEQ: cmeq.2d $rd, $rn, $rm| */
522  0,
524 },
525 { /* AArch64_CMEQv2i64rz, ARM64_INS_CMEQ: cmeq.2d $rd, $rn, #0 */
526  0,
528 },
529 { /* AArch64_CMEQv4i16, ARM64_INS_CMEQ: cmeq.4h $rd, $rn, $rm| */
530  0,
532 },
533 { /* AArch64_CMEQv4i16rz, ARM64_INS_CMEQ: cmeq.4h $rd, $rn, #0 */
534  0,
536 },
537 { /* AArch64_CMEQv4i32, ARM64_INS_CMEQ: cmeq.4s $rd, $rn, $rm| */
538  0,
540 },
541 { /* AArch64_CMEQv4i32rz, ARM64_INS_CMEQ: cmeq.4s $rd, $rn, #0 */
542  0,
544 },
545 { /* AArch64_CMEQv8i16, ARM64_INS_CMEQ: cmeq.8h $rd, $rn, $rm| */
546  0,
548 },
549 { /* AArch64_CMEQv8i16rz, ARM64_INS_CMEQ: cmeq.8h $rd, $rn, #0 */
550  0,
552 },
553 { /* AArch64_CMEQv8i8, ARM64_INS_CMEQ: cmeq.8b $rd, $rn, $rm| */
554  0,
556 },
557 { /* AArch64_CMEQv8i8rz, ARM64_INS_CMEQ: cmeq.8b $rd, $rn, #0 */
558  0,
560 },
561 { /* AArch64_CMGEv16i8, ARM64_INS_CMGE: cmge.16b $rd, $rn, $rm| */
562  0,
564 },
565 { /* AArch64_CMGEv16i8rz, ARM64_INS_CMGE: cmge.16b $rd, $rn, #0 */
566  0,
568 },
569 { /* AArch64_CMGEv1i64, ARM64_INS_CMGE: cmge $rd, $rn, $rm */
570  0,
572 },
573 { /* AArch64_CMGEv1i64rz, ARM64_INS_CMGE: cmge $rd, $rn, #0 */
574  0,
576 },
577 { /* AArch64_CMGEv2i32, ARM64_INS_CMGE: cmge.2s $rd, $rn, $rm| */
578  0,
580 },
581 { /* AArch64_CMGEv2i32rz, ARM64_INS_CMGE: cmge.2s $rd, $rn, #0 */
582  0,
584 },
585 { /* AArch64_CMGEv2i64, ARM64_INS_CMGE: cmge.2d $rd, $rn, $rm| */
586  0,
588 },
589 { /* AArch64_CMGEv2i64rz, ARM64_INS_CMGE: cmge.2d $rd, $rn, #0 */
590  0,
592 },
593 { /* AArch64_CMGEv4i16, ARM64_INS_CMGE: cmge.4h $rd, $rn, $rm| */
594  0,
596 },
597 { /* AArch64_CMGEv4i16rz, ARM64_INS_CMGE: cmge.4h $rd, $rn, #0 */
598  0,
600 },
601 { /* AArch64_CMGEv4i32, ARM64_INS_CMGE: cmge.4s $rd, $rn, $rm| */
602  0,
604 },
605 { /* AArch64_CMGEv4i32rz, ARM64_INS_CMGE: cmge.4s $rd, $rn, #0 */
606  0,
608 },
609 { /* AArch64_CMGEv8i16, ARM64_INS_CMGE: cmge.8h $rd, $rn, $rm| */
610  0,
612 },
613 { /* AArch64_CMGEv8i16rz, ARM64_INS_CMGE: cmge.8h $rd, $rn, #0 */
614  0,
616 },
617 { /* AArch64_CMGEv8i8, ARM64_INS_CMGE: cmge.8b $rd, $rn, $rm| */
618  0,
620 },
621 { /* AArch64_CMGEv8i8rz, ARM64_INS_CMGE: cmge.8b $rd, $rn, #0 */
622  0,
624 },
625 { /* AArch64_CMGTv16i8, ARM64_INS_CMGT: cmgt.16b $rd, $rn, $rm| */
626  0,
628 },
629 { /* AArch64_CMGTv16i8rz, ARM64_INS_CMGT: cmgt.16b $rd, $rn, #0 */
630  0,
632 },
633 { /* AArch64_CMGTv1i64, ARM64_INS_CMGT: cmgt $rd, $rn, $rm */
634  0,
636 },
637 { /* AArch64_CMGTv1i64rz, ARM64_INS_CMGT: cmgt $rd, $rn, #0 */
638  0,
640 },
641 { /* AArch64_CMGTv2i32, ARM64_INS_CMGT: cmgt.2s $rd, $rn, $rm| */
642  0,
644 },
645 { /* AArch64_CMGTv2i32rz, ARM64_INS_CMGT: cmgt.2s $rd, $rn, #0 */
646  0,
648 },
649 { /* AArch64_CMGTv2i64, ARM64_INS_CMGT: cmgt.2d $rd, $rn, $rm| */
650  0,
652 },
653 { /* AArch64_CMGTv2i64rz, ARM64_INS_CMGT: cmgt.2d $rd, $rn, #0 */
654  0,
656 },
657 { /* AArch64_CMGTv4i16, ARM64_INS_CMGT: cmgt.4h $rd, $rn, $rm| */
658  0,
660 },
661 { /* AArch64_CMGTv4i16rz, ARM64_INS_CMGT: cmgt.4h $rd, $rn, #0 */
662  0,
664 },
665 { /* AArch64_CMGTv4i32, ARM64_INS_CMGT: cmgt.4s $rd, $rn, $rm| */
666  0,
668 },
669 { /* AArch64_CMGTv4i32rz, ARM64_INS_CMGT: cmgt.4s $rd, $rn, #0 */
670  0,
672 },
673 { /* AArch64_CMGTv8i16, ARM64_INS_CMGT: cmgt.8h $rd, $rn, $rm| */
674  0,
676 },
677 { /* AArch64_CMGTv8i16rz, ARM64_INS_CMGT: cmgt.8h $rd, $rn, #0 */
678  0,
680 },
681 { /* AArch64_CMGTv8i8, ARM64_INS_CMGT: cmgt.8b $rd, $rn, $rm| */
682  0,
684 },
685 { /* AArch64_CMGTv8i8rz, ARM64_INS_CMGT: cmgt.8b $rd, $rn, #0 */
686  0,
688 },
689 { /* AArch64_CMHIv16i8, ARM64_INS_CMHI: cmhi.16b $rd, $rn, $rm| */
690  0,
692 },
693 { /* AArch64_CMHIv1i64, ARM64_INS_CMHI: cmhi $rd, $rn, $rm */
694  0,
696 },
697 { /* AArch64_CMHIv2i32, ARM64_INS_CMHI: cmhi.2s $rd, $rn, $rm| */
698  0,
700 },
701 { /* AArch64_CMHIv2i64, ARM64_INS_CMHI: cmhi.2d $rd, $rn, $rm| */
702  0,
704 },
705 { /* AArch64_CMHIv4i16, ARM64_INS_CMHI: cmhi.4h $rd, $rn, $rm| */
706  0,
708 },
709 { /* AArch64_CMHIv4i32, ARM64_INS_CMHI: cmhi.4s $rd, $rn, $rm| */
710  0,
712 },
713 { /* AArch64_CMHIv8i16, ARM64_INS_CMHI: cmhi.8h $rd, $rn, $rm| */
714  0,
716 },
717 { /* AArch64_CMHIv8i8, ARM64_INS_CMHI: cmhi.8b $rd, $rn, $rm| */
718  0,
720 },
721 { /* AArch64_CMHSv16i8, ARM64_INS_CMHS: cmhs.16b $rd, $rn, $rm| */
722  0,
724 },
725 { /* AArch64_CMHSv1i64, ARM64_INS_CMHS: cmhs $rd, $rn, $rm */
726  0,
728 },
729 { /* AArch64_CMHSv2i32, ARM64_INS_CMHS: cmhs.2s $rd, $rn, $rm| */
730  0,
732 },
733 { /* AArch64_CMHSv2i64, ARM64_INS_CMHS: cmhs.2d $rd, $rn, $rm| */
734  0,
736 },
737 { /* AArch64_CMHSv4i16, ARM64_INS_CMHS: cmhs.4h $rd, $rn, $rm| */
738  0,
740 },
741 { /* AArch64_CMHSv4i32, ARM64_INS_CMHS: cmhs.4s $rd, $rn, $rm| */
742  0,
744 },
745 { /* AArch64_CMHSv8i16, ARM64_INS_CMHS: cmhs.8h $rd, $rn, $rm| */
746  0,
748 },
749 { /* AArch64_CMHSv8i8, ARM64_INS_CMHS: cmhs.8b $rd, $rn, $rm| */
750  0,
752 },
753 { /* AArch64_CMLEv16i8rz, ARM64_INS_CMLE: cmle.16b $rd, $rn, #0 */
754  0,
756 },
757 { /* AArch64_CMLEv1i64rz, ARM64_INS_CMLE: cmle $rd, $rn, #0 */
758  0,
760 },
761 { /* AArch64_CMLEv2i32rz, ARM64_INS_CMLE: cmle.2s $rd, $rn, #0 */
762  0,
764 },
765 { /* AArch64_CMLEv2i64rz, ARM64_INS_CMLE: cmle.2d $rd, $rn, #0 */
766  0,
768 },
769 { /* AArch64_CMLEv4i16rz, ARM64_INS_CMLE: cmle.4h $rd, $rn, #0 */
770  0,
772 },
773 { /* AArch64_CMLEv4i32rz, ARM64_INS_CMLE: cmle.4s $rd, $rn, #0 */
774  0,
776 },
777 { /* AArch64_CMLEv8i16rz, ARM64_INS_CMLE: cmle.8h $rd, $rn, #0 */
778  0,
780 },
781 { /* AArch64_CMLEv8i8rz, ARM64_INS_CMLE: cmle.8b $rd, $rn, #0 */
782  0,
784 },
785 { /* AArch64_CMLTv16i8rz, ARM64_INS_CMLT: cmlt.16b $rd, $rn, #0 */
786  0,
788 },
789 { /* AArch64_CMLTv1i64rz, ARM64_INS_CMLT: cmlt $rd, $rn, #0 */
790  0,
792 },
793 { /* AArch64_CMLTv2i32rz, ARM64_INS_CMLT: cmlt.2s $rd, $rn, #0 */
794  0,
796 },
797 { /* AArch64_CMLTv2i64rz, ARM64_INS_CMLT: cmlt.2d $rd, $rn, #0 */
798  0,
800 },
801 { /* AArch64_CMLTv4i16rz, ARM64_INS_CMLT: cmlt.4h $rd, $rn, #0 */
802  0,
804 },
805 { /* AArch64_CMLTv4i32rz, ARM64_INS_CMLT: cmlt.4s $rd, $rn, #0 */
806  0,
808 },
809 { /* AArch64_CMLTv8i16rz, ARM64_INS_CMLT: cmlt.8h $rd, $rn, #0 */
810  0,
812 },
813 { /* AArch64_CMLTv8i8rz, ARM64_INS_CMLT: cmlt.8b $rd, $rn, #0 */
814  0,
816 },
817 { /* AArch64_CMTSTv16i8, ARM64_INS_CMTST: cmtst.16b $rd, $rn, $rm| */
818  0,
820 },
821 { /* AArch64_CMTSTv1i64, ARM64_INS_CMTST: cmtst $rd, $rn, $rm */
822  0,
824 },
825 { /* AArch64_CMTSTv2i32, ARM64_INS_CMTST: cmtst.2s $rd, $rn, $rm| */
826  0,
828 },
829 { /* AArch64_CMTSTv2i64, ARM64_INS_CMTST: cmtst.2d $rd, $rn, $rm| */
830  0,
832 },
833 { /* AArch64_CMTSTv4i16, ARM64_INS_CMTST: cmtst.4h $rd, $rn, $rm| */
834  0,
836 },
837 { /* AArch64_CMTSTv4i32, ARM64_INS_CMTST: cmtst.4s $rd, $rn, $rm| */
838  0,
840 },
841 { /* AArch64_CMTSTv8i16, ARM64_INS_CMTST: cmtst.8h $rd, $rn, $rm| */
842  0,
844 },
845 { /* AArch64_CMTSTv8i8, ARM64_INS_CMTST: cmtst.8b $rd, $rn, $rm| */
846  0,
848 },
849 { /* AArch64_CNTv16i8, ARM64_INS_CNT: cnt.16b $rd, $rn */
850  0,
851  { CS_AC_WRITE, CS_AC_READ, 0 }
852 },
853 { /* AArch64_CNTv8i8, ARM64_INS_CNT: cnt.8b $rd, $rn */
854  0,
855  { CS_AC_WRITE, CS_AC_READ, 0 }
856 },
857 { /* AArch64_CPYi16, ARM64_INS_MOV: mov $dst, $src$idx */
858  0,
860 },
861 { /* AArch64_CPYi32, ARM64_INS_MOV: mov $dst, $src$idx */
862  0,
864 },
865 { /* AArch64_CPYi64, ARM64_INS_MOV: mov $dst, $src$idx */
866  0,
868 },
869 { /* AArch64_CPYi8, ARM64_INS_MOV: mov $dst, $src$idx */
870  0,
872 },
873 { /* AArch64_CRC32Brr, ARM64_INS_CRC32B: crc32b $rd, $rn, $rm */
874  0,
876 },
877 { /* AArch64_CRC32CBrr, ARM64_INS_CRC32CB: crc32cb $rd, $rn, $rm */
878  0,
880 },
881 { /* AArch64_CRC32CHrr, ARM64_INS_CRC32CH: crc32ch $rd, $rn, $rm */
882  0,
884 },
885 { /* AArch64_CRC32CWrr, ARM64_INS_CRC32CW: crc32cw $rd, $rn, $rm */
886  0,
888 },
889 { /* AArch64_CRC32CXrr, ARM64_INS_CRC32CX: crc32cx $rd, $rn, $rm */
890  0,
892 },
893 { /* AArch64_CRC32Hrr, ARM64_INS_CRC32H: crc32h $rd, $rn, $rm */
894  0,
896 },
897 { /* AArch64_CRC32Wrr, ARM64_INS_CRC32W: crc32w $rd, $rn, $rm */
898  0,
900 },
901 { /* AArch64_CRC32Xrr, ARM64_INS_CRC32X: crc32x $rd, $rn, $rm */
902  0,
904 },
905 { /* AArch64_CSELWr, ARM64_INS_CSEL: csel $rd, $rn, $rm, $cond */
906  0,
908 },
909 { /* AArch64_CSELXr, ARM64_INS_CSEL: csel $rd, $rn, $rm, $cond */
910  0,
912 },
913 { /* AArch64_CSINCWr, ARM64_INS_CSINC: csinc $rd, $rn, $rm, $cond */
914  0,
916 },
917 { /* AArch64_CSINCXr, ARM64_INS_CSINC: csinc $rd, $rn, $rm, $cond */
918  0,
920 },
921 { /* AArch64_CSINVWr, ARM64_INS_CSINV: csinv $rd, $rn, $rm, $cond */
922  0,
924 },
925 { /* AArch64_CSINVXr, ARM64_INS_CSINV: csinv $rd, $rn, $rm, $cond */
926  0,
928 },
929 { /* AArch64_CSNEGWr, ARM64_INS_CSNEG: csneg $rd, $rn, $rm, $cond */
930  0,
932 },
933 { /* AArch64_CSNEGXr, ARM64_INS_CSNEG: csneg $rd, $rn, $rm, $cond */
934  0,
936 },
937 { /* AArch64_DCPS1, ARM64_INS_DCPS1: dcps1 $imm */
938  0,
939  { CS_AC_READ, 0 }
940 },
941 { /* AArch64_DCPS2, ARM64_INS_DCPS2: dcps2 $imm */
942  0,
943  { CS_AC_READ, 0 }
944 },
945 { /* AArch64_DCPS3, ARM64_INS_DCPS3: dcps3 $imm */
946  0,
947  { CS_AC_READ, 0 }
948 },
949 { /* AArch64_DMB, ARM64_INS_DMB: dmb $crm */
950  0,
951  { CS_AC_READ, 0 }
952 },
953 { /* AArch64_DRPS, ARM64_INS_DRPS: drps */
954  0,
955  { 0 }
956 },
957 { /* AArch64_DSB, ARM64_INS_DSB: dsb $crm */
958  0,
959  { CS_AC_READ, 0 }
960 },
961 { /* AArch64_DUPv16i8gpr, ARM64_INS_DUP: dup.16b $rd, $rn */
962  0,
963  { CS_AC_WRITE, CS_AC_READ, 0 }
964 },
965 { /* AArch64_DUPv16i8lane, ARM64_INS_DUP: dup.16b $rd, $rn$idx */
966  0,
968 },
969 { /* AArch64_DUPv2i32gpr, ARM64_INS_DUP: dup.2s $rd, $rn */
970  0,
971  { CS_AC_WRITE, CS_AC_READ, 0 }
972 },
973 { /* AArch64_DUPv2i32lane, ARM64_INS_DUP: dup.2s $rd, $rn$idx */
974  0,
976 },
977 { /* AArch64_DUPv2i64gpr, ARM64_INS_DUP: dup.2d $rd, $rn */
978  0,
979  { CS_AC_WRITE, CS_AC_READ, 0 }
980 },
981 { /* AArch64_DUPv2i64lane, ARM64_INS_DUP: dup.2d $rd, $rn$idx */
982  0,
984 },
985 { /* AArch64_DUPv4i16gpr, ARM64_INS_DUP: dup.4h $rd, $rn */
986  0,
987  { CS_AC_WRITE, CS_AC_READ, 0 }
988 },
989 { /* AArch64_DUPv4i16lane, ARM64_INS_DUP: dup.4h $rd, $rn$idx */
990  0,
992 },
993 { /* AArch64_DUPv4i32gpr, ARM64_INS_DUP: dup.4s $rd, $rn */
994  0,
995  { CS_AC_WRITE, CS_AC_READ, 0 }
996 },
997 { /* AArch64_DUPv4i32lane, ARM64_INS_DUP: dup.4s $rd, $rn$idx */
998  0,
1000 },
1001 { /* AArch64_DUPv8i16gpr, ARM64_INS_DUP: dup.8h $rd, $rn */
1002  0,
1003  { CS_AC_WRITE, CS_AC_READ, 0 }
1004 },
1005 { /* AArch64_DUPv8i16lane, ARM64_INS_DUP: dup.8h $rd, $rn$idx */
1006  0,
1008 },
1009 { /* AArch64_DUPv8i8gpr, ARM64_INS_DUP: dup.8b $rd, $rn */
1010  0,
1011  { CS_AC_WRITE, CS_AC_READ, 0 }
1012 },
1013 { /* AArch64_DUPv8i8lane, ARM64_INS_DUP: dup.8b $rd, $rn$idx */
1014  0,
1016 },
1017 { /* AArch64_EONWrs, ARM64_INS_EON: eon $rd, $rn, $rm */
1018  0,
1020 },
1021 { /* AArch64_EONXrs, ARM64_INS_EON: eon $rd, $rn, $rm */
1022  0,
1024 },
1025 { /* AArch64_EORWri, ARM64_INS_EOR: eor $rd, $rn, $imm */
1026  0,
1028 },
1029 { /* AArch64_EORWrs, ARM64_INS_EOR: eor $rd, $rn, $rm */
1030  0,
1032 },
1033 { /* AArch64_EORXri, ARM64_INS_EOR: eor $rd, $rn, $imm */
1034  0,
1036 },
1037 { /* AArch64_EORXrs, ARM64_INS_EOR: eor $rd, $rn, $rm */
1038  0,
1040 },
1041 { /* AArch64_EORv16i8, ARM64_INS_EOR: eor.16b $rd, $rn, $rm| */
1042  0,
1044 },
1045 { /* AArch64_EORv8i8, ARM64_INS_EOR: eor.8b $rd, $rn, $rm| */
1046  0,
1048 },
1049 { /* AArch64_ERET, ARM64_INS_ERET: eret */
1050  0,
1051  { 0 }
1052 },
1053 { /* AArch64_EXTRWrri, ARM64_INS_EXTR: extr $rd, $rn, $rm, $imm */
1054  0,
1056 },
1057 { /* AArch64_EXTRXrri, ARM64_INS_EXTR: extr $rd, $rn, $rm, $imm */
1058  0,
1060 },
1061 { /* AArch64_EXTv16i8, ARM64_INS_EXT: ext.16b $rd, $rn, $rm, $imm */
1062  0,
1064 },
1065 { /* AArch64_EXTv8i8, ARM64_INS_EXT: ext.8b $rd, $rn, $rm, $imm */
1066  0,
1068 },
1069 { /* AArch64_FABD32, ARM64_INS_FABD: fabd $rd, $rn, $rm */
1070  0,
1072 },
1073 { /* AArch64_FABD64, ARM64_INS_FABD: fabd $rd, $rn, $rm */
1074  0,
1076 },
1077 { /* AArch64_FABDv2f32, ARM64_INS_FABD: fabd.2s $rd, $rn, $rm| */
1078  0,
1080 },
1081 { /* AArch64_FABDv2f64, ARM64_INS_FABD: fabd.2d $rd, $rn, $rm| */
1082  0,
1084 },
1085 { /* AArch64_FABDv4f32, ARM64_INS_FABD: fabd.4s $rd, $rn, $rm| */
1086  0,
1088 },
1089 { /* AArch64_FABSDr, ARM64_INS_FABS: fabs $rd, $rn */
1090  0,
1091  { CS_AC_WRITE, CS_AC_READ, 0 }
1092 },
1093 { /* AArch64_FABSSr, ARM64_INS_FABS: fabs $rd, $rn */
1094  0,
1095  { CS_AC_WRITE, CS_AC_READ, 0 }
1096 },
1097 { /* AArch64_FABSv2f32, ARM64_INS_FABS: fabs.2s $rd, $rn */
1098  0,
1099  { CS_AC_WRITE, CS_AC_READ, 0 }
1100 },
1101 { /* AArch64_FABSv2f64, ARM64_INS_FABS: fabs.2d $rd, $rn */
1102  0,
1103  { CS_AC_WRITE, CS_AC_READ, 0 }
1104 },
1105 { /* AArch64_FABSv4f32, ARM64_INS_FABS: fabs.4s $rd, $rn */
1106  0,
1107  { CS_AC_WRITE, CS_AC_READ, 0 }
1108 },
1109 { /* AArch64_FACGE32, ARM64_INS_FACGE: facge $rd, $rn, $rm */
1110  0,
1112 },
1113 { /* AArch64_FACGE64, ARM64_INS_FACGE: facge $rd, $rn, $rm */
1114  0,
1116 },
1117 { /* AArch64_FACGEv2f32, ARM64_INS_FACGE: facge.2s $rd, $rn, $rm| */
1118  0,
1120 },
1121 { /* AArch64_FACGEv2f64, ARM64_INS_FACGE: facge.2d $rd, $rn, $rm| */
1122  0,
1124 },
1125 { /* AArch64_FACGEv4f32, ARM64_INS_FACGE: facge.4s $rd, $rn, $rm| */
1126  0,
1128 },
1129 { /* AArch64_FACGT32, ARM64_INS_FACGT: facgt $rd, $rn, $rm */
1130  0,
1132 },
1133 { /* AArch64_FACGT64, ARM64_INS_FACGT: facgt $rd, $rn, $rm */
1134  0,
1136 },
1137 { /* AArch64_FACGTv2f32, ARM64_INS_FACGT: facgt.2s $rd, $rn, $rm| */
1138  0,
1140 },
1141 { /* AArch64_FACGTv2f64, ARM64_INS_FACGT: facgt.2d $rd, $rn, $rm| */
1142  0,
1144 },
1145 { /* AArch64_FACGTv4f32, ARM64_INS_FACGT: facgt.4s $rd, $rn, $rm| */
1146  0,
1148 },
1149 { /* AArch64_FADDDrr, ARM64_INS_FADD: fadd $rd, $rn, $rm */
1150  0,
1152 },
1153 { /* AArch64_FADDPv2f32, ARM64_INS_FADDP: faddp.2s $rd, $rn, $rm| */
1154  0,
1156 },
1157 { /* AArch64_FADDPv2f64, ARM64_INS_FADDP: faddp.2d $rd, $rn, $rm| */
1158  0,
1160 },
1161 { /* AArch64_FADDPv2i32p, ARM64_INS_FADDP: faddp.2s $rd, $rn */
1162  0,
1163  { CS_AC_WRITE, CS_AC_READ, 0 }
1164 },
1165 { /* AArch64_FADDPv2i64p, ARM64_INS_FADDP: faddp.2d $rd, $rn */
1166  0,
1167  { CS_AC_WRITE, CS_AC_READ, 0 }
1168 },
1169 { /* AArch64_FADDPv4f32, ARM64_INS_FADDP: faddp.4s $rd, $rn, $rm| */
1170  0,
1172 },
1173 { /* AArch64_FADDSrr, ARM64_INS_FADD: fadd $rd, $rn, $rm */
1174  0,
1176 },
1177 { /* AArch64_FADDv2f32, ARM64_INS_FADD: fadd.2s $rd, $rn, $rm| */
1178  0,
1180 },
1181 { /* AArch64_FADDv2f64, ARM64_INS_FADD: fadd.2d $rd, $rn, $rm| */
1182  0,
1184 },
1185 { /* AArch64_FADDv4f32, ARM64_INS_FADD: fadd.4s $rd, $rn, $rm| */
1186  0,
1188 },
1189 { /* AArch64_FCCMPDrr, ARM64_INS_FCCMP: fccmp $rn, $rm, $nzcv, $cond */
1190  0,
1192 },
1193 { /* AArch64_FCCMPEDrr, ARM64_INS_FCCMPE: fccmpe $rn, $rm, $nzcv, $cond */
1194  0,
1196 },
1197 { /* AArch64_FCCMPESrr, ARM64_INS_FCCMPE: fccmpe $rn, $rm, $nzcv, $cond */
1198  0,
1200 },
1201 { /* AArch64_FCCMPSrr, ARM64_INS_FCCMP: fccmp $rn, $rm, $nzcv, $cond */
1202  0,
1204 },
1205 { /* AArch64_FCMEQ32, ARM64_INS_FCMEQ: fcmeq $rd, $rn, $rm */
1206  0,
1208 },
1209 { /* AArch64_FCMEQ64, ARM64_INS_FCMEQ: fcmeq $rd, $rn, $rm */
1210  0,
1212 },
1213 { /* AArch64_FCMEQv1i32rz, ARM64_INS_FCMEQ: fcmeq $rd, $rn, #0.0 */
1214  0,
1216 },
1217 { /* AArch64_FCMEQv1i64rz, ARM64_INS_FCMEQ: fcmeq $rd, $rn, #0.0 */
1218  0,
1220 },
1221 { /* AArch64_FCMEQv2f32, ARM64_INS_FCMEQ: fcmeq.2s $rd, $rn, $rm| */
1222  0,
1224 },
1225 { /* AArch64_FCMEQv2f64, ARM64_INS_FCMEQ: fcmeq.2d $rd, $rn, $rm| */
1226  0,
1228 },
1229 { /* AArch64_FCMEQv2i32rz, ARM64_INS_FCMEQ: fcmeq.2s $rd, $rn, #0.0 */
1230  0,
1232 },
1233 { /* AArch64_FCMEQv2i64rz, ARM64_INS_FCMEQ: fcmeq.2d $rd, $rn, #0.0 */
1234  0,
1236 },
1237 { /* AArch64_FCMEQv4f32, ARM64_INS_FCMEQ: fcmeq.4s $rd, $rn, $rm| */
1238  0,
1240 },
1241 { /* AArch64_FCMEQv4i32rz, ARM64_INS_FCMEQ: fcmeq.4s $rd, $rn, #0.0 */
1242  0,
1244 },
1245 { /* AArch64_FCMGE32, ARM64_INS_FCMGE: fcmge $rd, $rn, $rm */
1246  0,
1248 },
1249 { /* AArch64_FCMGE64, ARM64_INS_FCMGE: fcmge $rd, $rn, $rm */
1250  0,
1252 },
1253 { /* AArch64_FCMGEv1i32rz, ARM64_INS_FCMGE: fcmge $rd, $rn, #0.0 */
1254  0,
1256 },
1257 { /* AArch64_FCMGEv1i64rz, ARM64_INS_FCMGE: fcmge $rd, $rn, #0.0 */
1258  0,
1260 },
1261 { /* AArch64_FCMGEv2f32, ARM64_INS_FCMGE: fcmge.2s $rd, $rn, $rm| */
1262  0,
1264 },
1265 { /* AArch64_FCMGEv2f64, ARM64_INS_FCMGE: fcmge.2d $rd, $rn, $rm| */
1266  0,
1268 },
1269 { /* AArch64_FCMGEv2i32rz, ARM64_INS_FCMGE: fcmge.2s $rd, $rn, #0.0 */
1270  0,
1272 },
1273 { /* AArch64_FCMGEv2i64rz, ARM64_INS_FCMGE: fcmge.2d $rd, $rn, #0.0 */
1274  0,
1276 },
1277 { /* AArch64_FCMGEv4f32, ARM64_INS_FCMGE: fcmge.4s $rd, $rn, $rm| */
1278  0,
1280 },
1281 { /* AArch64_FCMGEv4i32rz, ARM64_INS_FCMGE: fcmge.4s $rd, $rn, #0.0 */
1282  0,
1284 },
1285 { /* AArch64_FCMGT32, ARM64_INS_FCMGT: fcmgt $rd, $rn, $rm */
1286  0,
1288 },
1289 { /* AArch64_FCMGT64, ARM64_INS_FCMGT: fcmgt $rd, $rn, $rm */
1290  0,
1292 },
1293 { /* AArch64_FCMGTv1i32rz, ARM64_INS_FCMGT: fcmgt $rd, $rn, #0.0 */
1294  0,
1296 },
1297 { /* AArch64_FCMGTv1i64rz, ARM64_INS_FCMGT: fcmgt $rd, $rn, #0.0 */
1298  0,
1300 },
1301 { /* AArch64_FCMGTv2f32, ARM64_INS_FCMGT: fcmgt.2s $rd, $rn, $rm| */
1302  0,
1304 },
1305 { /* AArch64_FCMGTv2f64, ARM64_INS_FCMGT: fcmgt.2d $rd, $rn, $rm| */
1306  0,
1308 },
1309 { /* AArch64_FCMGTv2i32rz, ARM64_INS_FCMGT: fcmgt.2s $rd, $rn, #0.0 */
1310  0,
1312 },
1313 { /* AArch64_FCMGTv2i64rz, ARM64_INS_FCMGT: fcmgt.2d $rd, $rn, #0.0 */
1314  0,
1316 },
1317 { /* AArch64_FCMGTv4f32, ARM64_INS_FCMGT: fcmgt.4s $rd, $rn, $rm| */
1318  0,
1320 },
1321 { /* AArch64_FCMGTv4i32rz, ARM64_INS_FCMGT: fcmgt.4s $rd, $rn, #0.0 */
1322  0,
1324 },
1325 { /* AArch64_FCMLEv1i32rz, ARM64_INS_FCMLE: fcmle $rd, $rn, #0.0 */
1326  0,
1328 },
1329 { /* AArch64_FCMLEv1i64rz, ARM64_INS_FCMLE: fcmle $rd, $rn, #0.0 */
1330  0,
1332 },
1333 { /* AArch64_FCMLEv2i32rz, ARM64_INS_FCMLE: fcmle.2s $rd, $rn, #0.0 */
1334  0,
1336 },
1337 { /* AArch64_FCMLEv2i64rz, ARM64_INS_FCMLE: fcmle.2d $rd, $rn, #0.0 */
1338  0,
1340 },
1341 { /* AArch64_FCMLEv4i32rz, ARM64_INS_FCMLE: fcmle.4s $rd, $rn, #0.0 */
1342  0,
1344 },
1345 { /* AArch64_FCMLTv1i32rz, ARM64_INS_FCMLT: fcmlt $rd, $rn, #0.0 */
1346  0,
1348 },
1349 { /* AArch64_FCMLTv1i64rz, ARM64_INS_FCMLT: fcmlt $rd, $rn, #0.0 */
1350  0,
1352 },
1353 { /* AArch64_FCMLTv2i32rz, ARM64_INS_FCMLT: fcmlt.2s $rd, $rn, #0.0 */
1354  0,
1356 },
1357 { /* AArch64_FCMLTv2i64rz, ARM64_INS_FCMLT: fcmlt.2d $rd, $rn, #0.0 */
1358  0,
1360 },
1361 { /* AArch64_FCMLTv4i32rz, ARM64_INS_FCMLT: fcmlt.4s $rd, $rn, #0.0 */
1362  0,
1364 },
1365 { /* AArch64_FCMPDri, ARM64_INS_FCMP: fcmp $rn, #0.0 */
1366  0,
1367  { CS_AC_READ, CS_AC_READ, 0 }
1368 },
1369 { /* AArch64_FCMPDrr, ARM64_INS_FCMP: fcmp $rn, $rm */
1370  0,
1371  { CS_AC_READ, CS_AC_READ, 0 }
1372 },
1373 { /* AArch64_FCMPEDri, ARM64_INS_FCMPE: fcmpe $rn, #0.0 */
1374  0,
1375  { CS_AC_READ, CS_AC_READ, 0 }
1376 },
1377 { /* AArch64_FCMPEDrr, ARM64_INS_FCMPE: fcmpe $rn, $rm */
1378  0,
1379  { CS_AC_READ, CS_AC_READ, 0 }
1380 },
1381 { /* AArch64_FCMPESri, ARM64_INS_FCMPE: fcmpe $rn, #0.0 */
1382  0,
1383  { CS_AC_READ, CS_AC_READ, 0 }
1384 },
1385 { /* AArch64_FCMPESrr, ARM64_INS_FCMPE: fcmpe $rn, $rm */
1386  0,
1387  { CS_AC_READ, CS_AC_READ, 0 }
1388 },
1389 { /* AArch64_FCMPSri, ARM64_INS_FCMP: fcmp $rn, #0.0 */
1390  0,
1391  { CS_AC_READ, CS_AC_READ, 0 }
1392 },
1393 { /* AArch64_FCMPSrr, ARM64_INS_FCMP: fcmp $rn, $rm */
1394  0,
1395  { CS_AC_READ, CS_AC_READ, 0 }
1396 },
1397 { /* AArch64_FCSELDrrr, ARM64_INS_FCSEL: fcsel $rd, $rn, $rm, $cond */
1398  0,
1400 },
1401 { /* AArch64_FCSELSrrr, ARM64_INS_FCSEL: fcsel $rd, $rn, $rm, $cond */
1402  0,
1404 },
1405 { /* AArch64_FCVTASUWDr, ARM64_INS_FCVTAS: fcvtas $rd, $rn */
1406  0,
1407  { CS_AC_WRITE, CS_AC_READ, 0 }
1408 },
1409 { /* AArch64_FCVTASUWSr, ARM64_INS_FCVTAS: fcvtas $rd, $rn */
1410  0,
1411  { CS_AC_WRITE, CS_AC_READ, 0 }
1412 },
1413 { /* AArch64_FCVTASUXDr, ARM64_INS_FCVTAS: fcvtas $rd, $rn */
1414  0,
1415  { CS_AC_WRITE, CS_AC_READ, 0 }
1416 },
1417 { /* AArch64_FCVTASUXSr, ARM64_INS_FCVTAS: fcvtas $rd, $rn */
1418  0,
1419  { CS_AC_WRITE, CS_AC_READ, 0 }
1420 },
1421 { /* AArch64_FCVTASv1i32, ARM64_INS_FCVTAS: fcvtas $rd, $rn */
1422  0,
1423  { CS_AC_WRITE, CS_AC_READ, 0 }
1424 },
1425 { /* AArch64_FCVTASv1i64, ARM64_INS_FCVTAS: fcvtas $rd, $rn */
1426  0,
1427  { CS_AC_WRITE, CS_AC_READ, 0 }
1428 },
1429 { /* AArch64_FCVTASv2f32, ARM64_INS_FCVTAS: fcvtas.2s $rd, $rn */
1430  0,
1431  { CS_AC_WRITE, CS_AC_READ, 0 }
1432 },
1433 { /* AArch64_FCVTASv2f64, ARM64_INS_FCVTAS: fcvtas.2d $rd, $rn */
1434  0,
1435  { CS_AC_WRITE, CS_AC_READ, 0 }
1436 },
1437 { /* AArch64_FCVTASv4f32, ARM64_INS_FCVTAS: fcvtas.4s $rd, $rn */
1438  0,
1439  { CS_AC_WRITE, CS_AC_READ, 0 }
1440 },
1441 { /* AArch64_FCVTAUUWDr, ARM64_INS_FCVTAU: fcvtau $rd, $rn */
1442  0,
1443  { CS_AC_WRITE, CS_AC_READ, 0 }
1444 },
1445 { /* AArch64_FCVTAUUWSr, ARM64_INS_FCVTAU: fcvtau $rd, $rn */
1446  0,
1447  { CS_AC_WRITE, CS_AC_READ, 0 }
1448 },
1449 { /* AArch64_FCVTAUUXDr, ARM64_INS_FCVTAU: fcvtau $rd, $rn */
1450  0,
1451  { CS_AC_WRITE, CS_AC_READ, 0 }
1452 },
1453 { /* AArch64_FCVTAUUXSr, ARM64_INS_FCVTAU: fcvtau $rd, $rn */
1454  0,
1455  { CS_AC_WRITE, CS_AC_READ, 0 }
1456 },
1457 { /* AArch64_FCVTAUv1i32, ARM64_INS_FCVTAU: fcvtau $rd, $rn */
1458  0,
1459  { CS_AC_WRITE, CS_AC_READ, 0 }
1460 },
1461 { /* AArch64_FCVTAUv1i64, ARM64_INS_FCVTAU: fcvtau $rd, $rn */
1462  0,
1463  { CS_AC_WRITE, CS_AC_READ, 0 }
1464 },
1465 { /* AArch64_FCVTAUv2f32, ARM64_INS_FCVTAU: fcvtau.2s $rd, $rn */
1466  0,
1467  { CS_AC_WRITE, CS_AC_READ, 0 }
1468 },
1469 { /* AArch64_FCVTAUv2f64, ARM64_INS_FCVTAU: fcvtau.2d $rd, $rn */
1470  0,
1471  { CS_AC_WRITE, CS_AC_READ, 0 }
1472 },
1473 { /* AArch64_FCVTAUv4f32, ARM64_INS_FCVTAU: fcvtau.4s $rd, $rn */
1474  0,
1475  { CS_AC_WRITE, CS_AC_READ, 0 }
1476 },
1477 { /* AArch64_FCVTDHr, ARM64_INS_FCVT: fcvt $rd, $rn */
1478  0,
1479  { CS_AC_WRITE, CS_AC_READ, 0 }
1480 },
1481 { /* AArch64_FCVTDSr, ARM64_INS_FCVT: fcvt $rd, $rn */
1482  0,
1483  { CS_AC_WRITE, CS_AC_READ, 0 }
1484 },
1485 { /* AArch64_FCVTHDr, ARM64_INS_FCVT: fcvt $rd, $rn */
1486  0,
1487  { CS_AC_WRITE, CS_AC_READ, 0 }
1488 },
1489 { /* AArch64_FCVTHSr, ARM64_INS_FCVT: fcvt $rd, $rn */
1490  0,
1491  { CS_AC_WRITE, CS_AC_READ, 0 }
1492 },
1493 { /* AArch64_FCVTLv2i32, ARM64_INS_FCVTL: fcvtl $rd.2d, $rn.2s */
1494  0,
1495  { CS_AC_WRITE, CS_AC_READ, 0 }
1496 },
1497 { /* AArch64_FCVTLv4i16, ARM64_INS_FCVTL: fcvtl $rd.4s, $rn.4h */
1498  0,
1499  { CS_AC_WRITE, CS_AC_READ, 0 }
1500 },
1501 { /* AArch64_FCVTLv4i32, ARM64_INS_FCVTL2: fcvtl2 $rd.2d, $rn.4s */
1502  0,
1503  { CS_AC_WRITE, CS_AC_READ, 0 }
1504 },
1505 { /* AArch64_FCVTLv8i16, ARM64_INS_FCVTL2: fcvtl2 $rd.4s, $rn.8h */
1506  0,
1507  { CS_AC_WRITE, CS_AC_READ, 0 }
1508 },
1509 { /* AArch64_FCVTMSUWDr, ARM64_INS_FCVTMS: fcvtms $rd, $rn */
1510  0,
1511  { CS_AC_WRITE, CS_AC_READ, 0 }
1512 },
1513 { /* AArch64_FCVTMSUWSr, ARM64_INS_FCVTMS: fcvtms $rd, $rn */
1514  0,
1515  { CS_AC_WRITE, CS_AC_READ, 0 }
1516 },
1517 { /* AArch64_FCVTMSUXDr, ARM64_INS_FCVTMS: fcvtms $rd, $rn */
1518  0,
1519  { CS_AC_WRITE, CS_AC_READ, 0 }
1520 },
1521 { /* AArch64_FCVTMSUXSr, ARM64_INS_FCVTMS: fcvtms $rd, $rn */
1522  0,
1523  { CS_AC_WRITE, CS_AC_READ, 0 }
1524 },
1525 { /* AArch64_FCVTMSv1i32, ARM64_INS_FCVTMS: fcvtms $rd, $rn */
1526  0,
1527  { CS_AC_WRITE, CS_AC_READ, 0 }
1528 },
1529 { /* AArch64_FCVTMSv1i64, ARM64_INS_FCVTMS: fcvtms $rd, $rn */
1530  0,
1531  { CS_AC_WRITE, CS_AC_READ, 0 }
1532 },
1533 { /* AArch64_FCVTMSv2f32, ARM64_INS_FCVTMS: fcvtms.2s $rd, $rn */
1534  0,
1535  { CS_AC_WRITE, CS_AC_READ, 0 }
1536 },
1537 { /* AArch64_FCVTMSv2f64, ARM64_INS_FCVTMS: fcvtms.2d $rd, $rn */
1538  0,
1539  { CS_AC_WRITE, CS_AC_READ, 0 }
1540 },
1541 { /* AArch64_FCVTMSv4f32, ARM64_INS_FCVTMS: fcvtms.4s $rd, $rn */
1542  0,
1543  { CS_AC_WRITE, CS_AC_READ, 0 }
1544 },
1545 { /* AArch64_FCVTMUUWDr, ARM64_INS_FCVTMU: fcvtmu $rd, $rn */
1546  0,
1547  { CS_AC_WRITE, CS_AC_READ, 0 }
1548 },
1549 { /* AArch64_FCVTMUUWSr, ARM64_INS_FCVTMU: fcvtmu $rd, $rn */
1550  0,
1551  { CS_AC_WRITE, CS_AC_READ, 0 }
1552 },
1553 { /* AArch64_FCVTMUUXDr, ARM64_INS_FCVTMU: fcvtmu $rd, $rn */
1554  0,
1555  { CS_AC_WRITE, CS_AC_READ, 0 }
1556 },
1557 { /* AArch64_FCVTMUUXSr, ARM64_INS_FCVTMU: fcvtmu $rd, $rn */
1558  0,
1559  { CS_AC_WRITE, CS_AC_READ, 0 }
1560 },
1561 { /* AArch64_FCVTMUv1i32, ARM64_INS_FCVTMU: fcvtmu $rd, $rn */
1562  0,
1563  { CS_AC_WRITE, CS_AC_READ, 0 }
1564 },
1565 { /* AArch64_FCVTMUv1i64, ARM64_INS_FCVTMU: fcvtmu $rd, $rn */
1566  0,
1567  { CS_AC_WRITE, CS_AC_READ, 0 }
1568 },
1569 { /* AArch64_FCVTMUv2f32, ARM64_INS_FCVTMU: fcvtmu.2s $rd, $rn */
1570  0,
1571  { CS_AC_WRITE, CS_AC_READ, 0 }
1572 },
1573 { /* AArch64_FCVTMUv2f64, ARM64_INS_FCVTMU: fcvtmu.2d $rd, $rn */
1574  0,
1575  { CS_AC_WRITE, CS_AC_READ, 0 }
1576 },
1577 { /* AArch64_FCVTMUv4f32, ARM64_INS_FCVTMU: fcvtmu.4s $rd, $rn */
1578  0,
1579  { CS_AC_WRITE, CS_AC_READ, 0 }
1580 },
1581 { /* AArch64_FCVTNSUWDr, ARM64_INS_FCVTNS: fcvtns $rd, $rn */
1582  0,
1583  { CS_AC_WRITE, CS_AC_READ, 0 }
1584 },
1585 { /* AArch64_FCVTNSUWSr, ARM64_INS_FCVTNS: fcvtns $rd, $rn */
1586  0,
1587  { CS_AC_WRITE, CS_AC_READ, 0 }
1588 },
1589 { /* AArch64_FCVTNSUXDr, ARM64_INS_FCVTNS: fcvtns $rd, $rn */
1590  0,
1591  { CS_AC_WRITE, CS_AC_READ, 0 }
1592 },
1593 { /* AArch64_FCVTNSUXSr, ARM64_INS_FCVTNS: fcvtns $rd, $rn */
1594  0,
1595  { CS_AC_WRITE, CS_AC_READ, 0 }
1596 },
1597 { /* AArch64_FCVTNSv1i32, ARM64_INS_FCVTNS: fcvtns $rd, $rn */
1598  0,
1599  { CS_AC_WRITE, CS_AC_READ, 0 }
1600 },
1601 { /* AArch64_FCVTNSv1i64, ARM64_INS_FCVTNS: fcvtns $rd, $rn */
1602  0,
1603  { CS_AC_WRITE, CS_AC_READ, 0 }
1604 },
1605 { /* AArch64_FCVTNSv2f32, ARM64_INS_FCVTNS: fcvtns.2s $rd, $rn */
1606  0,
1607  { CS_AC_WRITE, CS_AC_READ, 0 }
1608 },
1609 { /* AArch64_FCVTNSv2f64, ARM64_INS_FCVTNS: fcvtns.2d $rd, $rn */
1610  0,
1611  { CS_AC_WRITE, CS_AC_READ, 0 }
1612 },
1613 { /* AArch64_FCVTNSv4f32, ARM64_INS_FCVTNS: fcvtns.4s $rd, $rn */
1614  0,
1615  { CS_AC_WRITE, CS_AC_READ, 0 }
1616 },
1617 { /* AArch64_FCVTNUUWDr, ARM64_INS_FCVTNU: fcvtnu $rd, $rn */
1618  0,
1619  { CS_AC_WRITE, CS_AC_READ, 0 }
1620 },
1621 { /* AArch64_FCVTNUUWSr, ARM64_INS_FCVTNU: fcvtnu $rd, $rn */
1622  0,
1623  { CS_AC_WRITE, CS_AC_READ, 0 }
1624 },
1625 { /* AArch64_FCVTNUUXDr, ARM64_INS_FCVTNU: fcvtnu $rd, $rn */
1626  0,
1627  { CS_AC_WRITE, CS_AC_READ, 0 }
1628 },
1629 { /* AArch64_FCVTNUUXSr, ARM64_INS_FCVTNU: fcvtnu $rd, $rn */
1630  0,
1631  { CS_AC_WRITE, CS_AC_READ, 0 }
1632 },
1633 { /* AArch64_FCVTNUv1i32, ARM64_INS_FCVTNU: fcvtnu $rd, $rn */
1634  0,
1635  { CS_AC_WRITE, CS_AC_READ, 0 }
1636 },
1637 { /* AArch64_FCVTNUv1i64, ARM64_INS_FCVTNU: fcvtnu $rd, $rn */
1638  0,
1639  { CS_AC_WRITE, CS_AC_READ, 0 }
1640 },
1641 { /* AArch64_FCVTNUv2f32, ARM64_INS_FCVTNU: fcvtnu.2s $rd, $rn */
1642  0,
1643  { CS_AC_WRITE, CS_AC_READ, 0 }
1644 },
1645 { /* AArch64_FCVTNUv2f64, ARM64_INS_FCVTNU: fcvtnu.2d $rd, $rn */
1646  0,
1647  { CS_AC_WRITE, CS_AC_READ, 0 }
1648 },
1649 { /* AArch64_FCVTNUv4f32, ARM64_INS_FCVTNU: fcvtnu.4s $rd, $rn */
1650  0,
1651  { CS_AC_WRITE, CS_AC_READ, 0 }
1652 },
1653 { /* AArch64_FCVTNv2i32, ARM64_INS_FCVTN: fcvtn $rd.2s, $rn.2d */
1654  0,
1655  { CS_AC_WRITE, CS_AC_READ, 0 }
1656 },
1657 { /* AArch64_FCVTNv4i16, ARM64_INS_FCVTN: fcvtn $rd.4h, $rn.4s */
1658  0,
1659  { CS_AC_WRITE, CS_AC_READ, 0 }
1660 },
1661 { /* AArch64_FCVTNv4i32, ARM64_INS_FCVTN2: fcvtn2 $rd.4s, $rn.2d */
1662  0,
1663  { CS_AC_WRITE, CS_AC_READ, 0 }
1664 },
1665 { /* AArch64_FCVTNv8i16, ARM64_INS_FCVTN2: fcvtn2 $rd.8h, $rn.4s */
1666  0,
1667  { CS_AC_WRITE, CS_AC_READ, 0 }
1668 },
1669 { /* AArch64_FCVTPSUWDr, ARM64_INS_FCVTPS: fcvtps $rd, $rn */
1670  0,
1671  { CS_AC_WRITE, CS_AC_READ, 0 }
1672 },
1673 { /* AArch64_FCVTPSUWSr, ARM64_INS_FCVTPS: fcvtps $rd, $rn */
1674  0,
1675  { CS_AC_WRITE, CS_AC_READ, 0 }
1676 },
1677 { /* AArch64_FCVTPSUXDr, ARM64_INS_FCVTPS: fcvtps $rd, $rn */
1678  0,
1679  { CS_AC_WRITE, CS_AC_READ, 0 }
1680 },
1681 { /* AArch64_FCVTPSUXSr, ARM64_INS_FCVTPS: fcvtps $rd, $rn */
1682  0,
1683  { CS_AC_WRITE, CS_AC_READ, 0 }
1684 },
1685 { /* AArch64_FCVTPSv1i32, ARM64_INS_FCVTPS: fcvtps $rd, $rn */
1686  0,
1687  { CS_AC_WRITE, CS_AC_READ, 0 }
1688 },
1689 { /* AArch64_FCVTPSv1i64, ARM64_INS_FCVTPS: fcvtps $rd, $rn */
1690  0,
1691  { CS_AC_WRITE, CS_AC_READ, 0 }
1692 },
1693 { /* AArch64_FCVTPSv2f32, ARM64_INS_FCVTPS: fcvtps.2s $rd, $rn */
1694  0,
1695  { CS_AC_WRITE, CS_AC_READ, 0 }
1696 },
1697 { /* AArch64_FCVTPSv2f64, ARM64_INS_FCVTPS: fcvtps.2d $rd, $rn */
1698  0,
1699  { CS_AC_WRITE, CS_AC_READ, 0 }
1700 },
1701 { /* AArch64_FCVTPSv4f32, ARM64_INS_FCVTPS: fcvtps.4s $rd, $rn */
1702  0,
1703  { CS_AC_WRITE, CS_AC_READ, 0 }
1704 },
1705 { /* AArch64_FCVTPUUWDr, ARM64_INS_FCVTPU: fcvtpu $rd, $rn */
1706  0,
1707  { CS_AC_WRITE, CS_AC_READ, 0 }
1708 },
1709 { /* AArch64_FCVTPUUWSr, ARM64_INS_FCVTPU: fcvtpu $rd, $rn */
1710  0,
1711  { CS_AC_WRITE, CS_AC_READ, 0 }
1712 },
1713 { /* AArch64_FCVTPUUXDr, ARM64_INS_FCVTPU: fcvtpu $rd, $rn */
1714  0,
1715  { CS_AC_WRITE, CS_AC_READ, 0 }
1716 },
1717 { /* AArch64_FCVTPUUXSr, ARM64_INS_FCVTPU: fcvtpu $rd, $rn */
1718  0,
1719  { CS_AC_WRITE, CS_AC_READ, 0 }
1720 },
1721 { /* AArch64_FCVTPUv1i32, ARM64_INS_FCVTPU: fcvtpu $rd, $rn */
1722  0,
1723  { CS_AC_WRITE, CS_AC_READ, 0 }
1724 },
1725 { /* AArch64_FCVTPUv1i64, ARM64_INS_FCVTPU: fcvtpu $rd, $rn */
1726  0,
1727  { CS_AC_WRITE, CS_AC_READ, 0 }
1728 },
1729 { /* AArch64_FCVTPUv2f32, ARM64_INS_FCVTPU: fcvtpu.2s $rd, $rn */
1730  0,
1731  { CS_AC_WRITE, CS_AC_READ, 0 }
1732 },
1733 { /* AArch64_FCVTPUv2f64, ARM64_INS_FCVTPU: fcvtpu.2d $rd, $rn */
1734  0,
1735  { CS_AC_WRITE, CS_AC_READ, 0 }
1736 },
1737 { /* AArch64_FCVTPUv4f32, ARM64_INS_FCVTPU: fcvtpu.4s $rd, $rn */
1738  0,
1739  { CS_AC_WRITE, CS_AC_READ, 0 }
1740 },
1741 { /* AArch64_FCVTSDr, ARM64_INS_FCVT: fcvt $rd, $rn */
1742  0,
1743  { CS_AC_WRITE, CS_AC_READ, 0 }
1744 },
1745 { /* AArch64_FCVTSHr, ARM64_INS_FCVT: fcvt $rd, $rn */
1746  0,
1747  { CS_AC_WRITE, CS_AC_READ, 0 }
1748 },
1749 { /* AArch64_FCVTXNv1i64, ARM64_INS_FCVTXN: fcvtxn $rd, $rn */
1750  0,
1751  { CS_AC_WRITE, CS_AC_READ, 0 }
1752 },
1753 { /* AArch64_FCVTXNv2f32, ARM64_INS_FCVTXN: fcvtxn $rd.2s, $rn.2d */
1754  0,
1755  { CS_AC_WRITE, CS_AC_READ, 0 }
1756 },
1757 { /* AArch64_FCVTXNv4f32, ARM64_INS_FCVTXN2: fcvtxn2 $rd.4s, $rn.2d */
1758  0,
1759  { CS_AC_WRITE, CS_AC_READ, 0 }
1760 },
1761 { /* AArch64_FCVTZSSWDri, ARM64_INS_FCVTZS: fcvtzs $rd, $rn, $scale */
1762  0,
1764 },
1765 { /* AArch64_FCVTZSSWSri, ARM64_INS_FCVTZS: fcvtzs $rd, $rn, $scale */
1766  0,
1768 },
1769 { /* AArch64_FCVTZSSXDri, ARM64_INS_FCVTZS: fcvtzs $rd, $rn, $scale */
1770  0,
1772 },
1773 { /* AArch64_FCVTZSSXSri, ARM64_INS_FCVTZS: fcvtzs $rd, $rn, $scale */
1774  0,
1776 },
1777 { /* AArch64_FCVTZSUWDr, ARM64_INS_FCVTZS: fcvtzs $rd, $rn */
1778  0,
1779  { CS_AC_WRITE, CS_AC_READ, 0 }
1780 },
1781 { /* AArch64_FCVTZSUWSr, ARM64_INS_FCVTZS: fcvtzs $rd, $rn */
1782  0,
1783  { CS_AC_WRITE, CS_AC_READ, 0 }
1784 },
1785 { /* AArch64_FCVTZSUXDr, ARM64_INS_FCVTZS: fcvtzs $rd, $rn */
1786  0,
1787  { CS_AC_WRITE, CS_AC_READ, 0 }
1788 },
1789 { /* AArch64_FCVTZSUXSr, ARM64_INS_FCVTZS: fcvtzs $rd, $rn */
1790  0,
1791  { CS_AC_WRITE, CS_AC_READ, 0 }
1792 },
1793 { /* AArch64_FCVTZS_IntSWDri, ARM64_INS_FCVTZS: fcvtzs $rd, $rn, $scale */
1794  0,
1796 },
1797 { /* AArch64_FCVTZS_IntSWSri, ARM64_INS_FCVTZS: fcvtzs $rd, $rn, $scale */
1798  0,
1800 },
1801 { /* AArch64_FCVTZS_IntSXDri, ARM64_INS_FCVTZS: fcvtzs $rd, $rn, $scale */
1802  0,
1804 },
1805 { /* AArch64_FCVTZS_IntSXSri, ARM64_INS_FCVTZS: fcvtzs $rd, $rn, $scale */
1806  0,
1808 },
1809 { /* AArch64_FCVTZS_IntUWDr, ARM64_INS_FCVTZS: fcvtzs $rd, $rn */
1810  0,
1811  { CS_AC_WRITE, CS_AC_READ, 0 }
1812 },
1813 { /* AArch64_FCVTZS_IntUWSr, ARM64_INS_FCVTZS: fcvtzs $rd, $rn */
1814  0,
1815  { CS_AC_WRITE, CS_AC_READ, 0 }
1816 },
1817 { /* AArch64_FCVTZS_IntUXDr, ARM64_INS_FCVTZS: fcvtzs $rd, $rn */
1818  0,
1819  { CS_AC_WRITE, CS_AC_READ, 0 }
1820 },
1821 { /* AArch64_FCVTZS_IntUXSr, ARM64_INS_FCVTZS: fcvtzs $rd, $rn */
1822  0,
1823  { CS_AC_WRITE, CS_AC_READ, 0 }
1824 },
1825 { /* AArch64_FCVTZS_Intv2f32, ARM64_INS_FCVTZS: fcvtzs.2s $rd, $rn */
1826  0,
1827  { CS_AC_WRITE, CS_AC_READ, 0 }
1828 },
1829 { /* AArch64_FCVTZS_Intv2f64, ARM64_INS_FCVTZS: fcvtzs.2d $rd, $rn */
1830  0,
1831  { CS_AC_WRITE, CS_AC_READ, 0 }
1832 },
1833 { /* AArch64_FCVTZS_Intv4f32, ARM64_INS_FCVTZS: fcvtzs.4s $rd, $rn */
1834  0,
1835  { CS_AC_WRITE, CS_AC_READ, 0 }
1836 },
1837 { /* AArch64_FCVTZSd, ARM64_INS_FCVTZS: fcvtzs $rd, $rn, $imm */
1838  0,
1840 },
1841 { /* AArch64_FCVTZSs, ARM64_INS_FCVTZS: fcvtzs $rd, $rn, $imm */
1842  0,
1844 },
1845 { /* AArch64_FCVTZSv1i32, ARM64_INS_FCVTZS: fcvtzs $rd, $rn */
1846  0,
1847  { CS_AC_WRITE, CS_AC_READ, 0 }
1848 },
1849 { /* AArch64_FCVTZSv1i64, ARM64_INS_FCVTZS: fcvtzs $rd, $rn */
1850  0,
1851  { CS_AC_WRITE, CS_AC_READ, 0 }
1852 },
1853 { /* AArch64_FCVTZSv2f32, ARM64_INS_FCVTZS: fcvtzs.2s $rd, $rn */
1854  0,
1855  { CS_AC_WRITE, CS_AC_READ, 0 }
1856 },
1857 { /* AArch64_FCVTZSv2f64, ARM64_INS_FCVTZS: fcvtzs.2d $rd, $rn */
1858  0,
1859  { CS_AC_WRITE, CS_AC_READ, 0 }
1860 },
1861 { /* AArch64_FCVTZSv2i32_shift, ARM64_INS_FCVTZS: fcvtzs.2s $rd, $rn, $imm */
1862  0,
1864 },
1865 { /* AArch64_FCVTZSv2i64_shift, ARM64_INS_FCVTZS: fcvtzs.2d $rd, $rn, $imm */
1866  0,
1868 },
1869 { /* AArch64_FCVTZSv4f32, ARM64_INS_FCVTZS: fcvtzs.4s $rd, $rn */
1870  0,
1871  { CS_AC_WRITE, CS_AC_READ, 0 }
1872 },
1873 { /* AArch64_FCVTZSv4i32_shift, ARM64_INS_FCVTZS: fcvtzs.4s $rd, $rn, $imm */
1874  0,
1876 },
1877 { /* AArch64_FCVTZUSWDri, ARM64_INS_FCVTZU: fcvtzu $rd, $rn, $scale */
1878  0,
1880 },
1881 { /* AArch64_FCVTZUSWSri, ARM64_INS_FCVTZU: fcvtzu $rd, $rn, $scale */
1882  0,
1884 },
1885 { /* AArch64_FCVTZUSXDri, ARM64_INS_FCVTZU: fcvtzu $rd, $rn, $scale */
1886  0,
1888 },
1889 { /* AArch64_FCVTZUSXSri, ARM64_INS_FCVTZU: fcvtzu $rd, $rn, $scale */
1890  0,
1892 },
1893 { /* AArch64_FCVTZUUWDr, ARM64_INS_FCVTZU: fcvtzu $rd, $rn */
1894  0,
1895  { CS_AC_WRITE, CS_AC_READ, 0 }
1896 },
1897 { /* AArch64_FCVTZUUWSr, ARM64_INS_FCVTZU: fcvtzu $rd, $rn */
1898  0,
1899  { CS_AC_WRITE, CS_AC_READ, 0 }
1900 },
1901 { /* AArch64_FCVTZUUXDr, ARM64_INS_FCVTZU: fcvtzu $rd, $rn */
1902  0,
1903  { CS_AC_WRITE, CS_AC_READ, 0 }
1904 },
1905 { /* AArch64_FCVTZUUXSr, ARM64_INS_FCVTZU: fcvtzu $rd, $rn */
1906  0,
1907  { CS_AC_WRITE, CS_AC_READ, 0 }
1908 },
1909 { /* AArch64_FCVTZU_IntSWDri, ARM64_INS_FCVTZU: fcvtzu $rd, $rn, $scale */
1910  0,
1912 },
1913 { /* AArch64_FCVTZU_IntSWSri, ARM64_INS_FCVTZU: fcvtzu $rd, $rn, $scale */
1914  0,
1916 },
1917 { /* AArch64_FCVTZU_IntSXDri, ARM64_INS_FCVTZU: fcvtzu $rd, $rn, $scale */
1918  0,
1920 },
1921 { /* AArch64_FCVTZU_IntSXSri, ARM64_INS_FCVTZU: fcvtzu $rd, $rn, $scale */
1922  0,
1924 },
1925 { /* AArch64_FCVTZU_IntUWDr, ARM64_INS_FCVTZU: fcvtzu $rd, $rn */
1926  0,
1927  { CS_AC_WRITE, CS_AC_READ, 0 }
1928 },
1929 { /* AArch64_FCVTZU_IntUWSr, ARM64_INS_FCVTZU: fcvtzu $rd, $rn */
1930  0,
1931  { CS_AC_WRITE, CS_AC_READ, 0 }
1932 },
1933 { /* AArch64_FCVTZU_IntUXDr, ARM64_INS_FCVTZU: fcvtzu $rd, $rn */
1934  0,
1935  { CS_AC_WRITE, CS_AC_READ, 0 }
1936 },
1937 { /* AArch64_FCVTZU_IntUXSr, ARM64_INS_FCVTZU: fcvtzu $rd, $rn */
1938  0,
1939  { CS_AC_WRITE, CS_AC_READ, 0 }
1940 },
1941 { /* AArch64_FCVTZU_Intv2f32, ARM64_INS_FCVTZU: fcvtzu.2s $rd, $rn */
1942  0,
1943  { CS_AC_WRITE, CS_AC_READ, 0 }
1944 },
1945 { /* AArch64_FCVTZU_Intv2f64, ARM64_INS_FCVTZU: fcvtzu.2d $rd, $rn */
1946  0,
1947  { CS_AC_WRITE, CS_AC_READ, 0 }
1948 },
1949 { /* AArch64_FCVTZU_Intv4f32, ARM64_INS_FCVTZU: fcvtzu.4s $rd, $rn */
1950  0,
1951  { CS_AC_WRITE, CS_AC_READ, 0 }
1952 },
1953 { /* AArch64_FCVTZUd, ARM64_INS_FCVTZU: fcvtzu $rd, $rn, $imm */
1954  0,
1956 },
1957 { /* AArch64_FCVTZUs, ARM64_INS_FCVTZU: fcvtzu $rd, $rn, $imm */
1958  0,
1960 },
1961 { /* AArch64_FCVTZUv1i32, ARM64_INS_FCVTZU: fcvtzu $rd, $rn */
1962  0,
1963  { CS_AC_WRITE, CS_AC_READ, 0 }
1964 },
1965 { /* AArch64_FCVTZUv1i64, ARM64_INS_FCVTZU: fcvtzu $rd, $rn */
1966  0,
1967  { CS_AC_WRITE, CS_AC_READ, 0 }
1968 },
1969 { /* AArch64_FCVTZUv2f32, ARM64_INS_FCVTZU: fcvtzu.2s $rd, $rn */
1970  0,
1971  { CS_AC_WRITE, CS_AC_READ, 0 }
1972 },
1973 { /* AArch64_FCVTZUv2f64, ARM64_INS_FCVTZU: fcvtzu.2d $rd, $rn */
1974  0,
1975  { CS_AC_WRITE, CS_AC_READ, 0 }
1976 },
1977 { /* AArch64_FCVTZUv2i32_shift, ARM64_INS_FCVTZU: fcvtzu.2s $rd, $rn, $imm */
1978  0,
1980 },
1981 { /* AArch64_FCVTZUv2i64_shift, ARM64_INS_FCVTZU: fcvtzu.2d $rd, $rn, $imm */
1982  0,
1984 },
1985 { /* AArch64_FCVTZUv4f32, ARM64_INS_FCVTZU: fcvtzu.4s $rd, $rn */
1986  0,
1987  { CS_AC_WRITE, CS_AC_READ, 0 }
1988 },
1989 { /* AArch64_FCVTZUv4i32_shift, ARM64_INS_FCVTZU: fcvtzu.4s $rd, $rn, $imm */
1990  0,
1992 },
1993 { /* AArch64_FDIVDrr, ARM64_INS_FDIV: fdiv $rd, $rn, $rm */
1994  0,
1996 },
1997 { /* AArch64_FDIVSrr, ARM64_INS_FDIV: fdiv $rd, $rn, $rm */
1998  0,
2000 },
2001 { /* AArch64_FDIVv2f32, ARM64_INS_FDIV: fdiv.2s $rd, $rn, $rm| */
2002  0,
2004 },
2005 { /* AArch64_FDIVv2f64, ARM64_INS_FDIV: fdiv.2d $rd, $rn, $rm| */
2006  0,
2008 },
2009 { /* AArch64_FDIVv4f32, ARM64_INS_FDIV: fdiv.4s $rd, $rn, $rm| */
2010  0,
2012 },
2013 { /* AArch64_FMADDDrrr, ARM64_INS_FMADD: fmadd $rd, $rn, $rm, $ra */
2014  0,
2016 },
2017 { /* AArch64_FMADDSrrr, ARM64_INS_FMADD: fmadd $rd, $rn, $rm, $ra */
2018  0,
2020 },
2021 { /* AArch64_FMAXDrr, ARM64_INS_FMAX: fmax $rd, $rn, $rm */
2022  0,
2024 },
2025 { /* AArch64_FMAXNMDrr, ARM64_INS_FMAXNM: fmaxnm $rd, $rn, $rm */
2026  0,
2028 },
2029 { /* AArch64_FMAXNMPv2f32, ARM64_INS_FMAXNMP: fmaxnmp.2s $rd, $rn, $rm| */
2030  0,
2032 },
2033 { /* AArch64_FMAXNMPv2f64, ARM64_INS_FMAXNMP: fmaxnmp.2d $rd, $rn, $rm| */
2034  0,
2036 },
2037 { /* AArch64_FMAXNMPv2i32p, ARM64_INS_FMAXNMP: fmaxnmp.2s $rd, $rn */
2038  0,
2039  { CS_AC_WRITE, CS_AC_READ, 0 }
2040 },
2041 { /* AArch64_FMAXNMPv2i64p, ARM64_INS_FMAXNMP: fmaxnmp.2d $rd, $rn */
2042  0,
2043  { CS_AC_WRITE, CS_AC_READ, 0 }
2044 },
2045 { /* AArch64_FMAXNMPv4f32, ARM64_INS_FMAXNMP: fmaxnmp.4s $rd, $rn, $rm| */
2046  0,
2048 },
2049 { /* AArch64_FMAXNMSrr, ARM64_INS_FMAXNM: fmaxnm $rd, $rn, $rm */
2050  0,
2052 },
2053 { /* AArch64_FMAXNMVv4i32v, ARM64_INS_FMAXNMV: fmaxnmv.4s $rd, $rn */
2054  0,
2055  { CS_AC_WRITE, CS_AC_READ, 0 }
2056 },
2057 { /* AArch64_FMAXNMv2f32, ARM64_INS_FMAXNM: fmaxnm.2s $rd, $rn, $rm| */
2058  0,
2060 },
2061 { /* AArch64_FMAXNMv2f64, ARM64_INS_FMAXNM: fmaxnm.2d $rd, $rn, $rm| */
2062  0,
2064 },
2065 { /* AArch64_FMAXNMv4f32, ARM64_INS_FMAXNM: fmaxnm.4s $rd, $rn, $rm| */
2066  0,
2068 },
2069 { /* AArch64_FMAXPv2f32, ARM64_INS_FMAXP: fmaxp.2s $rd, $rn, $rm| */
2070  0,
2072 },
2073 { /* AArch64_FMAXPv2f64, ARM64_INS_FMAXP: fmaxp.2d $rd, $rn, $rm| */
2074  0,
2076 },
2077 { /* AArch64_FMAXPv2i32p, ARM64_INS_FMAXP: fmaxp.2s $rd, $rn */
2078  0,
2079  { CS_AC_WRITE, CS_AC_READ, 0 }
2080 },
2081 { /* AArch64_FMAXPv2i64p, ARM64_INS_FMAXP: fmaxp.2d $rd, $rn */
2082  0,
2083  { CS_AC_WRITE, CS_AC_READ, 0 }
2084 },
2085 { /* AArch64_FMAXPv4f32, ARM64_INS_FMAXP: fmaxp.4s $rd, $rn, $rm| */
2086  0,
2088 },
2089 { /* AArch64_FMAXSrr, ARM64_INS_FMAX: fmax $rd, $rn, $rm */
2090  0,
2092 },
2093 { /* AArch64_FMAXVv4i32v, ARM64_INS_FMAXV: fmaxv.4s $rd, $rn */
2094  0,
2095  { CS_AC_WRITE, CS_AC_READ, 0 }
2096 },
2097 { /* AArch64_FMAXv2f32, ARM64_INS_FMAX: fmax.2s $rd, $rn, $rm| */
2098  0,
2100 },
2101 { /* AArch64_FMAXv2f64, ARM64_INS_FMAX: fmax.2d $rd, $rn, $rm| */
2102  0,
2104 },
2105 { /* AArch64_FMAXv4f32, ARM64_INS_FMAX: fmax.4s $rd, $rn, $rm| */
2106  0,
2108 },
2109 { /* AArch64_FMINDrr, ARM64_INS_FMIN: fmin $rd, $rn, $rm */
2110  0,
2112 },
2113 { /* AArch64_FMINNMDrr, ARM64_INS_FMINNM: fminnm $rd, $rn, $rm */
2114  0,
2116 },
2117 { /* AArch64_FMINNMPv2f32, ARM64_INS_FMINNMP: fminnmp.2s $rd, $rn, $rm| */
2118  0,
2120 },
2121 { /* AArch64_FMINNMPv2f64, ARM64_INS_FMINNMP: fminnmp.2d $rd, $rn, $rm| */
2122  0,
2124 },
2125 { /* AArch64_FMINNMPv2i32p, ARM64_INS_FMINNMP: fminnmp.2s $rd, $rn */
2126  0,
2127  { CS_AC_WRITE, CS_AC_READ, 0 }
2128 },
2129 { /* AArch64_FMINNMPv2i64p, ARM64_INS_FMINNMP: fminnmp.2d $rd, $rn */
2130  0,
2131  { CS_AC_WRITE, CS_AC_READ, 0 }
2132 },
2133 { /* AArch64_FMINNMPv4f32, ARM64_INS_FMINNMP: fminnmp.4s $rd, $rn, $rm| */
2134  0,
2136 },
2137 { /* AArch64_FMINNMSrr, ARM64_INS_FMINNM: fminnm $rd, $rn, $rm */
2138  0,
2140 },
2141 { /* AArch64_FMINNMVv4i32v, ARM64_INS_FMINNMV: fminnmv.4s $rd, $rn */
2142  0,
2143  { CS_AC_WRITE, CS_AC_READ, 0 }
2144 },
2145 { /* AArch64_FMINNMv2f32, ARM64_INS_FMINNM: fminnm.2s $rd, $rn, $rm| */
2146  0,
2148 },
2149 { /* AArch64_FMINNMv2f64, ARM64_INS_FMINNM: fminnm.2d $rd, $rn, $rm| */
2150  0,
2152 },
2153 { /* AArch64_FMINNMv4f32, ARM64_INS_FMINNM: fminnm.4s $rd, $rn, $rm| */
2154  0,
2156 },
2157 { /* AArch64_FMINPv2f32, ARM64_INS_FMINP: fminp.2s $rd, $rn, $rm| */
2158  0,
2160 },
2161 { /* AArch64_FMINPv2f64, ARM64_INS_FMINP: fminp.2d $rd, $rn, $rm| */
2162  0,
2164 },
2165 { /* AArch64_FMINPv2i32p, ARM64_INS_FMINP: fminp.2s $rd, $rn */
2166  0,
2167  { CS_AC_WRITE, CS_AC_READ, 0 }
2168 },
2169 { /* AArch64_FMINPv2i64p, ARM64_INS_FMINP: fminp.2d $rd, $rn */
2170  0,
2171  { CS_AC_WRITE, CS_AC_READ, 0 }
2172 },
2173 { /* AArch64_FMINPv4f32, ARM64_INS_FMINP: fminp.4s $rd, $rn, $rm| */
2174  0,
2176 },
2177 { /* AArch64_FMINSrr, ARM64_INS_FMIN: fmin $rd, $rn, $rm */
2178  0,
2180 },
2181 { /* AArch64_FMINVv4i32v, ARM64_INS_FMINV: fminv.4s $rd, $rn */
2182  0,
2183  { CS_AC_WRITE, CS_AC_READ, 0 }
2184 },
2185 { /* AArch64_FMINv2f32, ARM64_INS_FMIN: fmin.2s $rd, $rn, $rm| */
2186  0,
2188 },
2189 { /* AArch64_FMINv2f64, ARM64_INS_FMIN: fmin.2d $rd, $rn, $rm| */
2190  0,
2192 },
2193 { /* AArch64_FMINv4f32, ARM64_INS_FMIN: fmin.4s $rd, $rn, $rm| */
2194  0,
2196 },
2197 { /* AArch64_FMLAv1i32_indexed, ARM64_INS_FMLA: fmla.s $rd, $rn, $rm$idx */
2198  0,
2200 },
2201 { /* AArch64_FMLAv1i64_indexed, ARM64_INS_FMLA: fmla.d $rd, $rn, $rm$idx */
2202  0,
2204 },
2205 { /* AArch64_FMLAv2f32, ARM64_INS_FMLA: fmla.2s $rd, $rn, $rm */
2206  0,
2208 },
2209 { /* AArch64_FMLAv2f64, ARM64_INS_FMLA: fmla.2d $rd, $rn, $rm */
2210  0,
2212 },
2213 { /* AArch64_FMLAv2i32_indexed, ARM64_INS_FMLA: fmla.2s $rd, $rn, $rm$idx */
2214  0,
2216 },
2217 { /* AArch64_FMLAv2i64_indexed, ARM64_INS_FMLA: fmla.2d $rd, $rn, $rm$idx */
2218  0,
2220 },
2221 { /* AArch64_FMLAv4f32, ARM64_INS_FMLA: fmla.4s $rd, $rn, $rm */
2222  0,
2224 },
2225 { /* AArch64_FMLAv4i32_indexed, ARM64_INS_FMLA: fmla.4s $rd, $rn, $rm$idx */
2226  0,
2228 },
2229 { /* AArch64_FMLSv1i32_indexed, ARM64_INS_FMLS: fmls.s $rd, $rn, $rm$idx */
2230  0,
2232 },
2233 { /* AArch64_FMLSv1i64_indexed, ARM64_INS_FMLS: fmls.d $rd, $rn, $rm$idx */
2234  0,
2236 },
2237 { /* AArch64_FMLSv2f32, ARM64_INS_FMLS: fmls.2s $rd, $rn, $rm */
2238  0,
2240 },
2241 { /* AArch64_FMLSv2f64, ARM64_INS_FMLS: fmls.2d $rd, $rn, $rm */
2242  0,
2244 },
2245 { /* AArch64_FMLSv2i32_indexed, ARM64_INS_FMLS: fmls.2s $rd, $rn, $rm$idx */
2246  0,
2248 },
2249 { /* AArch64_FMLSv2i64_indexed, ARM64_INS_FMLS: fmls.2d $rd, $rn, $rm$idx */
2250  0,
2252 },
2253 { /* AArch64_FMLSv4f32, ARM64_INS_FMLS: fmls.4s $rd, $rn, $rm */
2254  0,
2256 },
2257 { /* AArch64_FMLSv4i32_indexed, ARM64_INS_FMLS: fmls.4s $rd, $rn, $rm$idx */
2258  0,
2260 },
2261 { /* AArch64_FMOVDXHighr, ARM64_INS_FMOV: fmov.d $rd, $rn$idx */
2262  0,
2263  { CS_AC_WRITE, CS_AC_READ, 0 }
2264 },
2265 { /* AArch64_FMOVDXr, ARM64_INS_FMOV: fmov $rd, $rn */
2266  0,
2267  { CS_AC_WRITE, CS_AC_READ, 0 }
2268 },
2269 { /* AArch64_FMOVDi, ARM64_INS_FMOV: fmov $rd, $imm */
2270  0,
2272 },
2273 { /* AArch64_FMOVDr, ARM64_INS_FMOV: fmov $rd, $rn */
2274  0,
2275  { CS_AC_WRITE, CS_AC_READ, 0 }
2276 },
2277 { /* AArch64_FMOVSWr, ARM64_INS_FMOV: fmov $rd, $rn */
2278  0,
2279  { CS_AC_WRITE, CS_AC_READ, 0 }
2280 },
2281 { /* AArch64_FMOVSi, ARM64_INS_FMOV: fmov $rd, $imm */
2282  0,
2284 },
2285 { /* AArch64_FMOVSr, ARM64_INS_FMOV: fmov $rd, $rn */
2286  0,
2287  { CS_AC_WRITE, CS_AC_READ, 0 }
2288 },
2289 { /* AArch64_FMOVWSr, ARM64_INS_FMOV: fmov $rd, $rn */
2290  0,
2291  { CS_AC_WRITE, CS_AC_READ, 0 }
2292 },
2293 { /* AArch64_FMOVXDHighr, ARM64_INS_FMOV: fmov.d $rd$idx, $rn */
2294  0,
2295  { CS_AC_WRITE, CS_AC_READ, 0 }
2296 },
2297 { /* AArch64_FMOVXDr, ARM64_INS_FMOV: fmov $rd, $rn */
2298  0,
2299  { CS_AC_WRITE, CS_AC_READ, 0 }
2300 },
2301 { /* AArch64_FMOVv2f32_ns, ARM64_INS_FMOV: fmov.2s $rd, $imm8 */
2302  0,
2304 },
2305 { /* AArch64_FMOVv2f64_ns, ARM64_INS_FMOV: fmov.2d $rd, $imm8 */
2306  0,
2308 },
2309 { /* AArch64_FMOVv4f32_ns, ARM64_INS_FMOV: fmov.4s $rd, $imm8 */
2310  0,
2312 },
2313 { /* AArch64_FMSUBDrrr, ARM64_INS_FMSUB: fmsub $rd, $rn, $rm, $ra */
2314  0,
2316 },
2317 { /* AArch64_FMSUBSrrr, ARM64_INS_FMSUB: fmsub $rd, $rn, $rm, $ra */
2318  0,
2320 },
2321 { /* AArch64_FMULDrr, ARM64_INS_FMUL: fmul $rd, $rn, $rm */
2322  0,
2324 },
2325 { /* AArch64_FMULSrr, ARM64_INS_FMUL: fmul $rd, $rn, $rm */
2326  0,
2328 },
2329 { /* AArch64_FMULX32, ARM64_INS_FMULX: fmulx $rd, $rn, $rm */
2330  0,
2332 },
2333 { /* AArch64_FMULX64, ARM64_INS_FMULX: fmulx $rd, $rn, $rm */
2334  0,
2336 },
2337 { /* AArch64_FMULXv1i32_indexed, ARM64_INS_FMULX: fmulx.s $rd, $rn, $rm$idx */
2338  0,
2340 },
2341 { /* AArch64_FMULXv1i64_indexed, ARM64_INS_FMULX: fmulx.d $rd, $rn, $rm$idx */
2342  0,
2344 },
2345 { /* AArch64_FMULXv2f32, ARM64_INS_FMULX: fmulx.2s $rd, $rn, $rm| */
2346  0,
2348 },
2349 { /* AArch64_FMULXv2f64, ARM64_INS_FMULX: fmulx.2d $rd, $rn, $rm| */
2350  0,
2352 },
2353 { /* AArch64_FMULXv2i32_indexed, ARM64_INS_FMULX: fmulx.2s $rd, $rn, $rm$idx */
2354  0,
2356 },
2357 { /* AArch64_FMULXv2i64_indexed, ARM64_INS_FMULX: fmulx.2d $rd, $rn, $rm$idx */
2358  0,
2360 },
2361 { /* AArch64_FMULXv4f32, ARM64_INS_FMULX: fmulx.4s $rd, $rn, $rm| */
2362  0,
2364 },
2365 { /* AArch64_FMULXv4i32_indexed, ARM64_INS_FMULX: fmulx.4s $rd, $rn, $rm$idx */
2366  0,
2368 },
2369 { /* AArch64_FMULv1i32_indexed, ARM64_INS_FMUL: fmul.s $rd, $rn, $rm$idx */
2370  0,
2372 },
2373 { /* AArch64_FMULv1i64_indexed, ARM64_INS_FMUL: fmul.d $rd, $rn, $rm$idx */
2374  0,
2376 },
2377 { /* AArch64_FMULv2f32, ARM64_INS_FMUL: fmul.2s $rd, $rn, $rm| */
2378  0,
2380 },
2381 { /* AArch64_FMULv2f64, ARM64_INS_FMUL: fmul.2d $rd, $rn, $rm| */
2382  0,
2384 },
2385 { /* AArch64_FMULv2i32_indexed, ARM64_INS_FMUL: fmul.2s $rd, $rn, $rm$idx */
2386  0,
2388 },
2389 { /* AArch64_FMULv2i64_indexed, ARM64_INS_FMUL: fmul.2d $rd, $rn, $rm$idx */
2390  0,
2392 },
2393 { /* AArch64_FMULv4f32, ARM64_INS_FMUL: fmul.4s $rd, $rn, $rm| */
2394  0,
2396 },
2397 { /* AArch64_FMULv4i32_indexed, ARM64_INS_FMUL: fmul.4s $rd, $rn, $rm$idx */
2398  0,
2400 },
2401 { /* AArch64_FNEGDr, ARM64_INS_FNEG: fneg $rd, $rn */
2402  0,
2403  { CS_AC_WRITE, CS_AC_READ, 0 }
2404 },
2405 { /* AArch64_FNEGSr, ARM64_INS_FNEG: fneg $rd, $rn */
2406  0,
2407  { CS_AC_WRITE, CS_AC_READ, 0 }
2408 },
2409 { /* AArch64_FNEGv2f32, ARM64_INS_FNEG: fneg.2s $rd, $rn */
2410  0,
2411  { CS_AC_WRITE, CS_AC_READ, 0 }
2412 },
2413 { /* AArch64_FNEGv2f64, ARM64_INS_FNEG: fneg.2d $rd, $rn */
2414  0,
2415  { CS_AC_WRITE, CS_AC_READ, 0 }
2416 },
2417 { /* AArch64_FNEGv4f32, ARM64_INS_FNEG: fneg.4s $rd, $rn */
2418  0,
2419  { CS_AC_WRITE, CS_AC_READ, 0 }
2420 },
2421 { /* AArch64_FNMADDDrrr, ARM64_INS_FNMADD: fnmadd $rd, $rn, $rm, $ra */
2422  0,
2424 },
2425 { /* AArch64_FNMADDSrrr, ARM64_INS_FNMADD: fnmadd $rd, $rn, $rm, $ra */
2426  0,
2428 },
2429 { /* AArch64_FNMSUBDrrr, ARM64_INS_FNMSUB: fnmsub $rd, $rn, $rm, $ra */
2430  0,
2432 },
2433 { /* AArch64_FNMSUBSrrr, ARM64_INS_FNMSUB: fnmsub $rd, $rn, $rm, $ra */
2434  0,
2436 },
2437 { /* AArch64_FNMULDrr, ARM64_INS_FNMUL: fnmul $rd, $rn, $rm */
2438  0,
2440 },
2441 { /* AArch64_FNMULSrr, ARM64_INS_FNMUL: fnmul $rd, $rn, $rm */
2442  0,
2444 },
2445 { /* AArch64_FRECPEv1i32, ARM64_INS_FRECPE: frecpe $rd, $rn */
2446  0,
2447  { CS_AC_WRITE, CS_AC_READ, 0 }
2448 },
2449 { /* AArch64_FRECPEv1i64, ARM64_INS_FRECPE: frecpe $rd, $rn */
2450  0,
2451  { CS_AC_WRITE, CS_AC_READ, 0 }
2452 },
2453 { /* AArch64_FRECPEv2f32, ARM64_INS_FRECPE: frecpe.2s $rd, $rn */
2454  0,
2455  { CS_AC_WRITE, CS_AC_READ, 0 }
2456 },
2457 { /* AArch64_FRECPEv2f64, ARM64_INS_FRECPE: frecpe.2d $rd, $rn */
2458  0,
2459  { CS_AC_WRITE, CS_AC_READ, 0 }
2460 },
2461 { /* AArch64_FRECPEv4f32, ARM64_INS_FRECPE: frecpe.4s $rd, $rn */
2462  0,
2463  { CS_AC_WRITE, CS_AC_READ, 0 }
2464 },
2465 { /* AArch64_FRECPS32, ARM64_INS_FRECPS: frecps $rd, $rn, $rm */
2466  0,
2468 },
2469 { /* AArch64_FRECPS64, ARM64_INS_FRECPS: frecps $rd, $rn, $rm */
2470  0,
2472 },
2473 { /* AArch64_FRECPSv2f32, ARM64_INS_FRECPS: frecps.2s $rd, $rn, $rm| */
2474  0,
2476 },
2477 { /* AArch64_FRECPSv2f64, ARM64_INS_FRECPS: frecps.2d $rd, $rn, $rm| */
2478  0,
2480 },
2481 { /* AArch64_FRECPSv4f32, ARM64_INS_FRECPS: frecps.4s $rd, $rn, $rm| */
2482  0,
2484 },
2485 { /* AArch64_FRECPXv1i32, ARM64_INS_FRECPX: frecpx $rd, $rn */
2486  0,
2487  { CS_AC_WRITE, CS_AC_READ, 0 }
2488 },
2489 { /* AArch64_FRECPXv1i64, ARM64_INS_FRECPX: frecpx $rd, $rn */
2490  0,
2491  { CS_AC_WRITE, CS_AC_READ, 0 }
2492 },
2493 { /* AArch64_FRINTADr, ARM64_INS_FRINTA: frinta $rd, $rn */
2494  0,
2495  { CS_AC_WRITE, CS_AC_READ, 0 }
2496 },
2497 { /* AArch64_FRINTASr, ARM64_INS_FRINTA: frinta $rd, $rn */
2498  0,
2499  { CS_AC_WRITE, CS_AC_READ, 0 }
2500 },
2501 { /* AArch64_FRINTAv2f32, ARM64_INS_FRINTA: frinta.2s $rd, $rn */
2502  0,
2503  { CS_AC_WRITE, CS_AC_READ, 0 }
2504 },
2505 { /* AArch64_FRINTAv2f64, ARM64_INS_FRINTA: frinta.2d $rd, $rn */
2506  0,
2507  { CS_AC_WRITE, CS_AC_READ, 0 }
2508 },
2509 { /* AArch64_FRINTAv4f32, ARM64_INS_FRINTA: frinta.4s $rd, $rn */
2510  0,
2511  { CS_AC_WRITE, CS_AC_READ, 0 }
2512 },
2513 { /* AArch64_FRINTIDr, ARM64_INS_FRINTI: frinti $rd, $rn */
2514  0,
2515  { CS_AC_WRITE, CS_AC_READ, 0 }
2516 },
2517 { /* AArch64_FRINTISr, ARM64_INS_FRINTI: frinti $rd, $rn */
2518  0,
2519  { CS_AC_WRITE, CS_AC_READ, 0 }
2520 },
2521 { /* AArch64_FRINTIv2f32, ARM64_INS_FRINTI: frinti.2s $rd, $rn */
2522  0,
2523  { CS_AC_WRITE, CS_AC_READ, 0 }
2524 },
2525 { /* AArch64_FRINTIv2f64, ARM64_INS_FRINTI: frinti.2d $rd, $rn */
2526  0,
2527  { CS_AC_WRITE, CS_AC_READ, 0 }
2528 },
2529 { /* AArch64_FRINTIv4f32, ARM64_INS_FRINTI: frinti.4s $rd, $rn */
2530  0,
2531  { CS_AC_WRITE, CS_AC_READ, 0 }
2532 },
2533 { /* AArch64_FRINTMDr, ARM64_INS_FRINTM: frintm $rd, $rn */
2534  0,
2535  { CS_AC_WRITE, CS_AC_READ, 0 }
2536 },
2537 { /* AArch64_FRINTMSr, ARM64_INS_FRINTM: frintm $rd, $rn */
2538  0,
2539  { CS_AC_WRITE, CS_AC_READ, 0 }
2540 },
2541 { /* AArch64_FRINTMv2f32, ARM64_INS_FRINTM: frintm.2s $rd, $rn */
2542  0,
2543  { CS_AC_WRITE, CS_AC_READ, 0 }
2544 },
2545 { /* AArch64_FRINTMv2f64, ARM64_INS_FRINTM: frintm.2d $rd, $rn */
2546  0,
2547  { CS_AC_WRITE, CS_AC_READ, 0 }
2548 },
2549 { /* AArch64_FRINTMv4f32, ARM64_INS_FRINTM: frintm.4s $rd, $rn */
2550  0,
2551  { CS_AC_WRITE, CS_AC_READ, 0 }
2552 },
2553 { /* AArch64_FRINTNDr, ARM64_INS_FRINTN: frintn $rd, $rn */
2554  0,
2555  { CS_AC_WRITE, CS_AC_READ, 0 }
2556 },
2557 { /* AArch64_FRINTNSr, ARM64_INS_FRINTN: frintn $rd, $rn */
2558  0,
2559  { CS_AC_WRITE, CS_AC_READ, 0 }
2560 },
2561 { /* AArch64_FRINTNv2f32, ARM64_INS_FRINTN: frintn.2s $rd, $rn */
2562  0,
2563  { CS_AC_WRITE, CS_AC_READ, 0 }
2564 },
2565 { /* AArch64_FRINTNv2f64, ARM64_INS_FRINTN: frintn.2d $rd, $rn */
2566  0,
2567  { CS_AC_WRITE, CS_AC_READ, 0 }
2568 },
2569 { /* AArch64_FRINTNv4f32, ARM64_INS_FRINTN: frintn.4s $rd, $rn */
2570  0,
2571  { CS_AC_WRITE, CS_AC_READ, 0 }
2572 },
2573 { /* AArch64_FRINTPDr, ARM64_INS_FRINTP: frintp $rd, $rn */
2574  0,
2575  { CS_AC_WRITE, CS_AC_READ, 0 }
2576 },
2577 { /* AArch64_FRINTPSr, ARM64_INS_FRINTP: frintp $rd, $rn */
2578  0,
2579  { CS_AC_WRITE, CS_AC_READ, 0 }
2580 },
2581 { /* AArch64_FRINTPv2f32, ARM64_INS_FRINTP: frintp.2s $rd, $rn */
2582  0,
2583  { CS_AC_WRITE, CS_AC_READ, 0 }
2584 },
2585 { /* AArch64_FRINTPv2f64, ARM64_INS_FRINTP: frintp.2d $rd, $rn */
2586  0,
2587  { CS_AC_WRITE, CS_AC_READ, 0 }
2588 },
2589 { /* AArch64_FRINTPv4f32, ARM64_INS_FRINTP: frintp.4s $rd, $rn */
2590  0,
2591  { CS_AC_WRITE, CS_AC_READ, 0 }
2592 },
2593 { /* AArch64_FRINTXDr, ARM64_INS_FRINTX: frintx $rd, $rn */
2594  0,
2595  { CS_AC_WRITE, CS_AC_READ, 0 }
2596 },
2597 { /* AArch64_FRINTXSr, ARM64_INS_FRINTX: frintx $rd, $rn */
2598  0,
2599  { CS_AC_WRITE, CS_AC_READ, 0 }
2600 },
2601 { /* AArch64_FRINTXv2f32, ARM64_INS_FRINTX: frintx.2s $rd, $rn */
2602  0,
2603  { CS_AC_WRITE, CS_AC_READ, 0 }
2604 },
2605 { /* AArch64_FRINTXv2f64, ARM64_INS_FRINTX: frintx.2d $rd, $rn */
2606  0,
2607  { CS_AC_WRITE, CS_AC_READ, 0 }
2608 },
2609 { /* AArch64_FRINTXv4f32, ARM64_INS_FRINTX: frintx.4s $rd, $rn */
2610  0,
2611  { CS_AC_WRITE, CS_AC_READ, 0 }
2612 },
2613 { /* AArch64_FRINTZDr, ARM64_INS_FRINTZ: frintz $rd, $rn */
2614  0,
2615  { CS_AC_WRITE, CS_AC_READ, 0 }
2616 },
2617 { /* AArch64_FRINTZSr, ARM64_INS_FRINTZ: frintz $rd, $rn */
2618  0,
2619  { CS_AC_WRITE, CS_AC_READ, 0 }
2620 },
2621 { /* AArch64_FRINTZv2f32, ARM64_INS_FRINTZ: frintz.2s $rd, $rn */
2622  0,
2623  { CS_AC_WRITE, CS_AC_READ, 0 }
2624 },
2625 { /* AArch64_FRINTZv2f64, ARM64_INS_FRINTZ: frintz.2d $rd, $rn */
2626  0,
2627  { CS_AC_WRITE, CS_AC_READ, 0 }
2628 },
2629 { /* AArch64_FRINTZv4f32, ARM64_INS_FRINTZ: frintz.4s $rd, $rn */
2630  0,
2631  { CS_AC_WRITE, CS_AC_READ, 0 }
2632 },
2633 { /* AArch64_FRSQRTEv1i32, ARM64_INS_FRSQRTE: frsqrte $rd, $rn */
2634  0,
2635  { CS_AC_WRITE, CS_AC_READ, 0 }
2636 },
2637 { /* AArch64_FRSQRTEv1i64, ARM64_INS_FRSQRTE: frsqrte $rd, $rn */
2638  0,
2639  { CS_AC_WRITE, CS_AC_READ, 0 }
2640 },
2641 { /* AArch64_FRSQRTEv2f32, ARM64_INS_FRSQRTE: frsqrte.2s $rd, $rn */
2642  0,
2643  { CS_AC_WRITE, CS_AC_READ, 0 }
2644 },
2645 { /* AArch64_FRSQRTEv2f64, ARM64_INS_FRSQRTE: frsqrte.2d $rd, $rn */
2646  0,
2647  { CS_AC_WRITE, CS_AC_READ, 0 }
2648 },
2649 { /* AArch64_FRSQRTEv4f32, ARM64_INS_FRSQRTE: frsqrte.4s $rd, $rn */
2650  0,
2651  { CS_AC_WRITE, CS_AC_READ, 0 }
2652 },
2653 { /* AArch64_FRSQRTS32, ARM64_INS_FRSQRTS: frsqrts $rd, $rn, $rm */
2654  0,
2656 },
2657 { /* AArch64_FRSQRTS64, ARM64_INS_FRSQRTS: frsqrts $rd, $rn, $rm */
2658  0,
2660 },
2661 { /* AArch64_FRSQRTSv2f32, ARM64_INS_FRSQRTS: frsqrts.2s $rd, $rn, $rm| */
2662  0,
2664 },
2665 { /* AArch64_FRSQRTSv2f64, ARM64_INS_FRSQRTS: frsqrts.2d $rd, $rn, $rm| */
2666  0,
2668 },
2669 { /* AArch64_FRSQRTSv4f32, ARM64_INS_FRSQRTS: frsqrts.4s $rd, $rn, $rm| */
2670  0,
2672 },
2673 { /* AArch64_FSQRTDr, ARM64_INS_FSQRT: fsqrt $rd, $rn */
2674  0,
2675  { CS_AC_WRITE, CS_AC_READ, 0 }
2676 },
2677 { /* AArch64_FSQRTSr, ARM64_INS_FSQRT: fsqrt $rd, $rn */
2678  0,
2679  { CS_AC_WRITE, CS_AC_READ, 0 }
2680 },
2681 { /* AArch64_FSQRTv2f32, ARM64_INS_FSQRT: fsqrt.2s $rd, $rn */
2682  0,
2683  { CS_AC_WRITE, CS_AC_READ, 0 }
2684 },
2685 { /* AArch64_FSQRTv2f64, ARM64_INS_FSQRT: fsqrt.2d $rd, $rn */
2686  0,
2687  { CS_AC_WRITE, CS_AC_READ, 0 }
2688 },
2689 { /* AArch64_FSQRTv4f32, ARM64_INS_FSQRT: fsqrt.4s $rd, $rn */
2690  0,
2691  { CS_AC_WRITE, CS_AC_READ, 0 }
2692 },
2693 { /* AArch64_FSUBDrr, ARM64_INS_FSUB: fsub $rd, $rn, $rm */
2694  0,
2696 },
2697 { /* AArch64_FSUBSrr, ARM64_INS_FSUB: fsub $rd, $rn, $rm */
2698  0,
2700 },
2701 { /* AArch64_FSUBv2f32, ARM64_INS_FSUB: fsub.2s $rd, $rn, $rm| */
2702  0,
2704 },
2705 { /* AArch64_FSUBv2f64, ARM64_INS_FSUB: fsub.2d $rd, $rn, $rm| */
2706  0,
2708 },
2709 { /* AArch64_FSUBv4f32, ARM64_INS_FSUB: fsub.4s $rd, $rn, $rm| */
2710  0,
2712 },
2713 { /* AArch64_HINT, ARM64_INS_HINT: hint $imm */
2714  0,
2715  { CS_AC_READ, 0 }
2716 },
2717 { /* AArch64_HLT, ARM64_INS_HLT: hlt $imm */
2718  0,
2719  { CS_AC_READ, 0 }
2720 },
2721 { /* AArch64_HVC, ARM64_INS_HVC: hvc $imm */
2722  0,
2723  { CS_AC_READ, 0 }
2724 },
2725 { /* AArch64_INSvi16gpr, ARM64_INS_INS: ins.h $rd$idx, $rn */
2726  0,
2728 },
2729 { /* AArch64_INSvi16lane, ARM64_INS_INS: ins.h $rd$idx, $rn$idx2 */
2730  0,
2732 },
2733 { /* AArch64_INSvi32gpr, ARM64_INS_INS: ins.s $rd$idx, $rn */
2734  0,
2736 },
2737 { /* AArch64_INSvi32lane, ARM64_INS_INS: ins.s $rd$idx, $rn$idx2 */
2738  0,
2740 },
2741 { /* AArch64_INSvi64gpr, ARM64_INS_INS: ins.d $rd$idx, $rn */
2742  0,
2744 },
2745 { /* AArch64_INSvi64lane, ARM64_INS_INS: ins.d $rd$idx, $rn$idx2 */
2746  0,
2748 },
2749 { /* AArch64_INSvi8gpr, ARM64_INS_INS: ins.b $rd$idx, $rn */
2750  0,
2752 },
2753 { /* AArch64_INSvi8lane, ARM64_INS_INS: ins.b $rd$idx, $rn$idx2 */
2754  0,
2756 },
2757 { /* AArch64_ISB, ARM64_INS_ISB: isb $crm */
2758  0,
2759  { 0 }
2760 },
2761 { /* AArch64_LD1Fourv16b, ARM64_INS_LD1: ld1 $vt, [$rn] */
2762  0,
2764 },
2765 { /* AArch64_LD1Fourv16b_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */
2766  0,
2768 },
2769 { /* AArch64_LD1Fourv1d, ARM64_INS_LD1: ld1 $vt, [$rn] */
2770  0,
2772 },
2773 { /* AArch64_LD1Fourv1d_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */
2774  0,
2776 },
2777 { /* AArch64_LD1Fourv2d, ARM64_INS_LD1: ld1 $vt, [$rn] */
2778  0,
2780 },
2781 { /* AArch64_LD1Fourv2d_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */
2782  0,
2784 },
2785 { /* AArch64_LD1Fourv2s, ARM64_INS_LD1: ld1 $vt, [$rn] */
2786  0,
2788 },
2789 { /* AArch64_LD1Fourv2s_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */
2790  0,
2792 },
2793 { /* AArch64_LD1Fourv4h, ARM64_INS_LD1: ld1 $vt, [$rn] */
2794  0,
2796 },
2797 { /* AArch64_LD1Fourv4h_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */
2798  0,
2800 },
2801 { /* AArch64_LD1Fourv4s, ARM64_INS_LD1: ld1 $vt, [$rn] */
2802  0,
2804 },
2805 { /* AArch64_LD1Fourv4s_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */
2806  0,
2808 },
2809 { /* AArch64_LD1Fourv8b, ARM64_INS_LD1: ld1 $vt, [$rn] */
2810  0,
2812 },
2813 { /* AArch64_LD1Fourv8b_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */
2814  0,
2816 },
2817 { /* AArch64_LD1Fourv8h, ARM64_INS_LD1: ld1 $vt, [$rn] */
2818  0,
2820 },
2821 { /* AArch64_LD1Fourv8h_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */
2822  0,
2824 },
2825 { /* AArch64_LD1Onev16b, ARM64_INS_LD1: ld1 $vt, [$rn] */
2826  0,
2828 },
2829 { /* AArch64_LD1Onev16b_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */
2830  0,
2832 },
2833 { /* AArch64_LD1Onev1d, ARM64_INS_LD1: ld1 $vt, [$rn] */
2834  0,
2836 },
2837 { /* AArch64_LD1Onev1d_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */
2838  0,
2840 },
2841 { /* AArch64_LD1Onev2d, ARM64_INS_LD1: ld1 $vt, [$rn] */
2842  0,
2844 },
2845 { /* AArch64_LD1Onev2d_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */
2846  0,
2848 },
2849 { /* AArch64_LD1Onev2s, ARM64_INS_LD1: ld1 $vt, [$rn] */
2850  0,
2852 },
2853 { /* AArch64_LD1Onev2s_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */
2854  0,
2856 },
2857 { /* AArch64_LD1Onev4h, ARM64_INS_LD1: ld1 $vt, [$rn] */
2858  0,
2860 },
2861 { /* AArch64_LD1Onev4h_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */
2862  0,
2864 },
2865 { /* AArch64_LD1Onev4s, ARM64_INS_LD1: ld1 $vt, [$rn] */
2866  0,
2868 },
2869 { /* AArch64_LD1Onev4s_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */
2870  0,
2872 },
2873 { /* AArch64_LD1Onev8b, ARM64_INS_LD1: ld1 $vt, [$rn] */
2874  0,
2876 },
2877 { /* AArch64_LD1Onev8b_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */
2878  0,
2880 },
2881 { /* AArch64_LD1Onev8h, ARM64_INS_LD1: ld1 $vt, [$rn] */
2882  0,
2884 },
2885 { /* AArch64_LD1Onev8h_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */
2886  0,
2888 },
2889 { /* AArch64_LD1Rv16b, ARM64_INS_LD1R: ld1r $vt, [$rn] */
2890  0,
2892 },
2893 { /* AArch64_LD1Rv16b_POST, ARM64_INS_LD1R: ld1r $vt, [$rn], $xm */
2894  0,
2896 },
2897 { /* AArch64_LD1Rv1d, ARM64_INS_LD1R: ld1r $vt, [$rn] */
2898  0,
2900 },
2901 { /* AArch64_LD1Rv1d_POST, ARM64_INS_LD1R: ld1r $vt, [$rn], $xm */
2902  0,
2904 },
2905 { /* AArch64_LD1Rv2d, ARM64_INS_LD1R: ld1r $vt, [$rn] */
2906  0,
2908 },
2909 { /* AArch64_LD1Rv2d_POST, ARM64_INS_LD1R: ld1r $vt, [$rn], $xm */
2910  0,
2912 },
2913 { /* AArch64_LD1Rv2s, ARM64_INS_LD1R: ld1r $vt, [$rn] */
2914  0,
2916 },
2917 { /* AArch64_LD1Rv2s_POST, ARM64_INS_LD1R: ld1r $vt, [$rn], $xm */
2918  0,
2920 },
2921 { /* AArch64_LD1Rv4h, ARM64_INS_LD1R: ld1r $vt, [$rn] */
2922  0,
2924 },
2925 { /* AArch64_LD1Rv4h_POST, ARM64_INS_LD1R: ld1r $vt, [$rn], $xm */
2926  0,
2928 },
2929 { /* AArch64_LD1Rv4s, ARM64_INS_LD1R: ld1r $vt, [$rn] */
2930  0,
2932 },
2933 { /* AArch64_LD1Rv4s_POST, ARM64_INS_LD1R: ld1r $vt, [$rn], $xm */
2934  0,
2936 },
2937 { /* AArch64_LD1Rv8b, ARM64_INS_LD1R: ld1r $vt, [$rn] */
2938  0,
2940 },
2941 { /* AArch64_LD1Rv8b_POST, ARM64_INS_LD1R: ld1r $vt, [$rn], $xm */
2942  0,
2944 },
2945 { /* AArch64_LD1Rv8h, ARM64_INS_LD1R: ld1r $vt, [$rn] */
2946  0,
2948 },
2949 { /* AArch64_LD1Rv8h_POST, ARM64_INS_LD1R: ld1r $vt, [$rn], $xm */
2950  0,
2952 },
2953 { /* AArch64_LD1Threev16b, ARM64_INS_LD1: ld1 $vt, [$rn] */
2954  0,
2956 },
2957 { /* AArch64_LD1Threev16b_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */
2958  0,
2960 },
2961 { /* AArch64_LD1Threev1d, ARM64_INS_LD1: ld1 $vt, [$rn] */
2962  0,
2964 },
2965 { /* AArch64_LD1Threev1d_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */
2966  0,
2968 },
2969 { /* AArch64_LD1Threev2d, ARM64_INS_LD1: ld1 $vt, [$rn] */
2970  0,
2972 },
2973 { /* AArch64_LD1Threev2d_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */
2974  0,
2976 },
2977 { /* AArch64_LD1Threev2s, ARM64_INS_LD1: ld1 $vt, [$rn] */
2978  0,
2980 },
2981 { /* AArch64_LD1Threev2s_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */
2982  0,
2984 },
2985 { /* AArch64_LD1Threev4h, ARM64_INS_LD1: ld1 $vt, [$rn] */
2986  0,
2988 },
2989 { /* AArch64_LD1Threev4h_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */
2990  0,
2992 },
2993 { /* AArch64_LD1Threev4s, ARM64_INS_LD1: ld1 $vt, [$rn] */
2994  0,
2996 },
2997 { /* AArch64_LD1Threev4s_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */
2998  0,
3000 },
3001 { /* AArch64_LD1Threev8b, ARM64_INS_LD1: ld1 $vt, [$rn] */
3002  0,
3004 },
3005 { /* AArch64_LD1Threev8b_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */
3006  0,
3008 },
3009 { /* AArch64_LD1Threev8h, ARM64_INS_LD1: ld1 $vt, [$rn] */
3010  0,
3012 },
3013 { /* AArch64_LD1Threev8h_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */
3014  0,
3016 },
3017 { /* AArch64_LD1Twov16b, ARM64_INS_LD1: ld1 $vt, [$rn] */
3018  0,
3020 },
3021 { /* AArch64_LD1Twov16b_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */
3022  0,
3024 },
3025 { /* AArch64_LD1Twov1d, ARM64_INS_LD1: ld1 $vt, [$rn] */
3026  0,
3028 },
3029 { /* AArch64_LD1Twov1d_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */
3030  0,
3032 },
3033 { /* AArch64_LD1Twov2d, ARM64_INS_LD1: ld1 $vt, [$rn] */
3034  0,
3036 },
3037 { /* AArch64_LD1Twov2d_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */
3038  0,
3040 },
3041 { /* AArch64_LD1Twov2s, ARM64_INS_LD1: ld1 $vt, [$rn] */
3042  0,
3044 },
3045 { /* AArch64_LD1Twov2s_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */
3046  0,
3048 },
3049 { /* AArch64_LD1Twov4h, ARM64_INS_LD1: ld1 $vt, [$rn] */
3050  0,
3052 },
3053 { /* AArch64_LD1Twov4h_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */
3054  0,
3056 },
3057 { /* AArch64_LD1Twov4s, ARM64_INS_LD1: ld1 $vt, [$rn] */
3058  0,
3060 },
3061 { /* AArch64_LD1Twov4s_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */
3062  0,
3064 },
3065 { /* AArch64_LD1Twov8b, ARM64_INS_LD1: ld1 $vt, [$rn] */
3066  0,
3068 },
3069 { /* AArch64_LD1Twov8b_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */
3070  0,
3072 },
3073 { /* AArch64_LD1Twov8h, ARM64_INS_LD1: ld1 $vt, [$rn] */
3074  0,
3076 },
3077 { /* AArch64_LD1Twov8h_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */
3078  0,
3080 },
3081 { /* AArch64_LD1i16, ARM64_INS_LD1: ld1 $vt$idx, [$rn] */
3082  0,
3084 },
3085 { /* AArch64_LD1i16_POST, ARM64_INS_LD1: ld1 $vt$idx, [$rn], $xm */
3086  0,
3088 },
3089 { /* AArch64_LD1i32, ARM64_INS_LD1: ld1 $vt$idx, [$rn] */
3090  0,
3092 },
3093 { /* AArch64_LD1i32_POST, ARM64_INS_LD1: ld1 $vt$idx, [$rn], $xm */
3094  0,
3096 },
3097 { /* AArch64_LD1i64, ARM64_INS_LD1: ld1 $vt$idx, [$rn] */
3098  0,
3100 },
3101 { /* AArch64_LD1i64_POST, ARM64_INS_LD1: ld1 $vt$idx, [$rn], $xm */
3102  0,
3104 },
3105 { /* AArch64_LD1i8, ARM64_INS_LD1: ld1 $vt$idx, [$rn] */
3106  0,
3108 },
3109 { /* AArch64_LD1i8_POST, ARM64_INS_LD1: ld1 $vt$idx, [$rn], $xm */
3110  0,
3112 },
3113 { /* AArch64_LD2Rv16b, ARM64_INS_LD2R: ld2r $vt, [$rn] */
3114  0,
3116 },
3117 { /* AArch64_LD2Rv16b_POST, ARM64_INS_LD2R: ld2r $vt, [$rn], $xm */
3118  0,
3120 },
3121 { /* AArch64_LD2Rv1d, ARM64_INS_LD2R: ld2r $vt, [$rn] */
3122  0,
3124 },
3125 { /* AArch64_LD2Rv1d_POST, ARM64_INS_LD2R: ld2r $vt, [$rn], $xm */
3126  0,
3128 },
3129 { /* AArch64_LD2Rv2d, ARM64_INS_LD2R: ld2r $vt, [$rn] */
3130  0,
3132 },
3133 { /* AArch64_LD2Rv2d_POST, ARM64_INS_LD2R: ld2r $vt, [$rn], $xm */
3134  0,
3136 },
3137 { /* AArch64_LD2Rv2s, ARM64_INS_LD2R: ld2r $vt, [$rn] */
3138  0,
3140 },
3141 { /* AArch64_LD2Rv2s_POST, ARM64_INS_LD2R: ld2r $vt, [$rn], $xm */
3142  0,
3144 },
3145 { /* AArch64_LD2Rv4h, ARM64_INS_LD2R: ld2r $vt, [$rn] */
3146  0,
3148 },
3149 { /* AArch64_LD2Rv4h_POST, ARM64_INS_LD2R: ld2r $vt, [$rn], $xm */
3150  0,
3152 },
3153 { /* AArch64_LD2Rv4s, ARM64_INS_LD2R: ld2r $vt, [$rn] */
3154  0,
3156 },
3157 { /* AArch64_LD2Rv4s_POST, ARM64_INS_LD2R: ld2r $vt, [$rn], $xm */
3158  0,
3160 },
3161 { /* AArch64_LD2Rv8b, ARM64_INS_LD2R: ld2r $vt, [$rn] */
3162  0,
3164 },
3165 { /* AArch64_LD2Rv8b_POST, ARM64_INS_LD2R: ld2r $vt, [$rn], $xm */
3166  0,
3168 },
3169 { /* AArch64_LD2Rv8h, ARM64_INS_LD2R: ld2r $vt, [$rn] */
3170  0,
3172 },
3173 { /* AArch64_LD2Rv8h_POST, ARM64_INS_LD2R: ld2r $vt, [$rn], $xm */
3174  0,
3176 },
3177 { /* AArch64_LD2Twov16b, ARM64_INS_LD2: ld2 $vt, [$rn] */
3178  0,
3180 },
3181 { /* AArch64_LD2Twov16b_POST, ARM64_INS_LD2: ld2 $vt, [$rn], $xm */
3182  0,
3184 },
3185 { /* AArch64_LD2Twov2d, ARM64_INS_LD2: ld2 $vt, [$rn] */
3186  0,
3188 },
3189 { /* AArch64_LD2Twov2d_POST, ARM64_INS_LD2: ld2 $vt, [$rn], $xm */
3190  0,
3192 },
3193 { /* AArch64_LD2Twov2s, ARM64_INS_LD2: ld2 $vt, [$rn] */
3194  0,
3196 },
3197 { /* AArch64_LD2Twov2s_POST, ARM64_INS_LD2: ld2 $vt, [$rn], $xm */
3198  0,
3200 },
3201 { /* AArch64_LD2Twov4h, ARM64_INS_LD2: ld2 $vt, [$rn] */
3202  0,
3204 },
3205 { /* AArch64_LD2Twov4h_POST, ARM64_INS_LD2: ld2 $vt, [$rn], $xm */
3206  0,
3208 },
3209 { /* AArch64_LD2Twov4s, ARM64_INS_LD2: ld2 $vt, [$rn] */
3210  0,
3212 },
3213 { /* AArch64_LD2Twov4s_POST, ARM64_INS_LD2: ld2 $vt, [$rn], $xm */
3214  0,
3216 },
3217 { /* AArch64_LD2Twov8b, ARM64_INS_LD2: ld2 $vt, [$rn] */
3218  0,
3220 },
3221 { /* AArch64_LD2Twov8b_POST, ARM64_INS_LD2: ld2 $vt, [$rn], $xm */
3222  0,
3224 },
3225 { /* AArch64_LD2Twov8h, ARM64_INS_LD2: ld2 $vt, [$rn] */
3226  0,
3228 },
3229 { /* AArch64_LD2Twov8h_POST, ARM64_INS_LD2: ld2 $vt, [$rn], $xm */
3230  0,
3232 },
3233 { /* AArch64_LD2i16, ARM64_INS_LD2: ld2 $vt$idx, [$rn] */
3234  0,
3236 },
3237 { /* AArch64_LD2i16_POST, ARM64_INS_LD2: ld2 $vt$idx, [$rn], $xm */
3238  0,
3240 },
3241 { /* AArch64_LD2i32, ARM64_INS_LD2: ld2 $vt$idx, [$rn] */
3242  0,
3244 },
3245 { /* AArch64_LD2i32_POST, ARM64_INS_LD2: ld2 $vt$idx, [$rn], $xm */
3246  0,
3248 },
3249 { /* AArch64_LD2i64, ARM64_INS_LD2: ld2 $vt$idx, [$rn] */
3250  0,
3252 },
3253 { /* AArch64_LD2i64_POST, ARM64_INS_LD2: ld2 $vt$idx, [$rn], $xm */
3254  0,
3256 },
3257 { /* AArch64_LD2i8, ARM64_INS_LD2: ld2 $vt$idx, [$rn] */
3258  0,
3260 },
3261 { /* AArch64_LD2i8_POST, ARM64_INS_LD2: ld2 $vt$idx, [$rn], $xm */
3262  0,
3264 },
3265 { /* AArch64_LD3Rv16b, ARM64_INS_LD3R: ld3r $vt, [$rn] */
3266  0,
3268 },
3269 { /* AArch64_LD3Rv16b_POST, ARM64_INS_LD3R: ld3r $vt, [$rn], $xm */
3270  0,
3272 },
3273 { /* AArch64_LD3Rv1d, ARM64_INS_LD3R: ld3r $vt, [$rn] */
3274  0,
3276 },
3277 { /* AArch64_LD3Rv1d_POST, ARM64_INS_LD3R: ld3r $vt, [$rn], $xm */
3278  0,
3280 },
3281 { /* AArch64_LD3Rv2d, ARM64_INS_LD3R: ld3r $vt, [$rn] */
3282  0,
3284 },
3285 { /* AArch64_LD3Rv2d_POST, ARM64_INS_LD3R: ld3r $vt, [$rn], $xm */
3286  0,
3288 },
3289 { /* AArch64_LD3Rv2s, ARM64_INS_LD3R: ld3r $vt, [$rn] */
3290  0,
3292 },
3293 { /* AArch64_LD3Rv2s_POST, ARM64_INS_LD3R: ld3r $vt, [$rn], $xm */
3294  0,
3296 },
3297 { /* AArch64_LD3Rv4h, ARM64_INS_LD3R: ld3r $vt, [$rn] */
3298  0,
3300 },
3301 { /* AArch64_LD3Rv4h_POST, ARM64_INS_LD3R: ld3r $vt, [$rn], $xm */
3302  0,
3304 },
3305 { /* AArch64_LD3Rv4s, ARM64_INS_LD3R: ld3r $vt, [$rn] */
3306  0,
3308 },
3309 { /* AArch64_LD3Rv4s_POST, ARM64_INS_LD3R: ld3r $vt, [$rn], $xm */
3310  0,
3312 },
3313 { /* AArch64_LD3Rv8b, ARM64_INS_LD3R: ld3r $vt, [$rn] */
3314  0,
3316 },
3317 { /* AArch64_LD3Rv8b_POST, ARM64_INS_LD3R: ld3r $vt, [$rn], $xm */
3318  0,
3320 },
3321 { /* AArch64_LD3Rv8h, ARM64_INS_LD3R: ld3r $vt, [$rn] */
3322  0,
3324 },
3325 { /* AArch64_LD3Rv8h_POST, ARM64_INS_LD3R: ld3r $vt, [$rn], $xm */
3326  0,
3328 },
3329 { /* AArch64_LD3Threev16b, ARM64_INS_LD3: ld3 $vt, [$rn] */
3330  0,
3332 },
3333 { /* AArch64_LD3Threev16b_POST, ARM64_INS_LD3: ld3 $vt, [$rn], $xm */
3334  0,
3336 },
3337 { /* AArch64_LD3Threev2d, ARM64_INS_LD3: ld3 $vt, [$rn] */
3338  0,
3340 },
3341 { /* AArch64_LD3Threev2d_POST, ARM64_INS_LD3: ld3 $vt, [$rn], $xm */
3342  0,
3344 },
3345 { /* AArch64_LD3Threev2s, ARM64_INS_LD3: ld3 $vt, [$rn] */
3346  0,
3348 },
3349 { /* AArch64_LD3Threev2s_POST, ARM64_INS_LD3: ld3 $vt, [$rn], $xm */
3350  0,
3352 },
3353 { /* AArch64_LD3Threev4h, ARM64_INS_LD3: ld3 $vt, [$rn] */
3354  0,
3356 },
3357 { /* AArch64_LD3Threev4h_POST, ARM64_INS_LD3: ld3 $vt, [$rn], $xm */
3358  0,
3360 },
3361 { /* AArch64_LD3Threev4s, ARM64_INS_LD3: ld3 $vt, [$rn] */
3362  0,
3364 },
3365 { /* AArch64_LD3Threev4s_POST, ARM64_INS_LD3: ld3 $vt, [$rn], $xm */
3366  0,
3368 },
3369 { /* AArch64_LD3Threev8b, ARM64_INS_LD3: ld3 $vt, [$rn] */
3370  0,
3372 },
3373 { /* AArch64_LD3Threev8b_POST, ARM64_INS_LD3: ld3 $vt, [$rn], $xm */
3374  0,
3376 },
3377 { /* AArch64_LD3Threev8h, ARM64_INS_LD3: ld3 $vt, [$rn] */
3378  0,
3380 },
3381 { /* AArch64_LD3Threev8h_POST, ARM64_INS_LD3: ld3 $vt, [$rn], $xm */
3382  0,
3384 },
3385 { /* AArch64_LD3i16, ARM64_INS_LD3: ld3 $vt$idx, [$rn] */
3386  0,
3388 },
3389 { /* AArch64_LD3i16_POST, ARM64_INS_LD3: ld3 $vt$idx, [$rn], $xm */
3390  0,
3392 },
3393 { /* AArch64_LD3i32, ARM64_INS_LD3: ld3 $vt$idx, [$rn] */
3394  0,
3396 },
3397 { /* AArch64_LD3i32_POST, ARM64_INS_LD3: ld3 $vt$idx, [$rn], $xm */
3398  0,
3400 },
3401 { /* AArch64_LD3i64, ARM64_INS_LD3: ld3 $vt$idx, [$rn] */
3402  0,
3404 },
3405 { /* AArch64_LD3i64_POST, ARM64_INS_LD3: ld3 $vt$idx, [$rn], $xm */
3406  0,
3408 },
3409 { /* AArch64_LD3i8, ARM64_INS_LD3: ld3 $vt$idx, [$rn] */
3410  0,
3412 },
3413 { /* AArch64_LD3i8_POST, ARM64_INS_LD3: ld3 $vt$idx, [$rn], $xm */
3414  0,
3416 },
3417 { /* AArch64_LD4Fourv16b, ARM64_INS_LD4: ld4 $vt, [$rn] */
3418  0,
3420 },
3421 { /* AArch64_LD4Fourv16b_POST, ARM64_INS_LD4: ld4 $vt, [$rn], $xm */
3422  0,
3424 },
3425 { /* AArch64_LD4Fourv2d, ARM64_INS_LD4: ld4 $vt, [$rn] */
3426  0,
3428 },
3429 { /* AArch64_LD4Fourv2d_POST, ARM64_INS_LD4: ld4 $vt, [$rn], $xm */
3430  0,
3432 },
3433 { /* AArch64_LD4Fourv2s, ARM64_INS_LD4: ld4 $vt, [$rn] */
3434  0,
3436 },
3437 { /* AArch64_LD4Fourv2s_POST, ARM64_INS_LD4: ld4 $vt, [$rn], $xm */
3438  0,
3440 },
3441 { /* AArch64_LD4Fourv4h, ARM64_INS_LD4: ld4 $vt, [$rn] */
3442  0,
3444 },
3445 { /* AArch64_LD4Fourv4h_POST, ARM64_INS_LD4: ld4 $vt, [$rn], $xm */
3446  0,
3448 },
3449 { /* AArch64_LD4Fourv4s, ARM64_INS_LD4: ld4 $vt, [$rn] */
3450  0,
3452 },
3453 { /* AArch64_LD4Fourv4s_POST, ARM64_INS_LD4: ld4 $vt, [$rn], $xm */
3454  0,
3456 },
3457 { /* AArch64_LD4Fourv8b, ARM64_INS_LD4: ld4 $vt, [$rn] */
3458  0,
3460 },
3461 { /* AArch64_LD4Fourv8b_POST, ARM64_INS_LD4: ld4 $vt, [$rn], $xm */
3462  0,
3464 },
3465 { /* AArch64_LD4Fourv8h, ARM64_INS_LD4: ld4 $vt, [$rn] */
3466  0,
3468 },
3469 { /* AArch64_LD4Fourv8h_POST, ARM64_INS_LD4: ld4 $vt, [$rn], $xm */
3470  0,
3472 },
3473 { /* AArch64_LD4Rv16b, ARM64_INS_LD4R: ld4r $vt, [$rn] */
3474  0,
3476 },
3477 { /* AArch64_LD4Rv16b_POST, ARM64_INS_LD4R: ld4r $vt, [$rn], $xm */
3478  0,
3480 },
3481 { /* AArch64_LD4Rv1d, ARM64_INS_LD4R: ld4r $vt, [$rn] */
3482  0,
3484 },
3485 { /* AArch64_LD4Rv1d_POST, ARM64_INS_LD4R: ld4r $vt, [$rn], $xm */
3486  0,
3488 },
3489 { /* AArch64_LD4Rv2d, ARM64_INS_LD4R: ld4r $vt, [$rn] */
3490  0,
3492 },
3493 { /* AArch64_LD4Rv2d_POST, ARM64_INS_LD4R: ld4r $vt, [$rn], $xm */
3494  0,
3496 },
3497 { /* AArch64_LD4Rv2s, ARM64_INS_LD4R: ld4r $vt, [$rn] */
3498  0,
3500 },
3501 { /* AArch64_LD4Rv2s_POST, ARM64_INS_LD4R: ld4r $vt, [$rn], $xm */
3502  0,
3504 },
3505 { /* AArch64_LD4Rv4h, ARM64_INS_LD4R: ld4r $vt, [$rn] */
3506  0,
3508 },
3509 { /* AArch64_LD4Rv4h_POST, ARM64_INS_LD4R: ld4r $vt, [$rn], $xm */
3510  0,
3512 },
3513 { /* AArch64_LD4Rv4s, ARM64_INS_LD4R: ld4r $vt, [$rn] */
3514  0,
3516 },
3517 { /* AArch64_LD4Rv4s_POST, ARM64_INS_LD4R: ld4r $vt, [$rn], $xm */
3518  0,
3520 },
3521 { /* AArch64_LD4Rv8b, ARM64_INS_LD4R: ld4r $vt, [$rn] */
3522  0,
3524 },
3525 { /* AArch64_LD4Rv8b_POST, ARM64_INS_LD4R: ld4r $vt, [$rn], $xm */
3526  0,
3528 },
3529 { /* AArch64_LD4Rv8h, ARM64_INS_LD4R: ld4r $vt, [$rn] */
3530  0,
3532 },
3533 { /* AArch64_LD4Rv8h_POST, ARM64_INS_LD4R: ld4r $vt, [$rn], $xm */
3534  0,
3536 },
3537 { /* AArch64_LD4i16, ARM64_INS_LD4: ld4 $vt$idx, [$rn] */
3538  0,
3540 },
3541 { /* AArch64_LD4i16_POST, ARM64_INS_LD4: ld4 $vt$idx, [$rn], $xm */
3542  0,
3544 },
3545 { /* AArch64_LD4i32, ARM64_INS_LD4: ld4 $vt$idx, [$rn] */
3546  0,
3548 },
3549 { /* AArch64_LD4i32_POST, ARM64_INS_LD4: ld4 $vt$idx, [$rn], $xm */
3550  0,
3552 },
3553 { /* AArch64_LD4i64, ARM64_INS_LD4: ld4 $vt$idx, [$rn] */
3554  0,
3556 },
3557 { /* AArch64_LD4i64_POST, ARM64_INS_LD4: ld4 $vt$idx, [$rn], $xm */
3558  0,
3560 },
3561 { /* AArch64_LD4i8, ARM64_INS_LD4: ld4 $vt$idx, [$rn] */
3562  0,
3564 },
3565 { /* AArch64_LD4i8_POST, ARM64_INS_LD4: ld4 $vt$idx, [$rn], $xm */
3566  0,
3568 },
3569 { /* AArch64_LDARB, ARM64_INS_LDARB: ldarb $rt, [$rn] */
3570  0,
3571  { CS_AC_WRITE, CS_AC_READ, 0 }
3572 },
3573 { /* AArch64_LDARH, ARM64_INS_LDARH: ldarh $rt, [$rn] */
3574  0,
3575  { CS_AC_WRITE, CS_AC_READ, 0 }
3576 },
3577 { /* AArch64_LDARW, ARM64_INS_LDAR: ldar $rt, [$rn] */
3578  0,
3579  { CS_AC_WRITE, CS_AC_READ, 0 }
3580 },
3581 { /* AArch64_LDARX, ARM64_INS_LDAR: ldar $rt, [$rn] */
3582  0,
3583  { CS_AC_WRITE, CS_AC_READ, 0 }
3584 },
3585 { /* AArch64_LDAXPW, ARM64_INS_LDAXP: ldaxp $rt, $rt2, [$rn] */
3586  0,
3588 },
3589 { /* AArch64_LDAXPX, ARM64_INS_LDAXP: ldaxp $rt, $rt2, [$rn] */
3590  0,
3592 },
3593 { /* AArch64_LDAXRB, ARM64_INS_LDAXRB: ldaxrb $rt, [$rn] */
3594  0,
3595  { CS_AC_WRITE, CS_AC_READ, 0 }
3596 },
3597 { /* AArch64_LDAXRH, ARM64_INS_LDAXRH: ldaxrh $rt, [$rn] */
3598  0,
3599  { CS_AC_WRITE, CS_AC_READ, 0 }
3600 },
3601 { /* AArch64_LDAXRW, ARM64_INS_LDAXR: ldaxr $rt, [$rn] */
3602  0,
3603  { CS_AC_WRITE, CS_AC_READ, 0 }
3604 },
3605 { /* AArch64_LDAXRX, ARM64_INS_LDAXR: ldaxr $rt, [$rn] */
3606  0,
3607  { CS_AC_WRITE, CS_AC_READ, 0 }
3608 },
3609 { /* AArch64_LDNPDi, ARM64_INS_LDNP: ldnp $rt, $rt2, [$rn, $offset] */
3610  0,
3612 },
3613 { /* AArch64_LDNPQi, ARM64_INS_LDNP: ldnp $rt, $rt2, [$rn, $offset] */
3614  0,
3616 },
3617 { /* AArch64_LDNPSi, ARM64_INS_LDNP: ldnp $rt, $rt2, [$rn, $offset] */
3618  0,
3620 },
3621 { /* AArch64_LDNPWi, ARM64_INS_LDNP: ldnp $rt, $rt2, [$rn, $offset] */
3622  0,
3624 },
3625 { /* AArch64_LDNPXi, ARM64_INS_LDNP: ldnp $rt, $rt2, [$rn, $offset] */
3626  0,
3628 },
3629 { /* AArch64_LDPDi, ARM64_INS_LDP: ldp $rt, $rt2, [$rn, $offset] */
3630  0,
3632 },
3633 { /* AArch64_LDPDpost, ARM64_INS_LDP: ldp $rt, $rt2, [$rn], $offset */
3634  0,
3636 },
3637 { /* AArch64_LDPDpre, ARM64_INS_LDP: ldp $rt, $rt2, [$rn, $offset]! */
3638  0,
3640 },
3641 { /* AArch64_LDPQi, ARM64_INS_LDP: ldp $rt, $rt2, [$rn, $offset] */
3642  0,
3644 },
3645 { /* AArch64_LDPQpost, ARM64_INS_LDP: ldp $rt, $rt2, [$rn], $offset */
3646  0,
3648 },
3649 { /* AArch64_LDPQpre, ARM64_INS_LDP: ldp $rt, $rt2, [$rn, $offset]! */
3650  0,
3652 },
3653 { /* AArch64_LDPSWi, ARM64_INS_LDPSW: ldpsw $rt, $rt2, [$rn, $offset] */
3654  0,
3656 },
3657 { /* AArch64_LDPSWpost, ARM64_INS_LDPSW: ldpsw $rt, $rt2, [$rn], $offset */
3658  0,
3660 },
3661 { /* AArch64_LDPSWpre, ARM64_INS_LDPSW: ldpsw $rt, $rt2, [$rn, $offset]! */
3662  0,
3664 },
3665 { /* AArch64_LDPSi, ARM64_INS_LDP: ldp $rt, $rt2, [$rn, $offset] */
3666  0,
3668 },
3669 { /* AArch64_LDPSpost, ARM64_INS_LDP: ldp $rt, $rt2, [$rn], $offset */
3670  0,
3672 },
3673 { /* AArch64_LDPSpre, ARM64_INS_LDP: ldp $rt, $rt2, [$rn, $offset]! */
3674  0,
3676 },
3677 { /* AArch64_LDPWi, ARM64_INS_LDP: ldp $rt, $rt2, [$rn, $offset] */
3678  0,
3680 },
3681 { /* AArch64_LDPWpost, ARM64_INS_LDP: ldp $rt, $rt2, [$rn], $offset */
3682  0,
3684 },
3685 { /* AArch64_LDPWpre, ARM64_INS_LDP: ldp $rt, $rt2, [$rn, $offset]! */
3686  0,
3688 },
3689 { /* AArch64_LDPXi, ARM64_INS_LDP: ldp $rt, $rt2, [$rn, $offset] */
3690  0,
3692 },
3693 { /* AArch64_LDPXpost, ARM64_INS_LDP: ldp $rt, $rt2, [$rn], $offset */
3694  0,
3696 },
3697 { /* AArch64_LDPXpre, ARM64_INS_LDP: ldp $rt, $rt2, [$rn, $offset]! */
3698  0,
3700 },
3701 { /* AArch64_LDRBBpost, ARM64_INS_LDRB: ldrb $rt, [$rn], $offset */
3702  0,
3704 },
3705 { /* AArch64_LDRBBpre, ARM64_INS_LDRB: ldrb $rt, [$rn, $offset]! */
3706  0,
3708 },
3709 { /* AArch64_LDRBBroW, ARM64_INS_LDRB: ldrb $rt, [$rn, $rm, $extend] */
3710  0,
3712 },
3713 { /* AArch64_LDRBBroX, ARM64_INS_LDRB: ldrb $rt, [$rn, $rm, $extend] */
3714  0,
3716 },
3717 { /* AArch64_LDRBBui, ARM64_INS_LDRB: ldrb $rt, [$rn, $offset] */
3718  0,
3720 },
3721 { /* AArch64_LDRBpost, ARM64_INS_LDR: ldr $rt, [$rn], $offset */
3722  0,
3724 },
3725 { /* AArch64_LDRBpre, ARM64_INS_LDR: ldr $rt, [$rn, $offset]! */
3726  0,
3728 },
3729 { /* AArch64_LDRBroW, ARM64_INS_LDR: ldr $rt, [$rn, $rm, $extend] */
3730  0,
3732 },
3733 { /* AArch64_LDRBroX, ARM64_INS_LDR: ldr $rt, [$rn, $rm, $extend] */
3734  0,
3736 },
3737 { /* AArch64_LDRBui, ARM64_INS_LDR: ldr $rt, [$rn, $offset] */
3738  0,
3740 },
3741 { /* AArch64_LDRDl, ARM64_INS_LDR: ldr $rt, $label */
3742  0,
3743  { CS_AC_WRITE, CS_AC_READ, 0 }
3744 },
3745 { /* AArch64_LDRDpost, ARM64_INS_LDR: ldr $rt, [$rn], $offset */
3746  0,
3748 },
3749 { /* AArch64_LDRDpre, ARM64_INS_LDR: ldr $rt, [$rn, $offset]! */
3750  0,
3752 },
3753 { /* AArch64_LDRDroW, ARM64_INS_LDR: ldr $rt, [$rn, $rm, $extend] */
3754  00,
3756 },
3757 { /* AArch64_LDRDroX, ARM64_INS_LDR: ldr $rt, [$rn, $rm, $extend] */
3758  0,
3760 },
3761 { /* AArch64_LDRDui, ARM64_INS_LDR: ldr $rt, [$rn, $offset] */
3762  0,
3764 },
3765 { /* AArch64_LDRHHpost, ARM64_INS_LDRH: ldrh $rt, [$rn], $offset */
3766  0,
3768 },
3769 { /* AArch64_LDRHHpre, ARM64_INS_LDRH: ldrh $rt, [$rn, $offset]! */
3770  0,
3772 },
3773 { /* AArch64_LDRHHroW, ARM64_INS_LDRH: ldrh $rt, [$rn, $rm, $extend] */
3774  0,
3776 },
3777 { /* AArch64_LDRHHroX, ARM64_INS_LDRH: ldrh $rt, [$rn, $rm, $extend] */
3778  0,
3780 },
3781 { /* AArch64_LDRHHui, ARM64_INS_LDRH: ldrh $rt, [$rn, $offset] */
3782  0,
3784 },
3785 { /* AArch64_LDRHpost, ARM64_INS_LDR: ldr $rt, [$rn], $offset */
3786  0,
3788 },
3789 { /* AArch64_LDRHpre, ARM64_INS_LDR: ldr $rt, [$rn, $offset]! */
3790  0,
3792 },
3793 { /* AArch64_LDRHroW, ARM64_INS_LDR: ldr $rt, [$rn, $rm, $extend] */
3794  0,
3796 },
3797 { /* AArch64_LDRHroX, ARM64_INS_LDR: ldr $rt, [$rn, $rm, $extend] */
3798  0,
3800 },
3801 { /* AArch64_LDRHui, ARM64_INS_LDR: ldr $rt, [$rn, $offset] */
3802  0,
3804 },
3805 { /* AArch64_LDRQl, ARM64_INS_LDR: ldr $rt, $label */
3806  0,
3807  { CS_AC_WRITE, CS_AC_READ, 0 }
3808 },
3809 { /* AArch64_LDRQpost, ARM64_INS_LDR: ldr $rt, [$rn], $offset */
3810  0,
3812 },
3813 { /* AArch64_LDRQpre, ARM64_INS_LDR: ldr $rt, [$rn, $offset]! */
3814  0,
3816 },
3817 { /* AArch64_LDRQroW, ARM64_INS_LDR: ldr $rt, [$rn, $rm, $extend] */
3818  0,
3820 },
3821 { /* AArch64_LDRQroX, ARM64_INS_LDR: ldr $rt, [$rn, $rm, $extend] */
3822  0,
3824 },
3825 { /* AArch64_LDRQui, ARM64_INS_LDR: ldr $rt, [$rn, $offset] */
3826  0,
3828 },
3829 { /* AArch64_LDRSBWpost, ARM64_INS_LDRSB: ldrsb $rt, [$rn], $offset */
3830  0,
3832 },
3833 { /* AArch64_LDRSBWpre, ARM64_INS_LDRSB: ldrsb $rt, [$rn, $offset]! */
3834  0,
3836 },
3837 { /* AArch64_LDRSBWroW, ARM64_INS_LDRSB: ldrsb $rt, [$rn, $rm, $extend] */
3838  0,
3840 },
3841 { /* AArch64_LDRSBWroX, ARM64_INS_LDRSB: ldrsb $rt, [$rn, $rm, $extend] */
3842  0,
3844 },
3845 { /* AArch64_LDRSBWui, ARM64_INS_LDRSB: ldrsb $rt, [$rn, $offset] */
3846  0,
3848 },
3849 { /* AArch64_LDRSBXpost, ARM64_INS_LDRSB: ldrsb $rt, [$rn], $offset */
3850  0,
3852 },
3853 { /* AArch64_LDRSBXpre, ARM64_INS_LDRSB: ldrsb $rt, [$rn, $offset]! */
3854  0,
3856 },
3857 { /* AArch64_LDRSBXroW, ARM64_INS_LDRSB: ldrsb $rt, [$rn, $rm, $extend] */
3858  0,
3860 },
3861 { /* AArch64_LDRSBXroX, ARM64_INS_LDRSB: ldrsb $rt, [$rn, $rm, $extend] */
3862  0,
3864 },
3865 { /* AArch64_LDRSBXui, ARM64_INS_LDRSB: ldrsb $rt, [$rn, $offset] */
3866  0,
3868 },
3869 { /* AArch64_LDRSHWpost, ARM64_INS_LDRSH: ldrsh $rt, [$rn], $offset */
3870  0,
3872 },
3873 { /* AArch64_LDRSHWpre, ARM64_INS_LDRSH: ldrsh $rt, [$rn, $offset]! */
3874  0,
3876 },
3877 { /* AArch64_LDRSHWroW, ARM64_INS_LDRSH: ldrsh $rt, [$rn, $rm, $extend] */
3878  0,
3880 },
3881 { /* AArch64_LDRSHWroX, ARM64_INS_LDRSH: ldrsh $rt, [$rn, $rm, $extend] */
3882  0,
3884 },
3885 { /* AArch64_LDRSHWui, ARM64_INS_LDRSH: ldrsh $rt, [$rn, $offset] */
3886  0,
3888 },
3889 { /* AArch64_LDRSHXpost, ARM64_INS_LDRSH: ldrsh $rt, [$rn], $offset */
3890  0,
3892 },
3893 { /* AArch64_LDRSHXpre, ARM64_INS_LDRSH: ldrsh $rt, [$rn, $offset]! */
3894  0,
3896 },
3897 { /* AArch64_LDRSHXroW, ARM64_INS_LDRSH: ldrsh $rt, [$rn, $rm, $extend] */
3898  0,
3900 },
3901 { /* AArch64_LDRSHXroX, ARM64_INS_LDRSH: ldrsh $rt, [$rn, $rm, $extend] */
3902  0,
3904 },
3905 { /* AArch64_LDRSHXui, ARM64_INS_LDRSH: ldrsh $rt, [$rn, $offset] */
3906  0,
3908 },
3909 { /* AArch64_LDRSWl, ARM64_INS_LDRSW: ldrsw $rt, $label */
3910  0,
3911  { CS_AC_WRITE, CS_AC_READ, 0 }
3912 },
3913 { /* AArch64_LDRSWpost, ARM64_INS_LDRSW: ldrsw $rt, [$rn], $offset */
3914  0,
3916 },
3917 { /* AArch64_LDRSWpre, ARM64_INS_LDRSW: ldrsw $rt, [$rn, $offset]! */
3918  0,
3920 },
3921 { /* AArch64_LDRSWroW, ARM64_INS_LDRSW: ldrsw $rt, [$rn, $rm, $extend] */
3922  0,
3924 },
3925 { /* AArch64_LDRSWroX, ARM64_INS_LDRSW: ldrsw $rt, [$rn, $rm, $extend] */
3926  0,
3928 },
3929 { /* AArch64_LDRSWui, ARM64_INS_LDRSW: ldrsw $rt, [$rn, $offset] */
3930  0,
3932 },
3933 { /* AArch64_LDRSl, ARM64_INS_LDR: ldr $rt, $label */
3934  0,
3935  { CS_AC_WRITE, CS_AC_READ, 0 }
3936 },
3937 { /* AArch64_LDRSpost, ARM64_INS_LDR: ldr $rt, [$rn], $offset */
3938  0,
3940 },
3941 { /* AArch64_LDRSpre, ARM64_INS_LDR: ldr $rt, [$rn, $offset]! */
3942  0,
3944 },
3945 { /* AArch64_LDRSroW, ARM64_INS_LDR: ldr $rt, [$rn, $rm, $extend] */
3946  0,
3948 },
3949 { /* AArch64_LDRSroX, ARM64_INS_LDR: ldr $rt, [$rn, $rm, $extend] */
3950  0,
3952 },
3953 { /* AArch64_LDRSui, ARM64_INS_LDR: ldr $rt, [$rn, $offset] */
3954  0,
3956 },
3957 { /* AArch64_LDRWl, ARM64_INS_LDR: ldr $rt, $label */
3958  0,
3959  { CS_AC_WRITE, CS_AC_READ, 0 }
3960 },
3961 { /* AArch64_LDRWpost, ARM64_INS_LDR: ldr $rt, [$rn], $offset */
3962  0,
3964 },
3965 { /* AArch64_LDRWpre, ARM64_INS_LDR: ldr $rt, [$rn, $offset]! */
3966  0,
3968 },
3969 { /* AArch64_LDRWroW, ARM64_INS_LDR: ldr $rt, [$rn, $rm, $extend] */
3970  0,
3972 },
3973 { /* AArch64_LDRWroX, ARM64_INS_LDR: ldr $rt, [$rn, $rm, $extend] */
3974  0,
3976 },
3977 { /* AArch64_LDRWui, ARM64_INS_LDR: ldr $rt, [$rn, $offset] */
3978  0,
3980 },
3981 { /* AArch64_LDRXl, ARM64_INS_LDR: ldr $rt, $label */
3982  0,
3983  { CS_AC_WRITE, CS_AC_READ, 0 }
3984 },
3985 { /* AArch64_LDRXpost, ARM64_INS_LDR: ldr $rt, [$rn], $offset */
3986  0,
3988 },
3989 { /* AArch64_LDRXpre, ARM64_INS_LDR: ldr $rt, [$rn, $offset]! */
3990  0,
3992 },
3993 { /* AArch64_LDRXroW, ARM64_INS_LDR: ldr $rt, [$rn, $rm, $extend] */
3994  0,
3996 },
3997 { /* AArch64_LDRXroX, ARM64_INS_LDR: ldr $rt, [$rn, $rm, $extend] */
3998  0,
4000 },
4001 { /* AArch64_LDRXui, ARM64_INS_LDR: ldr $rt, [$rn, $offset] */
4002  0,
4004 },
4005 { /* AArch64_LDTRBi, ARM64_INS_LDTRB: ldtrb $rt, [$rn, $offset] */
4006  0,
4008 },
4009 { /* AArch64_LDTRHi, ARM64_INS_LDTRH: ldtrh $rt, [$rn, $offset] */
4010  0,
4012 },
4013 { /* AArch64_LDTRSBWi, ARM64_INS_LDTRSB: ldtrsb $rt, [$rn, $offset] */
4014  0,
4016 },
4017 { /* AArch64_LDTRSBXi, ARM64_INS_LDTRSB: ldtrsb $rt, [$rn, $offset] */
4018  0,
4020 },
4021 { /* AArch64_LDTRSHWi, ARM64_INS_LDTRSH: ldtrsh $rt, [$rn, $offset] */
4022  0,
4024 },
4025 { /* AArch64_LDTRSHXi, ARM64_INS_LDTRSH: ldtrsh $rt, [$rn, $offset] */
4026  0,
4028 },
4029 { /* AArch64_LDTRSWi, ARM64_INS_LDTRSW: ldtrsw $rt, [$rn, $offset] */
4030  0,
4032 },
4033 { /* AArch64_LDTRWi, ARM64_INS_LDTR: ldtr $rt, [$rn, $offset] */
4034  0,
4036 },
4037 { /* AArch64_LDTRXi, ARM64_INS_LDTR: ldtr $rt, [$rn, $offset] */
4038  0,
4040 },
4041 { /* AArch64_LDURBBi, ARM64_INS_LDURB: ldurb $rt, [$rn, $offset] */
4042  0,
4044 },
4045 { /* AArch64_LDURBi, ARM64_INS_LDUR: ldur $rt, [$rn, $offset] */
4046  0,
4048 },
4049 { /* AArch64_LDURDi, ARM64_INS_LDUR: ldur $rt, [$rn, $offset] */
4050  0,
4052 },
4053 { /* AArch64_LDURHHi, ARM64_INS_LDURH: ldurh $rt, [$rn, $offset] */
4054  0,
4056 },
4057 { /* AArch64_LDURHi, ARM64_INS_LDUR: ldur $rt, [$rn, $offset] */
4058  0,
4060 },
4061 { /* AArch64_LDURQi, ARM64_INS_LDUR: ldur $rt, [$rn, $offset] */
4062  0,
4064 },
4065 { /* AArch64_LDURSBWi, ARM64_INS_LDURSB: ldursb $rt, [$rn, $offset] */
4066  0,
4068 },
4069 { /* AArch64_LDURSBXi, ARM64_INS_LDURSB: ldursb $rt, [$rn, $offset] */
4070  0,
4072 },
4073 { /* AArch64_LDURSHWi, ARM64_INS_LDURSH: ldursh $rt, [$rn, $offset] */
4074  0,
4076 },
4077 { /* AArch64_LDURSHXi, ARM64_INS_LDURSH: ldursh $rt, [$rn, $offset] */
4078  0,
4080 },
4081 { /* AArch64_LDURSWi, ARM64_INS_LDURSW: ldursw $rt, [$rn, $offset] */
4082  0,
4084 },
4085 { /* AArch64_LDURSi, ARM64_INS_LDUR: ldur $rt, [$rn, $offset] */
4086  0,
4088 },
4089 { /* AArch64_LDURWi, ARM64_INS_LDUR: ldur $rt, [$rn, $offset] */
4090  0,
4092 },
4093 { /* AArch64_LDURXi, ARM64_INS_LDUR: ldur $rt, [$rn, $offset] */
4094  0,
4096 },
4097 { /* AArch64_LDXPW, ARM64_INS_LDXP: ldxp $rt, $rt2, [$rn] */
4098  0,
4100 },
4101 { /* AArch64_LDXPX, ARM64_INS_LDXP: ldxp $rt, $rt2, [$rn] */
4102  0,
4104 },
4105 { /* AArch64_LDXRB, ARM64_INS_LDXRB: ldxrb $rt, [$rn] */
4106  0,
4107  { CS_AC_WRITE, CS_AC_READ, 0 }
4108 },
4109 { /* AArch64_LDXRH, ARM64_INS_LDXRH: ldxrh $rt, [$rn] */
4110  0,
4111  { CS_AC_WRITE, CS_AC_READ, 0 }
4112 },
4113 { /* AArch64_LDXRW, ARM64_INS_LDXR: ldxr $rt, [$rn] */
4114  0,
4115  { CS_AC_WRITE, CS_AC_READ, 0 }
4116 },
4117 { /* AArch64_LDXRX, ARM64_INS_LDXR: ldxr $rt, [$rn] */
4118  0,
4119  { CS_AC_WRITE, CS_AC_READ, 0 }
4120 },
4121 { /* AArch64_LSLVWr, ARM64_INS_LSL: lsl $rd, $rn, $rm */
4122  0,
4124 },
4125 { /* AArch64_LSLVXr, ARM64_INS_LSL: lsl $rd, $rn, $rm */
4126  0,
4128 },
4129 { /* AArch64_LSRVWr, ARM64_INS_LSR: lsr $rd, $rn, $rm */
4130  0,
4132 },
4133 { /* AArch64_LSRVXr, ARM64_INS_LSR: lsr $rd, $rn, $rm */
4134  0,
4136 },
4137 { /* AArch64_MADDWrrr, ARM64_INS_MADD: madd $rd, $rn, $rm, $ra */
4138  0,
4140 },
4141 { /* AArch64_MADDXrrr, ARM64_INS_MADD: madd $rd, $rn, $rm, $ra */
4142  0,
4144 },
4145 { /* AArch64_MLAv16i8, ARM64_INS_MLA: mla.16b $rd, $rn, $rm */
4146  0,
4148 },
4149 { /* AArch64_MLAv2i32, ARM64_INS_MLA: mla.2s $rd, $rn, $rm */
4150  0,
4152 },
4153 { /* AArch64_MLAv2i32_indexed, ARM64_INS_MLA: mla.2s $rd, $rn, $rm$idx */
4154  0,
4156 },
4157 { /* AArch64_MLAv4i16, ARM64_INS_MLA: mla.4h $rd, $rn, $rm */
4158  0,
4160 },
4161 { /* AArch64_MLAv4i16_indexed, ARM64_INS_MLA: mla.4h $rd, $rn, $rm$idx */
4162  0,
4164 },
4165 { /* AArch64_MLAv4i32, ARM64_INS_MLA: mla.4s $rd, $rn, $rm */
4166  0,
4168 },
4169 { /* AArch64_MLAv4i32_indexed, ARM64_INS_MLA: mla.4s $rd, $rn, $rm$idx */
4170  0,
4172 },
4173 { /* AArch64_MLAv8i16, ARM64_INS_MLA: mla.8h $rd, $rn, $rm */
4174  0,
4176 },
4177 { /* AArch64_MLAv8i16_indexed, ARM64_INS_MLA: mla.8h $rd, $rn, $rm$idx */
4178  0,
4180 },
4181 { /* AArch64_MLAv8i8, ARM64_INS_MLA: mla.8b $rd, $rn, $rm */
4182  0,
4184 },
4185 { /* AArch64_MLSv16i8, ARM64_INS_MLS: mls.16b $rd, $rn, $rm */
4186  0,
4188 },
4189 { /* AArch64_MLSv2i32, ARM64_INS_MLS: mls.2s $rd, $rn, $rm */
4190  0,
4192 },
4193 { /* AArch64_MLSv2i32_indexed, ARM64_INS_MLS: mls.2s $rd, $rn, $rm$idx */
4194  0,
4196 },
4197 { /* AArch64_MLSv4i16, ARM64_INS_MLS: mls.4h $rd, $rn, $rm */
4198  0,
4200 },
4201 { /* AArch64_MLSv4i16_indexed, ARM64_INS_MLS: mls.4h $rd, $rn, $rm$idx */
4202  0,
4204 },
4205 { /* AArch64_MLSv4i32, ARM64_INS_MLS: mls.4s $rd, $rn, $rm */
4206  0,
4208 },
4209 { /* AArch64_MLSv4i32_indexed, ARM64_INS_MLS: mls.4s $rd, $rn, $rm$idx */
4210  0,
4212 },
4213 { /* AArch64_MLSv8i16, ARM64_INS_MLS: mls.8h $rd, $rn, $rm */
4214  0,
4216 },
4217 { /* AArch64_MLSv8i16_indexed, ARM64_INS_MLS: mls.8h $rd, $rn, $rm$idx */
4218  0,
4220 },
4221 { /* AArch64_MLSv8i8, ARM64_INS_MLS: mls.8b $rd, $rn, $rm */
4222  0,
4224 },
4225 { /* AArch64_MOVID, ARM64_INS_MOVI: movi $rd, $imm8 */
4226  0,
4228 },
4229 { /* AArch64_MOVIv16b_ns, ARM64_INS_MOVI: movi.16b $rd, $imm8 */
4230  0,
4232 },
4233 { /* AArch64_MOVIv2d_ns, ARM64_INS_MOVI: movi.2d $rd, $imm8 */
4234  0,
4236 },
4237 { /* AArch64_MOVIv2i32, ARM64_INS_MOVI: movi.2s $rd, $imm8$shift */
4238  0,
4240 },
4241 { /* AArch64_MOVIv2s_msl, ARM64_INS_MOVI: movi.2s $rd, $imm8$shift */
4242  0,
4244 },
4245 { /* AArch64_MOVIv4i16, ARM64_INS_MOVI: movi.4h $rd, $imm8$shift */
4246  0,
4248 },
4249 { /* AArch64_MOVIv4i32, ARM64_INS_MOVI: movi.4s $rd, $imm8$shift */
4250  0,
4252 },
4253 { /* AArch64_MOVIv4s_msl, ARM64_INS_MOVI: movi.4s $rd, $imm8$shift */
4254  0,
4256 },
4257 { /* AArch64_MOVIv8b_ns, ARM64_INS_MOVI: movi.8b $rd, $imm8 */
4258  0,
4260 },
4261 { /* AArch64_MOVIv8i16, ARM64_INS_MOVI: movi.8h $rd, $imm8$shift */
4262  0,
4264 },
4265 { /* AArch64_MOVKWi, ARM64_INS_MOVK: movk $rd, $imm$shift */
4266  0,
4268 },
4269 { /* AArch64_MOVKXi, ARM64_INS_MOVK: movk $rd, $imm$shift */
4270  0,
4272 },
4273 { /* AArch64_MOVNWi, ARM64_INS_MOVN: movn $rd, $imm$shift */
4274  0,
4276 },
4277 { /* AArch64_MOVNXi, ARM64_INS_MOVN: movn $rd, $imm$shift */
4278  0,
4280 },
4281 { /* AArch64_MOVZWi, ARM64_INS_MOVZ: movz $rd, $imm$shift */
4282  0,
4284 },
4285 { /* AArch64_MOVZXi, ARM64_INS_MOVZ: movz $rd, $imm$shift */
4286  0,
4288 },
4289 { /* AArch64_MRS, ARM64_INS_MRS: mrs $rt, $systemreg */
4290  0,
4292 },
4293 { /* AArch64_MSR, ARM64_INS_MSR: msr $systemreg, $rt */
4294  0,
4296 },
4297 { /* AArch64_MSRpstate, ARM64_INS_MSR: msr $pstate_field, $imm */
4298  0,
4300 },
4301 { /* AArch64_MSUBWrrr, ARM64_INS_MSUB: msub $rd, $rn, $rm, $ra */
4302  0,
4304 },
4305 { /* AArch64_MSUBXrrr, ARM64_INS_MSUB: msub $rd, $rn, $rm, $ra */
4306  0,
4308 },
4309 { /* AArch64_MULv16i8, ARM64_INS_MUL: mul.16b $rd, $rn, $rm| */
4310  0,
4312 },
4313 { /* AArch64_MULv2i32, ARM64_INS_MUL: mul.2s $rd, $rn, $rm| */
4314  0,
4316 },
4317 { /* AArch64_MULv2i32_indexed, ARM64_INS_MUL: mul.2s $rd, $rn, $rm$idx */
4318  0,
4320 },
4321 { /* AArch64_MULv4i16, ARM64_INS_MUL: mul.4h $rd, $rn, $rm| */
4322  0,
4324 },
4325 { /* AArch64_MULv4i16_indexed, ARM64_INS_MUL: mul.4h $rd, $rn, $rm$idx */
4326  0,
4328 },
4329 { /* AArch64_MULv4i32, ARM64_INS_MUL: mul.4s $rd, $rn, $rm| */
4330  0,
4332 },
4333 { /* AArch64_MULv4i32_indexed, ARM64_INS_MUL: mul.4s $rd, $rn, $rm$idx */
4334  0,
4336 },
4337 { /* AArch64_MULv8i16, ARM64_INS_MUL: mul.8h $rd, $rn, $rm| */
4338  0,
4340 },
4341 { /* AArch64_MULv8i16_indexed, ARM64_INS_MUL: mul.8h $rd, $rn, $rm$idx */
4342  0,
4344 },
4345 { /* AArch64_MULv8i8, ARM64_INS_MUL: mul.8b $rd, $rn, $rm| */
4346  0,
4348 },
4349 { /* AArch64_MVNIv2i32, ARM64_INS_MVNI: mvni.2s $rd, $imm8$shift */
4350  0,
4352 },
4353 { /* AArch64_MVNIv2s_msl, ARM64_INS_MVNI: mvni.2s $rd, $imm8$shift */
4354  0,
4356 },
4357 { /* AArch64_MVNIv4i16, ARM64_INS_MVNI: mvni.4h $rd, $imm8$shift */
4358  0,
4360 },
4361 { /* AArch64_MVNIv4i32, ARM64_INS_MVNI: mvni.4s $rd, $imm8$shift */
4362  0,
4364 },
4365 { /* AArch64_MVNIv4s_msl, ARM64_INS_MVNI: mvni.4s $rd, $imm8$shift */
4366  0,
4368 },
4369 { /* AArch64_MVNIv8i16, ARM64_INS_MVNI: mvni.8h $rd, $imm8$shift */
4370  0,
4372 },
4373 { /* AArch64_NEGv16i8, ARM64_INS_NEG: neg.16b $rd, $rn */
4374  0,
4375  { CS_AC_WRITE, CS_AC_READ, 0 }
4376 },
4377 { /* AArch64_NEGv1i64, ARM64_INS_NEG: neg $rd, $rn */
4378  0,
4379  { CS_AC_WRITE, CS_AC_READ, 0 }
4380 },
4381 { /* AArch64_NEGv2i32, ARM64_INS_NEG: neg.2s $rd, $rn */
4382  0,
4383  { CS_AC_WRITE, CS_AC_READ, 0 }
4384 },
4385 { /* AArch64_NEGv2i64, ARM64_INS_NEG: neg.2d $rd, $rn */
4386  0,
4387  { CS_AC_WRITE, CS_AC_READ, 0 }
4388 },
4389 { /* AArch64_NEGv4i16, ARM64_INS_NEG: neg.4h $rd, $rn */
4390  0,
4391  { CS_AC_WRITE, CS_AC_READ, 0 }
4392 },
4393 { /* AArch64_NEGv4i32, ARM64_INS_NEG: neg.4s $rd, $rn */
4394  0,
4395  { CS_AC_WRITE, CS_AC_READ, 0 }
4396 },
4397 { /* AArch64_NEGv8i16, ARM64_INS_NEG: neg.8h $rd, $rn */
4398  0,
4399  { CS_AC_WRITE, CS_AC_READ, 0 }
4400 },
4401 { /* AArch64_NEGv8i8, ARM64_INS_NEG: neg.8b $rd, $rn */
4402  0,
4403  { CS_AC_WRITE, CS_AC_READ, 0 }
4404 },
4405 { /* AArch64_NOTv16i8, ARM64_INS_NOT: not.16b $rd, $rn */
4406  0,
4407  { CS_AC_WRITE, CS_AC_READ, 0 }
4408 },
4409 { /* AArch64_NOTv8i8, ARM64_INS_NOT: not.8b $rd, $rn */
4410  0,
4411  { CS_AC_WRITE, CS_AC_READ, 0 }
4412 },
4413 { /* AArch64_ORNWrs, ARM64_INS_ORN: orn $rd, $rn, $rm */
4414  0,
4416 },
4417 { /* AArch64_ORNXrs, ARM64_INS_ORN: orn $rd, $rn, $rm */
4418  0,
4420 },
4421 { /* AArch64_ORNv16i8, ARM64_INS_ORN: orn.16b $rd, $rn, $rm| */
4422  0,
4424 },
4425 { /* AArch64_ORNv8i8, ARM64_INS_ORN: orn.8b $rd, $rn, $rm| */
4426  0,
4428 },
4429 { /* AArch64_ORRWri, ARM64_INS_ORR: orr $rd, $rn, $imm */
4430  0,
4432 },
4433 { /* AArch64_ORRWrs, ARM64_INS_ORR: orr $rd, $rn, $rm */
4434  0,
4436 },
4437 { /* AArch64_ORRXri, ARM64_INS_ORR: orr $rd, $rn, $imm */
4438  0,
4440 },
4441 { /* AArch64_ORRXrs, ARM64_INS_ORR: orr $rd, $rn, $rm */
4442  0,
4444 },
4445 { /* AArch64_ORRv16i8, ARM64_INS_ORR: orr.16b $rd, $rn, $rm| */
4446  0,
4448 },
4449 { /* AArch64_ORRv2i32, ARM64_INS_ORR: orr.2s $rd, $imm8$shift */
4450  0,
4452 },
4453 { /* AArch64_ORRv4i16, ARM64_INS_ORR: orr.4h $rd, $imm8$shift */
4454  0,
4456 },
4457 { /* AArch64_ORRv4i32, ARM64_INS_ORR: orr.4s $rd, $imm8$shift */
4458  0,
4460 },
4461 { /* AArch64_ORRv8i16, ARM64_INS_ORR: orr.8h $rd, $imm8$shift */
4462  0,
4464 },
4465 { /* AArch64_ORRv8i8, ARM64_INS_ORR: orr.8b $rd, $rn, $rm| */
4466  0,
4468 },
4469 { /* AArch64_PMULLv16i8, ARM64_INS_PMULL2: pmull2.8h $rd, $rn, $rm */
4470  0,
4472 },
4473 { /* AArch64_PMULLv1i64, ARM64_INS_PMULL: pmull.1q $rd, $rn, $rm */
4474  0,
4476 },
4477 { /* AArch64_PMULLv2i64, ARM64_INS_PMULL2: pmull2.1q $rd, $rn, $rm */
4478  0,
4480 },
4481 { /* AArch64_PMULLv8i8, ARM64_INS_PMULL: pmull.8h $rd, $rn, $rm */
4482  0,
4484 },
4485 { /* AArch64_PMULv16i8, ARM64_INS_PMUL: pmul.16b $rd, $rn, $rm| */
4486  0,
4488 },
4489 { /* AArch64_PMULv8i8, ARM64_INS_PMUL: pmul.8b $rd, $rn, $rm| */
4490  0,
4492 },
4493 { /* AArch64_PRFMl, ARM64_INS_PRFM: prfm $rt, $label */
4494  0,
4495  { CS_AC_WRITE, CS_AC_READ, 0 }
4496 },
4497 { /* AArch64_PRFMroW, ARM64_INS_PRFM: prfm $rt, [$rn, $rm, $extend] */
4498  0,
4500 },
4501 { /* AArch64_PRFMroX, ARM64_INS_PRFM: prfm $rt, [$rn, $rm, $extend] */
4502  0,
4504 },
4505 { /* AArch64_PRFMui, ARM64_INS_PRFM: prfm $rt, [$rn, $offset] */
4506  0,
4508 },
4509 { /* AArch64_PRFUMi, ARM64_INS_PRFUM: prfum $rt, [$rn, $offset] */
4510  0,
4512 },
4513 { /* AArch64_RADDHNv2i64_v2i32, ARM64_INS_RADDHN: raddhn.2s $rd, $rn, $rm */
4514  0,
4516 },
4517 { /* AArch64_RADDHNv2i64_v4i32, ARM64_INS_RADDHN2: raddhn2.4s $rd, $rn, $rm */
4518  0,
4520 },
4521 { /* AArch64_RADDHNv4i32_v4i16, ARM64_INS_RADDHN: raddhn.4h $rd, $rn, $rm */
4522  0,
4524 },
4525 { /* AArch64_RADDHNv4i32_v8i16, ARM64_INS_RADDHN2: raddhn2.8h $rd, $rn, $rm */
4526  0,
4528 },
4529 { /* AArch64_RADDHNv8i16_v16i8, ARM64_INS_RADDHN2: raddhn2.16b $rd, $rn, $rm */
4530  0,
4532 },
4533 { /* AArch64_RADDHNv8i16_v8i8, ARM64_INS_RADDHN: raddhn.8b $rd, $rn, $rm */
4534  0,
4536 },
4537 { /* AArch64_RBITWr, ARM64_INS_RBIT: rbit $rd, $rn */
4538  0,
4539  { CS_AC_WRITE, CS_AC_READ, 0}
4540 },
4541 { /* AArch64_RBITXr, ARM64_INS_RBIT: rbit $rd, $rn */
4542  0,
4543  { CS_AC_WRITE, CS_AC_READ, 0}
4544 },
4545 { /* AArch64_RBITv16i8, ARM64_INS_RBIT: rbit.16b $rd, $rn */
4546  0,
4547  { CS_AC_WRITE, CS_AC_READ, 0}
4548 },
4549 { /* AArch64_RBITv8i8, ARM64_INS_RBIT: rbit.8b $rd, $rn */
4550  0,
4551  { CS_AC_WRITE, CS_AC_READ, 0}
4552 },
4553 { /* AArch64_RET, ARM64_INS_RET: ret $rn */
4554  0,
4555  { CS_AC_READ, 0 }
4556 },
4557 { /* AArch64_REV16Wr, ARM64_INS_REV16: rev16 $rd, $rn */
4558  0,
4559  { CS_AC_WRITE, CS_AC_READ, 0}
4560 },
4561 { /* AArch64_REV16Xr, ARM64_INS_REV16: rev16 $rd, $rn */
4562  0,
4563  { CS_AC_WRITE, CS_AC_READ, 0}
4564 },
4565 { /* AArch64_REV16v16i8, ARM64_INS_REV16: rev16.16b $rd, $rn */
4566  0,
4567  { CS_AC_WRITE, CS_AC_READ, 0}
4568 },
4569 { /* AArch64_REV16v8i8, ARM64_INS_REV16: rev16.8b $rd, $rn */
4570  0,
4571  { CS_AC_WRITE, CS_AC_READ, 0}
4572 },
4573 { /* AArch64_REV32Xr, ARM64_INS_REV32: rev32 $rd, $rn */
4574  0,
4575  { CS_AC_WRITE, CS_AC_READ, 0}
4576 },
4577 { /* AArch64_REV32v16i8, ARM64_INS_REV32: rev32.16b $rd, $rn */
4578  0,
4579  { CS_AC_WRITE, CS_AC_READ, 0}
4580 },
4581 { /* AArch64_REV32v4i16, ARM64_INS_REV32: rev32.4h $rd, $rn */
4582  0,
4583  { CS_AC_WRITE, CS_AC_READ, 0}
4584 },
4585 { /* AArch64_REV32v8i16, ARM64_INS_REV32: rev32.8h $rd, $rn */
4586  0,
4587  { CS_AC_WRITE, CS_AC_READ, 0}
4588 },
4589 { /* AArch64_REV32v8i8, ARM64_INS_REV32: rev32.8b $rd, $rn */
4590  0,
4591  { CS_AC_WRITE, CS_AC_READ, 0}
4592 },
4593 { /* AArch64_REV64v16i8, ARM64_INS_REV64: rev64.16b $rd, $rn */
4594  0,
4595  { CS_AC_WRITE, CS_AC_READ, 0}
4596 },
4597 { /* AArch64_REV64v2i32, ARM64_INS_REV64: rev64.2s $rd, $rn */
4598  0,
4599  { CS_AC_WRITE, CS_AC_READ, 0}
4600 },
4601 { /* AArch64_REV64v4i16, ARM64_INS_REV64: rev64.4h $rd, $rn */
4602  0,
4603  { CS_AC_WRITE, CS_AC_READ, 0}
4604 },
4605 { /* AArch64_REV64v4i32, ARM64_INS_REV64: rev64.4s $rd, $rn */
4606  0,
4607  { CS_AC_WRITE, CS_AC_READ, 0}
4608 },
4609 { /* AArch64_REV64v8i16, ARM64_INS_REV64: rev64.8h $rd, $rn */
4610  0,
4611  { CS_AC_WRITE, CS_AC_READ, 0}
4612 },
4613 { /* AArch64_REV64v8i8, ARM64_INS_REV64: rev64.8b $rd, $rn */
4614  0,
4615  { CS_AC_WRITE, CS_AC_READ, 0}
4616 },
4617 { /* AArch64_REVWr, ARM64_INS_REV: rev $rd, $rn */
4618  0,
4619  { CS_AC_WRITE, CS_AC_READ, 0}
4620 },
4621 { /* AArch64_REVXr, ARM64_INS_REV: rev $rd, $rn */
4622  0,
4623  { CS_AC_WRITE, CS_AC_READ, 0}
4624 },
4625 { /* AArch64_RORVWr, ARM64_INS_ROR: ror $rd, $rn, $rm */
4626  0,
4628 },
4629 { /* AArch64_RORVXr, ARM64_INS_ROR: ror $rd, $rn, $rm */
4630  0,
4632 },
4633 { /* AArch64_RSHRNv16i8_shift, ARM64_INS_RSHRN2: rshrn2.16b $rd, $rn, $imm */
4634  0,
4636 },
4637 { /* AArch64_RSHRNv2i32_shift, ARM64_INS_RSHRN: rshrn.2s $rd, $rn, $imm */
4638  0,
4640 },
4641 { /* AArch64_RSHRNv4i16_shift, ARM64_INS_RSHRN: rshrn.4h $rd, $rn, $imm */
4642  0,
4644 },
4645 { /* AArch64_RSHRNv4i32_shift, ARM64_INS_RSHRN2: rshrn2.4s $rd, $rn, $imm */
4646  0,
4648 },
4649 { /* AArch64_RSHRNv8i16_shift, ARM64_INS_RSHRN2: rshrn2.8h $rd, $rn, $imm */
4650  0,
4652 },
4653 { /* AArch64_RSHRNv8i8_shift, ARM64_INS_RSHRN: rshrn.8b $rd, $rn, $imm */
4654  0,
4656 },
4657 { /* AArch64_RSUBHNv2i64_v2i32, ARM64_INS_RSUBHN: rsubhn.2s $rd, $rn, $rm */
4658  0,
4660 },
4661 { /* AArch64_RSUBHNv2i64_v4i32, ARM64_INS_RSUBHN2: rsubhn2.4s $rd, $rn, $rm */
4662  0,
4664 },
4665 { /* AArch64_RSUBHNv4i32_v4i16, ARM64_INS_RSUBHN: rsubhn.4h $rd, $rn, $rm */
4666  0,
4668 },
4669 { /* AArch64_RSUBHNv4i32_v8i16, ARM64_INS_RSUBHN2: rsubhn2.8h $rd, $rn, $rm */
4670  0,
4672 },
4673 { /* AArch64_RSUBHNv8i16_v16i8, ARM64_INS_RSUBHN2: rsubhn2.16b $rd, $rn, $rm */
4674  0,
4676 },
4677 { /* AArch64_RSUBHNv8i16_v8i8, ARM64_INS_RSUBHN: rsubhn.8b $rd, $rn, $rm */
4678  0,
4680 },
4681 { /* AArch64_SABALv16i8_v8i16, ARM64_INS_SABAL2: sabal2.8h $rd, $rn, $rm */
4682  0,
4684 },
4685 { /* AArch64_SABALv2i32_v2i64, ARM64_INS_SABAL: sabal.2d $rd, $rn, $rm */
4686  0,
4688 },
4689 { /* AArch64_SABALv4i16_v4i32, ARM64_INS_SABAL: sabal.4s $rd, $rn, $rm */
4690  0,
4692 },
4693 { /* AArch64_SABALv4i32_v2i64, ARM64_INS_SABAL2: sabal2.2d $rd, $rn, $rm */
4694  0,
4696 },
4697 { /* AArch64_SABALv8i16_v4i32, ARM64_INS_SABAL2: sabal2.4s $rd, $rn, $rm */
4698  0,
4700 },
4701 { /* AArch64_SABALv8i8_v8i16, ARM64_INS_SABAL: sabal.8h $rd, $rn, $rm */
4702  0,
4704 },
4705 { /* AArch64_SABAv16i8, ARM64_INS_SABA: saba.16b $rd, $rn, $rm */
4706  0,
4708 },
4709 { /* AArch64_SABAv2i32, ARM64_INS_SABA: saba.2s $rd, $rn, $rm */
4710  0,
4712 },
4713 { /* AArch64_SABAv4i16, ARM64_INS_SABA: saba.4h $rd, $rn, $rm */
4714  0,
4716 },
4717 { /* AArch64_SABAv4i32, ARM64_INS_SABA: saba.4s $rd, $rn, $rm */
4718  0,
4720 },
4721 { /* AArch64_SABAv8i16, ARM64_INS_SABA: saba.8h $rd, $rn, $rm */
4722  0,
4724 },
4725 { /* AArch64_SABAv8i8, ARM64_INS_SABA: saba.8b $rd, $rn, $rm */
4726  0,
4728 },
4729 { /* AArch64_SABDLv16i8_v8i16, ARM64_INS_SABDL2: sabdl2.8h $rd, $rn, $rm */
4730  0,
4732 },
4733 { /* AArch64_SABDLv2i32_v2i64, ARM64_INS_SABDL: sabdl.2d $rd, $rn, $rm */
4734  0,
4736 },
4737 { /* AArch64_SABDLv4i16_v4i32, ARM64_INS_SABDL: sabdl.4s $rd, $rn, $rm */
4738  0,
4740 },
4741 { /* AArch64_SABDLv4i32_v2i64, ARM64_INS_SABDL2: sabdl2.2d $rd, $rn, $rm */
4742  0,
4744 },
4745 { /* AArch64_SABDLv8i16_v4i32, ARM64_INS_SABDL2: sabdl2.4s $rd, $rn, $rm */
4746  0,
4748 },
4749 { /* AArch64_SABDLv8i8_v8i16, ARM64_INS_SABDL: sabdl.8h $rd, $rn, $rm */
4750  0,
4752 },
4753 { /* AArch64_SABDv16i8, ARM64_INS_SABD: sabd.16b $rd, $rn, $rm| */
4754  0,
4756 },
4757 { /* AArch64_SABDv2i32, ARM64_INS_SABD: sabd.2s $rd, $rn, $rm| */
4758  0,
4760 },
4761 { /* AArch64_SABDv4i16, ARM64_INS_SABD: sabd.4h $rd, $rn, $rm| */
4762  0,
4764 },
4765 { /* AArch64_SABDv4i32, ARM64_INS_SABD: sabd.4s $rd, $rn, $rm| */
4766  0,
4768 },
4769 { /* AArch64_SABDv8i16, ARM64_INS_SABD: sabd.8h $rd, $rn, $rm| */
4770  0,
4772 },
4773 { /* AArch64_SABDv8i8, ARM64_INS_SABD: sabd.8b $rd, $rn, $rm| */
4774  0,
4776 },
4777 { /* AArch64_SADALPv16i8_v8i16, ARM64_INS_SADALP: sadalp.8h $rd, $rn */
4778  0,
4780 },
4781 { /* AArch64_SADALPv2i32_v1i64, ARM64_INS_SADALP: sadalp.1d $rd, $rn */
4782  0,
4784 },
4785 { /* AArch64_SADALPv4i16_v2i32, ARM64_INS_SADALP: sadalp.2s $rd, $rn */
4786  0,
4788 },
4789 { /* AArch64_SADALPv4i32_v2i64, ARM64_INS_SADALP: sadalp.2d $rd, $rn */
4790  0,
4792 },
4793 { /* AArch64_SADALPv8i16_v4i32, ARM64_INS_SADALP: sadalp.4s $rd, $rn */
4794  0,
4796 },
4797 { /* AArch64_SADALPv8i8_v4i16, ARM64_INS_SADALP: sadalp.4h $rd, $rn */
4798  0,
4800 },
4801 { /* AArch64_SADDLPv16i8_v8i16, ARM64_INS_SADDLP: saddlp.8h $rd, $rn */
4802  0,
4804 },
4805 { /* AArch64_SADDLPv2i32_v1i64, ARM64_INS_SADDLP: saddlp.1d $rd, $rn */
4806  0,
4808 },
4809 { /* AArch64_SADDLPv4i16_v2i32, ARM64_INS_SADDLP: saddlp.2s $rd, $rn */
4810  0,
4812 },
4813 { /* AArch64_SADDLPv4i32_v2i64, ARM64_INS_SADDLP: saddlp.2d $rd, $rn */
4814  0,
4816 },
4817 { /* AArch64_SADDLPv8i16_v4i32, ARM64_INS_SADDLP: saddlp.4s $rd, $rn */
4818  0,
4820 },
4821 { /* AArch64_SADDLPv8i8_v4i16, ARM64_INS_SADDLP: saddlp.4h $rd, $rn */
4822  0,
4824 },
4825 { /* AArch64_SADDLVv16i8v, ARM64_INS_SADDLV: saddlv.16b $rd, $rn */
4826  0,
4827  { CS_AC_WRITE, CS_AC_READ, 0}
4828 },
4829 { /* AArch64_SADDLVv4i16v, ARM64_INS_SADDLV: saddlv.4h $rd, $rn */
4830  0,
4831  { CS_AC_WRITE, CS_AC_READ, 0}
4832 },
4833 { /* AArch64_SADDLVv4i32v, ARM64_INS_SADDLV: saddlv.4s $rd, $rn */
4834  0,
4835  { CS_AC_WRITE, CS_AC_READ, 0}
4836 },
4837 { /* AArch64_SADDLVv8i16v, ARM64_INS_SADDLV: saddlv.8h $rd, $rn */
4838  0,
4839  { CS_AC_WRITE, CS_AC_READ, 0}
4840 },
4841 { /* AArch64_SADDLVv8i8v, ARM64_INS_SADDLV: saddlv.8b $rd, $rn */
4842  0,
4843  { CS_AC_WRITE, CS_AC_READ, 0}
4844 },
4845 { /* AArch64_SADDLv16i8_v8i16, ARM64_INS_SADDL2: saddl2.8h $rd, $rn, $rm */
4846  0,
4848 },
4849 { /* AArch64_SADDLv2i32_v2i64, ARM64_INS_SADDL: saddl.2d $rd, $rn, $rm */
4850  0,
4852 },
4853 { /* AArch64_SADDLv4i16_v4i32, ARM64_INS_SADDL: saddl.4s $rd, $rn, $rm */
4854  0,
4856 },
4857 { /* AArch64_SADDLv4i32_v2i64, ARM64_INS_SADDL2: saddl2.2d $rd, $rn, $rm */
4858  0,
4860 },
4861 { /* AArch64_SADDLv8i16_v4i32, ARM64_INS_SADDL2: saddl2.4s $rd, $rn, $rm */
4862  0,
4864 },
4865 { /* AArch64_SADDLv8i8_v8i16, ARM64_INS_SADDL: saddl.8h $rd, $rn, $rm */
4866  0,
4868 },
4869 { /* AArch64_SADDWv16i8_v8i16, ARM64_INS_SADDW2: saddw2.8h $rd, $rn, $rm */
4870  0,
4872 },
4873 { /* AArch64_SADDWv2i32_v2i64, ARM64_INS_SADDW: saddw.2d $rd, $rn, $rm */
4874  0,
4876 },
4877 { /* AArch64_SADDWv4i16_v4i32, ARM64_INS_SADDW: saddw.4s $rd, $rn, $rm */
4878  0,
4880 },
4881 { /* AArch64_SADDWv4i32_v2i64, ARM64_INS_SADDW2: saddw2.2d $rd, $rn, $rm */
4882  0,
4884 },
4885 { /* AArch64_SADDWv8i16_v4i32, ARM64_INS_SADDW2: saddw2.4s $rd, $rn, $rm */
4886  0,
4888 },
4889 { /* AArch64_SADDWv8i8_v8i16, ARM64_INS_SADDW: saddw.8h $rd, $rn, $rm */
4890  0,
4892 },
4893 { /* AArch64_SBCSWr, ARM64_INS_SBCS: sbcs $rd, $rn, $rm */
4894  0,
4896 },
4897 { /* AArch64_SBCSXr, ARM64_INS_SBCS: sbcs $rd, $rn, $rm */
4898  0,
4900 },
4901 { /* AArch64_SBCWr, ARM64_INS_SBC: sbc $rd, $rn, $rm */
4902  0,
4904 },
4905 { /* AArch64_SBCXr, ARM64_INS_SBC: sbc $rd, $rn, $rm */
4906  0,
4908 },
4909 { /* AArch64_SBFMWri, ARM64_INS_SBFM: sbfm $rd, $rn, $immr, $imms */
4910  0,
4912 },
4913 { /* AArch64_SBFMXri, ARM64_INS_SBFM: sbfm $rd, $rn, $immr, $imms */
4914  0,
4916 },
4917 { /* AArch64_SCVTFSWDri, ARM64_INS_SCVTF: scvtf $rd, $rn, $scale */
4918  0,
4920 },
4921 { /* AArch64_SCVTFSWSri, ARM64_INS_SCVTF: scvtf $rd, $rn, $scale */
4922  0,
4924 },
4925 { /* AArch64_SCVTFSXDri, ARM64_INS_SCVTF: scvtf $rd, $rn, $scale */
4926  0,
4928 },
4929 { /* AArch64_SCVTFSXSri, ARM64_INS_SCVTF: scvtf $rd, $rn, $scale */
4930  0,
4932 },
4933 { /* AArch64_SCVTFUWDri, ARM64_INS_SCVTF: scvtf $rd, $rn */
4934  0,
4935  { CS_AC_WRITE, CS_AC_READ, 0}
4936 },
4937 { /* AArch64_SCVTFUWSri, ARM64_INS_SCVTF: scvtf $rd, $rn */
4938  0,
4939  { CS_AC_WRITE, CS_AC_READ, 0}
4940 },
4941 { /* AArch64_SCVTFUXDri, ARM64_INS_SCVTF: scvtf $rd, $rn */
4942  0,
4943  { CS_AC_WRITE, CS_AC_READ, 0}
4944 },
4945 { /* AArch64_SCVTFUXSri, ARM64_INS_SCVTF: scvtf $rd, $rn */
4946  0,
4947  { CS_AC_WRITE, CS_AC_READ, 0}
4948 },
4949 { /* AArch64_SCVTFd, ARM64_INS_SCVTF: scvtf $rd, $rn, $imm */
4950  0,
4952 },
4953 { /* AArch64_SCVTFs, ARM64_INS_SCVTF: scvtf $rd, $rn, $imm */
4954  0,
4956 },
4957 { /* AArch64_SCVTFv1i32, ARM64_INS_SCVTF: scvtf $rd, $rn */
4958  0,
4959  { CS_AC_WRITE, CS_AC_READ, 0}
4960 },
4961 { /* AArch64_SCVTFv1i64, ARM64_INS_SCVTF: scvtf $rd, $rn */
4962  0,
4963  { CS_AC_WRITE, CS_AC_READ, 0}
4964 },
4965 { /* AArch64_SCVTFv2f32, ARM64_INS_SCVTF: scvtf.2s $rd, $rn */
4966  0,
4967  { CS_AC_WRITE, CS_AC_READ, 0}
4968 },
4969 { /* AArch64_SCVTFv2f64, ARM64_INS_SCVTF: scvtf.2d $rd, $rn */
4970  0,
4971  { CS_AC_WRITE, CS_AC_READ, 0}
4972 },
4973 { /* AArch64_SCVTFv2i32_shift, ARM64_INS_SCVTF: scvtf.2s $rd, $rn, $imm */
4974  0,
4976 },
4977 { /* AArch64_SCVTFv2i64_shift, ARM64_INS_SCVTF: scvtf.2d $rd, $rn, $imm */
4978  0,
4980 },
4981 { /* AArch64_SCVTFv4f32, ARM64_INS_SCVTF: scvtf.4s $rd, $rn */
4982  0,
4983  { CS_AC_WRITE, CS_AC_READ, 0}
4984 },
4985 { /* AArch64_SCVTFv4i32_shift, ARM64_INS_SCVTF: scvtf.4s $rd, $rn, $imm */
4986  0,
4988 },
4989 { /* AArch64_SDIVWr, ARM64_INS_SDIV: sdiv $rd, $rn, $rm */
4990  0,
4992 },
4993 { /* AArch64_SDIVXr, ARM64_INS_SDIV: sdiv $rd, $rn, $rm */
4994  0,
4996 },
4997 { /* AArch64_SDIV_IntWr, ARM64_INS_SDIV: sdiv $rd, $rn, $rm */
4998  0,
5000 },
5001 { /* AArch64_SDIV_IntXr, ARM64_INS_SDIV: sdiv $rd, $rn, $rm */
5002  0,
5004 },
5005 { /* AArch64_SHA1Crrr, ARM64_INS_SHA1C: sha1c.4s $rd, $rn, $rm */
5006  0,
5008 },
5009 { /* AArch64_SHA1Hrr, ARM64_INS_SHA1H: sha1h $rd, $rn */
5010  0,
5011  { CS_AC_WRITE, CS_AC_READ, 0 }
5012 },
5013 { /* AArch64_SHA1Mrrr, ARM64_INS_SHA1M: sha1m.4s $rd, $rn, $rm */
5014  0,
5016 },
5017 { /* AArch64_SHA1Prrr, ARM64_INS_SHA1P: sha1p.4s $rd, $rn, $rm */
5018  0,
5020 },
5021 { /* AArch64_SHA1SU0rrr, ARM64_INS_SHA1SU0: sha1su0.4s $rd, $rn, $rm */
5022  0,
5024 },
5025 { /* AArch64_SHA1SU1rr, ARM64_INS_SHA1SU1: sha1su1.4s $rd, $rn */
5026  0,
5028 },
5029 { /* AArch64_SHA256H2rrr, ARM64_INS_SHA256H2: sha256h2.4s $rd, $rn, $rm */
5030  0,
5032 },
5033 { /* AArch64_SHA256Hrrr, ARM64_INS_SHA256H: sha256h.4s $rd, $rn, $rm */
5034  0,
5036 },
5037 { /* AArch64_SHA256SU0rr, ARM64_INS_SHA256SU0: sha256su0.4s $rd, $rn */
5038  0,
5040 },
5041 { /* AArch64_SHA256SU1rrr, ARM64_INS_SHA256SU1: sha256su1.4s $rd, $rn, $rm */
5042  0,
5044 },
5045 { /* AArch64_SHADDv16i8, ARM64_INS_SHADD: shadd.16b $rd, $rn, $rm| */
5046  0,
5048 },
5049 { /* AArch64_SHADDv2i32, ARM64_INS_SHADD: shadd.2s $rd, $rn, $rm| */
5050  0,
5052 },
5053 { /* AArch64_SHADDv4i16, ARM64_INS_SHADD: shadd.4h $rd, $rn, $rm| */
5054  0,
5056 },
5057 { /* AArch64_SHADDv4i32, ARM64_INS_SHADD: shadd.4s $rd, $rn, $rm| */
5058  0,
5060 },
5061 { /* AArch64_SHADDv8i16, ARM64_INS_SHADD: shadd.8h $rd, $rn, $rm| */
5062  0,
5064 },
5065 { /* AArch64_SHADDv8i8, ARM64_INS_SHADD: shadd.8b $rd, $rn, $rm| */
5066  0,
5068 },
5069 { /* AArch64_SHLLv16i8, ARM64_INS_SHLL2: shll2.8h $rd, $rn, #8 */
5070  0,
5072 },
5073 { /* AArch64_SHLLv2i32, ARM64_INS_SHLL: shll.2d $rd, $rn, #32 */
5074  0,
5076 },
5077 { /* AArch64_SHLLv4i16, ARM64_INS_SHLL: shll.4s $rd, $rn, #16 */
5078  0,
5080 },
5081 { /* AArch64_SHLLv4i32, ARM64_INS_SHLL2: shll2.2d $rd, $rn, #32 */
5082  0,
5084 },
5085 { /* AArch64_SHLLv8i16, ARM64_INS_SHLL2: shll2.4s $rd, $rn, #16 */
5086  0,
5088 },
5089 { /* AArch64_SHLLv8i8, ARM64_INS_SHLL: shll.8h $rd, $rn, #8 */
5090  0,
5092 },
5093 { /* AArch64_SHLd, ARM64_INS_SHL: shl $rd, $rn, $imm */
5094  0,
5096 },
5097 { /* AArch64_SHLv16i8_shift, ARM64_INS_SHL: shl.16b $rd, $rn, $imm */
5098  0,
5100 },
5101 { /* AArch64_SHLv2i32_shift, ARM64_INS_SHL: shl.2s $rd, $rn, $imm */
5102  0,
5104 },
5105 { /* AArch64_SHLv2i64_shift, ARM64_INS_SHL: shl.2d $rd, $rn, $imm */
5106  0,
5108 },
5109 { /* AArch64_SHLv4i16_shift, ARM64_INS_SHL: shl.4h $rd, $rn, $imm */
5110  0,
5112 },
5113 { /* AArch64_SHLv4i32_shift, ARM64_INS_SHL: shl.4s $rd, $rn, $imm */
5114  0,
5116 },
5117 { /* AArch64_SHLv8i16_shift, ARM64_INS_SHL: shl.8h $rd, $rn, $imm */
5118  0,
5120 },
5121 { /* AArch64_SHLv8i8_shift, ARM64_INS_SHL: shl.8b $rd, $rn, $imm */
5122  0,
5124 },
5125 { /* AArch64_SHRNv16i8_shift, ARM64_INS_SHRN2: shrn2.16b $rd, $rn, $imm */
5126  0,
5128 },
5129 { /* AArch64_SHRNv2i32_shift, ARM64_INS_SHRN: shrn.2s $rd, $rn, $imm */
5130  0,
5132 },
5133 { /* AArch64_SHRNv4i16_shift, ARM64_INS_SHRN: shrn.4h $rd, $rn, $imm */
5134  0,
5136 },
5137 { /* AArch64_SHRNv4i32_shift, ARM64_INS_SHRN2: shrn2.4s $rd, $rn, $imm */
5138  0,
5140 },
5141 { /* AArch64_SHRNv8i16_shift, ARM64_INS_SHRN2: shrn2.8h $rd, $rn, $imm */
5142  0,
5144 },
5145 { /* AArch64_SHRNv8i8_shift, ARM64_INS_SHRN: shrn.8b $rd, $rn, $imm */
5146  0,
5148 },
5149 { /* AArch64_SHSUBv16i8, ARM64_INS_SHSUB: shsub.16b $rd, $rn, $rm| */
5150  0,
5152 },
5153 { /* AArch64_SHSUBv2i32, ARM64_INS_SHSUB: shsub.2s $rd, $rn, $rm| */
5154  0,
5156 },
5157 { /* AArch64_SHSUBv4i16, ARM64_INS_SHSUB: shsub.4h $rd, $rn, $rm| */
5158  0,
5160 },
5161 { /* AArch64_SHSUBv4i32, ARM64_INS_SHSUB: shsub.4s $rd, $rn, $rm| */
5162  0,
5164 },
5165 { /* AArch64_SHSUBv8i16, ARM64_INS_SHSUB: shsub.8h $rd, $rn, $rm| */
5166  0,
5168 },
5169 { /* AArch64_SHSUBv8i8, ARM64_INS_SHSUB: shsub.8b $rd, $rn, $rm| */
5170  0,
5172 },
5173 { /* AArch64_SLId, ARM64_INS_SLI: sli $rd, $rn, $imm */
5174  0,
5176 },
5177 { /* AArch64_SLIv16i8_shift, ARM64_INS_SLI: sli.16b $rd, $rn, $imm */
5178  0,
5180 },
5181 { /* AArch64_SLIv2i32_shift, ARM64_INS_SLI: sli.2s $rd, $rn, $imm */
5182  0,
5184 },
5185 { /* AArch64_SLIv2i64_shift, ARM64_INS_SLI: sli.2d $rd, $rn, $imm */
5186  0,
5188 },
5189 { /* AArch64_SLIv4i16_shift, ARM64_INS_SLI: sli.4h $rd, $rn, $imm */
5190  0,
5192 },
5193 { /* AArch64_SLIv4i32_shift, ARM64_INS_SLI: sli.4s $rd, $rn, $imm */
5194  0,
5196 },
5197 { /* AArch64_SLIv8i16_shift, ARM64_INS_SLI: sli.8h $rd, $rn, $imm */
5198  0,
5200 },
5201 { /* AArch64_SLIv8i8_shift, ARM64_INS_SLI: sli.8b $rd, $rn, $imm */
5202  0,
5204 },
5205 { /* AArch64_SMADDLrrr, ARM64_INS_SMADDL: smaddl $rd, $rn, $rm, $ra */
5206  0,
5208 },
5209 { /* AArch64_SMAXPv16i8, ARM64_INS_SMAXP: smaxp.16b $rd, $rn, $rm| */
5210  0,
5212 },
5213 { /* AArch64_SMAXPv2i32, ARM64_INS_SMAXP: smaxp.2s $rd, $rn, $rm| */
5214  0,
5216 },
5217 { /* AArch64_SMAXPv4i16, ARM64_INS_SMAXP: smaxp.4h $rd, $rn, $rm| */
5218  0,
5220 },
5221 { /* AArch64_SMAXPv4i32, ARM64_INS_SMAXP: smaxp.4s $rd, $rn, $rm| */
5222  0,
5224 },
5225 { /* AArch64_SMAXPv8i16, ARM64_INS_SMAXP: smaxp.8h $rd, $rn, $rm| */
5226  0,
5228 },
5229 { /* AArch64_SMAXPv8i8, ARM64_INS_SMAXP: smaxp.8b $rd, $rn, $rm| */
5230  0,
5232 },
5233 { /* AArch64_SMAXVv16i8v, ARM64_INS_SMAXV: smaxv.16b $rd, $rn */
5234  0,
5235  { CS_AC_WRITE, CS_AC_READ, 0 }
5236 },
5237 { /* AArch64_SMAXVv4i16v, ARM64_INS_SMAXV: smaxv.4h $rd, $rn */
5238  0,
5239  { CS_AC_WRITE, CS_AC_READ, 0 }
5240 },
5241 { /* AArch64_SMAXVv4i32v, ARM64_INS_SMAXV: smaxv.4s $rd, $rn */
5242  0,
5243  { CS_AC_WRITE, CS_AC_READ, 0 }
5244 },
5245 { /* AArch64_SMAXVv8i16v, ARM64_INS_SMAXV: smaxv.8h $rd, $rn */
5246  0,
5247  { CS_AC_WRITE, CS_AC_READ, 0 }
5248 },
5249 { /* AArch64_SMAXVv8i8v, ARM64_INS_SMAXV: smaxv.8b $rd, $rn */
5250  0,
5251  { CS_AC_WRITE, CS_AC_READ, 0 }
5252 },
5253 { /* AArch64_SMAXv16i8, ARM64_INS_SMAX: smax.16b $rd, $rn, $rm| */
5254  0,
5256 },
5257 { /* AArch64_SMAXv2i32, ARM64_INS_SMAX: smax.2s $rd, $rn, $rm| */
5258  0,
5260 },
5261 { /* AArch64_SMAXv4i16, ARM64_INS_SMAX: smax.4h $rd, $rn, $rm| */
5262  0,
5264 },
5265 { /* AArch64_SMAXv4i32, ARM64_INS_SMAX: smax.4s $rd, $rn, $rm| */
5266  0,
5268 },
5269 { /* AArch64_SMAXv8i16, ARM64_INS_SMAX: smax.8h $rd, $rn, $rm| */
5270  0,
5272 },
5273 { /* AArch64_SMAXv8i8, ARM64_INS_SMAX: smax.8b $rd, $rn, $rm| */
5274  0,
5276 },
5277 { /* AArch64_SMC, ARM64_INS_SMC: smc $imm */
5278  0,
5279  { CS_AC_READ, 0 }
5280 },
5281 { /* AArch64_SMINPv16i8, ARM64_INS_SMINP: sminp.16b $rd, $rn, $rm| */
5282  0,
5284 },
5285 { /* AArch64_SMINPv2i32, ARM64_INS_SMINP: sminp.2s $rd, $rn, $rm| */
5286  0,
5288 },
5289 { /* AArch64_SMINPv4i16, ARM64_INS_SMINP: sminp.4h $rd, $rn, $rm| */
5290  0,
5292 },
5293 { /* AArch64_SMINPv4i32, ARM64_INS_SMINP: sminp.4s $rd, $rn, $rm| */
5294  0,
5296 },
5297 { /* AArch64_SMINPv8i16, ARM64_INS_SMINP: sminp.8h $rd, $rn, $rm| */
5298  0,
5300 },
5301 { /* AArch64_SMINPv8i8, ARM64_INS_SMINP: sminp.8b $rd, $rn, $rm| */
5302  0,
5304 },
5305 { /* AArch64_SMINVv16i8v, ARM64_INS_SMINV: sminv.16b $rd, $rn */
5306  0,
5307  { CS_AC_WRITE, CS_AC_READ, 0 }
5308 },
5309 { /* AArch64_SMINVv4i16v, ARM64_INS_SMINV: sminv.4h $rd, $rn */
5310  0,
5311  { CS_AC_WRITE, CS_AC_READ, 0 }
5312 },
5313 { /* AArch64_SMINVv4i32v, ARM64_INS_SMINV: sminv.4s $rd, $rn */
5314  0,
5315  { CS_AC_WRITE, CS_AC_READ, 0 }
5316 },
5317 { /* AArch64_SMINVv8i16v, ARM64_INS_SMINV: sminv.8h $rd, $rn */
5318  0,
5319  { CS_AC_WRITE, CS_AC_READ, 0 }
5320 },
5321 { /* AArch64_SMINVv8i8v, ARM64_INS_SMINV: sminv.8b $rd, $rn */
5322  0,
5323  { CS_AC_WRITE, CS_AC_READ, 0 }
5324 },
5325 { /* AArch64_SMINv16i8, ARM64_INS_SMIN: smin.16b $rd, $rn, $rm| */
5326  0,
5328 },
5329 { /* AArch64_SMINv2i32, ARM64_INS_SMIN: smin.2s $rd, $rn, $rm| */
5330  0,
5332 },
5333 { /* AArch64_SMINv4i16, ARM64_INS_SMIN: smin.4h $rd, $rn, $rm| */
5334  0,
5336 },
5337 { /* AArch64_SMINv4i32, ARM64_INS_SMIN: smin.4s $rd, $rn, $rm| */
5338  0,
5340 },
5341 { /* AArch64_SMINv8i16, ARM64_INS_SMIN: smin.8h $rd, $rn, $rm| */
5342  0,
5344 },
5345 { /* AArch64_SMINv8i8, ARM64_INS_SMIN: smin.8b $rd, $rn, $rm| */
5346  0,
5348 },
5349 { /* AArch64_SMLALv16i8_v8i16, ARM64_INS_SMLAL2: smlal2.8h $rd, $rn, $rm */
5350  0,
5352 },
5353 { /* AArch64_SMLALv2i32_indexed, ARM64_INS_SMLAL: smlal.2d $rd, $rn, $rm$idx */
5354  0,
5356 },
5357 { /* AArch64_SMLALv2i32_v2i64, ARM64_INS_SMLAL: smlal.2d $rd, $rn, $rm */
5358  0,
5360 },
5361 { /* AArch64_SMLALv4i16_indexed, ARM64_INS_SMLAL: smlal.4s $rd, $rn, $rm$idx */
5362  0,
5364 },
5365 { /* AArch64_SMLALv4i16_v4i32, ARM64_INS_SMLAL: smlal.4s $rd, $rn, $rm */
5366  0,
5368 },
5369 { /* AArch64_SMLALv4i32_indexed, ARM64_INS_SMLAL2: smlal2.2d $rd, $rn, $rm$idx */
5370  0,
5372 },
5373 { /* AArch64_SMLALv4i32_v2i64, ARM64_INS_SMLAL2: smlal2.2d $rd, $rn, $rm */
5374  0,
5376 },
5377 { /* AArch64_SMLALv8i16_indexed, ARM64_INS_SMLAL2: smlal2.4s $rd, $rn, $rm$idx */
5378  0,
5380 },
5381 { /* AArch64_SMLALv8i16_v4i32, ARM64_INS_SMLAL2: smlal2.4s $rd, $rn, $rm */
5382  0,
5384 },
5385 { /* AArch64_SMLALv8i8_v8i16, ARM64_INS_SMLAL: smlal.8h $rd, $rn, $rm */
5386  0,
5388 },
5389 { /* AArch64_SMLSLv16i8_v8i16, ARM64_INS_SMLSL2: smlsl2.8h $rd, $rn, $rm */
5390  0,
5392 },
5393 { /* AArch64_SMLSLv2i32_indexed, ARM64_INS_SMLSL: smlsl.2d $rd, $rn, $rm$idx */
5394  0,
5396 },
5397 { /* AArch64_SMLSLv2i32_v2i64, ARM64_INS_SMLSL: smlsl.2d $rd, $rn, $rm */
5398  0,
5400 },
5401 { /* AArch64_SMLSLv4i16_indexed, ARM64_INS_SMLSL: smlsl.4s $rd, $rn, $rm$idx */
5402  0,
5404 },
5405 { /* AArch64_SMLSLv4i16_v4i32, ARM64_INS_SMLSL: smlsl.4s $rd, $rn, $rm */
5406  0,
5408 },
5409 { /* AArch64_SMLSLv4i32_indexed, ARM64_INS_SMLSL2: smlsl2.2d $rd, $rn, $rm$idx */
5410  0,
5412 },
5413 { /* AArch64_SMLSLv4i32_v2i64, ARM64_INS_SMLSL2: smlsl2.2d $rd, $rn, $rm */
5414  0,
5416 },
5417 { /* AArch64_SMLSLv8i16_indexed, ARM64_INS_SMLSL2: smlsl2.4s $rd, $rn, $rm$idx */
5418  0,
5420 },
5421 { /* AArch64_SMLSLv8i16_v4i32, ARM64_INS_SMLSL2: smlsl2.4s $rd, $rn, $rm */
5422  0,
5424 },
5425 { /* AArch64_SMLSLv8i8_v8i16, ARM64_INS_SMLSL: smlsl.8h $rd, $rn, $rm */
5426  0,
5428 },
5429 { /* AArch64_SMOVvi16to32, ARM64_INS_SMOV: smov.h $rd, $rn$idx */
5430  0,
5432 },
5433 { /* AArch64_SMOVvi16to64, ARM64_INS_SMOV: smov.h $rd, $rn$idx */
5434  0,
5436 },
5437 { /* AArch64_SMOVvi32to64, ARM64_INS_SMOV: smov.s $rd, $rn$idx */
5438  0,
5440 },
5441 { /* AArch64_SMOVvi8to32, ARM64_INS_SMOV: smov.b $rd, $rn$idx */
5442  0,
5444 },
5445 { /* AArch64_SMOVvi8to64, ARM64_INS_SMOV: smov.b $rd, $rn$idx */
5446  0,
5448 },
5449 { /* AArch64_SMSUBLrrr, ARM64_INS_SMSUBL: smsubl $rd, $rn, $rm, $ra */
5450  0,
5452 },
5453 { /* AArch64_SMULHrr, ARM64_INS_SMULH: smulh $rd, $rn, $rm */
5454  0,
5456 },
5457 { /* AArch64_SMULLv16i8_v8i16, ARM64_INS_SMULL2: smull2.8h $rd, $rn, $rm */
5458  0,
5460 },
5461 { /* AArch64_SMULLv2i32_indexed, ARM64_INS_SMULL: smull.2d $rd, $rn, $rm$idx */
5462  0,
5464 },
5465 { /* AArch64_SMULLv2i32_v2i64, ARM64_INS_SMULL: smull.2d $rd, $rn, $rm */
5466  0,
5468 },
5469 { /* AArch64_SMULLv4i16_indexed, ARM64_INS_SMULL: smull.4s $rd, $rn, $rm$idx */
5470  0,
5472 },
5473 { /* AArch64_SMULLv4i16_v4i32, ARM64_INS_SMULL: smull.4s $rd, $rn, $rm */
5474  0,
5476 },
5477 { /* AArch64_SMULLv4i32_indexed, ARM64_INS_SMULL2: smull2.2d $rd, $rn, $rm$idx */
5478  0,
5480 },
5481 { /* AArch64_SMULLv4i32_v2i64, ARM64_INS_SMULL2: smull2.2d $rd, $rn, $rm */
5482  0,
5484 },
5485 { /* AArch64_SMULLv8i16_indexed, ARM64_INS_SMULL2: smull2.4s $rd, $rn, $rm$idx */
5486  0,
5488 },
5489 { /* AArch64_SMULLv8i16_v4i32, ARM64_INS_SMULL2: smull2.4s $rd, $rn, $rm */
5490  0,
5492 },
5493 { /* AArch64_SMULLv8i8_v8i16, ARM64_INS_SMULL: smull.8h $rd, $rn, $rm */
5494  0,
5496 },
5497 { /* AArch64_SQABSv16i8, ARM64_INS_SQABS: sqabs.16b $rd, $rn */
5498  0,
5499  { CS_AC_WRITE, CS_AC_READ, 0 }
5500 },
5501 { /* AArch64_SQABSv1i16, ARM64_INS_SQABS: sqabs $rd, $rn */
5502  0,
5503  { CS_AC_WRITE, CS_AC_READ, 0 }
5504 },
5505 { /* AArch64_SQABSv1i32, ARM64_INS_SQABS: sqabs $rd, $rn */
5506  0,
5507  { CS_AC_WRITE, CS_AC_READ, 0 }
5508 },
5509 { /* AArch64_SQABSv1i64, ARM64_INS_SQABS: sqabs $rd, $rn */
5510  0,
5511  { CS_AC_WRITE, CS_AC_READ, 0 }
5512 },
5513 { /* AArch64_SQABSv1i8, ARM64_INS_SQABS: sqabs $rd, $rn */
5514  0,
5515  { CS_AC_WRITE, CS_AC_READ, 0 }
5516 },
5517 { /* AArch64_SQABSv2i32, ARM64_INS_SQABS: sqabs.2s $rd, $rn */
5518  0,
5519  { CS_AC_WRITE, CS_AC_READ, 0 }
5520 },
5521 { /* AArch64_SQABSv2i64, ARM64_INS_SQABS: sqabs.2d $rd, $rn */
5522  0,
5523  { CS_AC_WRITE, CS_AC_READ, 0 }
5524 },
5525 { /* AArch64_SQABSv4i16, ARM64_INS_SQABS: sqabs.4h $rd, $rn */
5526  0,
5527  { CS_AC_WRITE, CS_AC_READ, 0 }
5528 },
5529 { /* AArch64_SQABSv4i32, ARM64_INS_SQABS: sqabs.4s $rd, $rn */
5530  0,
5531  { CS_AC_WRITE, CS_AC_READ, 0 }
5532 },
5533 { /* AArch64_SQABSv8i16, ARM64_INS_SQABS: sqabs.8h $rd, $rn */
5534  0,
5535  { CS_AC_WRITE, CS_AC_READ, 0 }
5536 },
5537 { /* AArch64_SQABSv8i8, ARM64_INS_SQABS: sqabs.8b $rd, $rn */
5538  0,
5539  { CS_AC_WRITE, CS_AC_READ, 0 }
5540 },
5541 { /* AArch64_SQADDv16i8, ARM64_INS_SQADD: sqadd.16b $rd, $rn, $rm| */
5542  0,
5544 },
5545 { /* AArch64_SQADDv1i16, ARM64_INS_SQADD: sqadd $rd, $rn, $rm */
5546  0,
5548 },
5549 { /* AArch64_SQADDv1i32, ARM64_INS_SQADD: sqadd $rd, $rn, $rm */
5550  0,
5552 },
5553 { /* AArch64_SQADDv1i64, ARM64_INS_SQADD: sqadd $rd, $rn, $rm */
5554  0,
5556 },
5557 { /* AArch64_SQADDv1i8, ARM64_INS_SQADD: sqadd $rd, $rn, $rm */
5558  0,
5560 },
5561 { /* AArch64_SQADDv2i32, ARM64_INS_SQADD: sqadd.2s $rd, $rn, $rm| */
5562  0,
5564 },
5565 { /* AArch64_SQADDv2i64, ARM64_INS_SQADD: sqadd.2d $rd, $rn, $rm| */
5566  0,
5568 },
5569 { /* AArch64_SQADDv4i16, ARM64_INS_SQADD: sqadd.4h $rd, $rn, $rm| */
5570  0,
5572 },
5573 { /* AArch64_SQADDv4i32, ARM64_INS_SQADD: sqadd.4s $rd, $rn, $rm| */
5574  0,
5576 },
5577 { /* AArch64_SQADDv8i16, ARM64_INS_SQADD: sqadd.8h $rd, $rn, $rm| */
5578  0,
5580 },
5581 { /* AArch64_SQADDv8i8, ARM64_INS_SQADD: sqadd.8b $rd, $rn, $rm| */
5582  0,
5584 },
5585 { /* AArch64_SQDMLALi16, ARM64_INS_SQDMLAL: sqdmlal $rd, $rn, $rm */
5586  0,
5588 },
5589 { /* AArch64_SQDMLALi32, ARM64_INS_SQDMLAL: sqdmlal $rd, $rn, $rm */
5590  0,
5592 },
5593 { /* AArch64_SQDMLALv1i32_indexed, ARM64_INS_SQDMLAL: sqdmlal.h $rd, $rn, $rm$idx */
5594  0,
5596 },
5597 { /* AArch64_SQDMLALv1i64_indexed, ARM64_INS_SQDMLAL: sqdmlal.s $rd, $rn, $rm$idx */
5598  0,
5600 },
5601 { /* AArch64_SQDMLALv2i32_indexed, ARM64_INS_SQDMLAL: sqdmlal.2d $rd, $rn, $rm$idx */
5602  0,
5604 },
5605 { /* AArch64_SQDMLALv2i32_v2i64, ARM64_INS_SQDMLAL: sqdmlal.2d $rd, $rn, $rm */
5606  0,
5608 },
5609 { /* AArch64_SQDMLALv4i16_indexed, ARM64_INS_SQDMLAL: sqdmlal.4s $rd, $rn, $rm$idx */
5610  0,
5612 },
5613 { /* AArch64_SQDMLALv4i16_v4i32, ARM64_INS_SQDMLAL: sqdmlal.4s $rd, $rn, $rm */
5614  0,
5616 },
5617 { /* AArch64_SQDMLALv4i32_indexed, ARM64_INS_SQDMLAL2: sqdmlal2.2d $rd, $rn, $rm$idx */
5618  0,
5620 },
5621 { /* AArch64_SQDMLALv4i32_v2i64, ARM64_INS_SQDMLAL2: sqdmlal2.2d $rd, $rn, $rm */
5622  0,
5624 },
5625 { /* AArch64_SQDMLALv8i16_indexed, ARM64_INS_SQDMLAL2: sqdmlal2.4s $rd, $rn, $rm$idx */
5626  0,
5628 },
5629 { /* AArch64_SQDMLALv8i16_v4i32, ARM64_INS_SQDMLAL2: sqdmlal2.4s $rd, $rn, $rm */
5630  0,
5632 },
5633 { /* AArch64_SQDMLSLi16, ARM64_INS_SQDMLSL: sqdmlsl $rd, $rn, $rm */
5634  0,
5636 },
5637 { /* AArch64_SQDMLSLi32, ARM64_INS_SQDMLSL: sqdmlsl $rd, $rn, $rm */
5638  0,
5640 },
5641 { /* AArch64_SQDMLSLv1i32_indexed, ARM64_INS_SQDMLSL: sqdmlsl.h $rd, $rn, $rm$idx */
5642  0,
5644 },
5645 { /* AArch64_SQDMLSLv1i64_indexed, ARM64_INS_SQDMLSL: sqdmlsl.s $rd, $rn, $rm$idx */
5646  0,
5648 },
5649 { /* AArch64_SQDMLSLv2i32_indexed, ARM64_INS_SQDMLSL: sqdmlsl.2d $rd, $rn, $rm$idx */
5650  0,
5652 },
5653 { /* AArch64_SQDMLSLv2i32_v2i64, ARM64_INS_SQDMLSL: sqdmlsl.2d $rd, $rn, $rm */
5654  0,
5656 },
5657 { /* AArch64_SQDMLSLv4i16_indexed, ARM64_INS_SQDMLSL: sqdmlsl.4s $rd, $rn, $rm$idx */
5658  0,
5660 },
5661 { /* AArch64_SQDMLSLv4i16_v4i32, ARM64_INS_SQDMLSL: sqdmlsl.4s $rd, $rn, $rm */
5662  0,
5664 },
5665 { /* AArch64_SQDMLSLv4i32_indexed, ARM64_INS_SQDMLSL2: sqdmlsl2.2d $rd, $rn, $rm$idx */
5666  0,
5668 },
5669 { /* AArch64_SQDMLSLv4i32_v2i64, ARM64_INS_SQDMLSL2: sqdmlsl2.2d $rd, $rn, $rm */
5670  0,
5672 },
5673 { /* AArch64_SQDMLSLv8i16_indexed, ARM64_INS_SQDMLSL2: sqdmlsl2.4s $rd, $rn, $rm$idx */
5674  0,
5676 },
5677 { /* AArch64_SQDMLSLv8i16_v4i32, ARM64_INS_SQDMLSL2: sqdmlsl2.4s $rd, $rn, $rm */
5678  0,
5680 },
5681 { /* AArch64_SQDMULHv1i16, ARM64_INS_SQDMULH: sqdmulh $rd, $rn, $rm */
5682  0,
5684 },
5685 { /* AArch64_SQDMULHv1i16_indexed, ARM64_INS_SQDMULH: sqdmulh.h $rd, $rn, $rm$idx */
5686  0,
5688 },
5689 { /* AArch64_SQDMULHv1i32, ARM64_INS_SQDMULH: sqdmulh $rd, $rn, $rm */
5690  0,
5692 },
5693 { /* AArch64_SQDMULHv1i32_indexed, ARM64_INS_SQDMULH: sqdmulh.s $rd, $rn, $rm$idx */
5694  0,
5696 },
5697 { /* AArch64_SQDMULHv2i32, ARM64_INS_SQDMULH: sqdmulh.2s $rd, $rn, $rm| */
5698  0,
5700 },
5701 { /* AArch64_SQDMULHv2i32_indexed, ARM64_INS_SQDMULH: sqdmulh.2s $rd, $rn, $rm$idx */
5702  0,
5704 },
5705 { /* AArch64_SQDMULHv4i16, ARM64_INS_SQDMULH: sqdmulh.4h $rd, $rn, $rm| */
5706  0,
5708 },
5709 { /* AArch64_SQDMULHv4i16_indexed, ARM64_INS_SQDMULH: sqdmulh.4h $rd, $rn, $rm$idx */
5710  0,
5712 },
5713 { /* AArch64_SQDMULHv4i32, ARM64_INS_SQDMULH: sqdmulh.4s $rd, $rn, $rm| */
5714  0,
5716 },
5717 { /* AArch64_SQDMULHv4i32_indexed, ARM64_INS_SQDMULH: sqdmulh.4s $rd, $rn, $rm$idx */
5718  0,
5720 },
5721 { /* AArch64_SQDMULHv8i16, ARM64_INS_SQDMULH: sqdmulh.8h $rd, $rn, $rm| */
5722  0,
5724 },
5725 { /* AArch64_SQDMULHv8i16_indexed, ARM64_INS_SQDMULH: sqdmulh.8h $rd, $rn, $rm$idx */
5726  0,
5728 },
5729 { /* AArch64_SQDMULLi16, ARM64_INS_SQDMULL: sqdmull $rd, $rn, $rm */
5730  0,
5732 },
5733 { /* AArch64_SQDMULLi32, ARM64_INS_SQDMULL: sqdmull $rd, $rn, $rm */
5734  0,
5736 },
5737 { /* AArch64_SQDMULLv1i32_indexed, ARM64_INS_SQDMULL: sqdmull.h $rd, $rn, $rm$idx */
5738  0,
5740 },
5741 { /* AArch64_SQDMULLv1i64_indexed, ARM64_INS_SQDMULL: sqdmull.s $rd, $rn, $rm$idx */
5742  0,
5744 },
5745 { /* AArch64_SQDMULLv2i32_indexed, ARM64_INS_SQDMULL: sqdmull.2d $rd, $rn, $rm$idx */
5746  0,
5748 },
5749 { /* AArch64_SQDMULLv2i32_v2i64, ARM64_INS_SQDMULL: sqdmull.2d $rd, $rn, $rm */
5750  0,
5752 },
5753 { /* AArch64_SQDMULLv4i16_indexed, ARM64_INS_SQDMULL: sqdmull.4s $rd, $rn, $rm$idx */
5754  0,
5756 },
5757 { /* AArch64_SQDMULLv4i16_v4i32, ARM64_INS_SQDMULL: sqdmull.4s $rd, $rn, $rm */
5758  0,
5760 },
5761 { /* AArch64_SQDMULLv4i32_indexed, ARM64_INS_SQDMULL2: sqdmull2.2d $rd, $rn, $rm$idx */
5762  0,
5764 },
5765 { /* AArch64_SQDMULLv4i32_v2i64, ARM64_INS_SQDMULL2: sqdmull2.2d $rd, $rn, $rm */
5766  0,
5768 },
5769 { /* AArch64_SQDMULLv8i16_indexed, ARM64_INS_SQDMULL2: sqdmull2.4s $rd, $rn, $rm$idx */
5770  0,
5772 },
5773 { /* AArch64_SQDMULLv8i16_v4i32, ARM64_INS_SQDMULL2: sqdmull2.4s $rd, $rn, $rm */
5774  0,
5776 },
5777 { /* AArch64_SQNEGv16i8, ARM64_INS_SQNEG: sqneg.16b $rd, $rn */
5778  0,
5779  { CS_AC_WRITE, CS_AC_READ, 0 }
5780 },
5781 { /* AArch64_SQNEGv1i16, ARM64_INS_SQNEG: sqneg $rd, $rn */
5782  0,
5783  { CS_AC_WRITE, CS_AC_READ, 0 }
5784 },
5785 { /* AArch64_SQNEGv1i32, ARM64_INS_SQNEG: sqneg $rd, $rn */
5786  0,
5787  { CS_AC_WRITE, CS_AC_READ, 0 }
5788 },
5789 { /* AArch64_SQNEGv1i64, ARM64_INS_SQNEG: sqneg $rd, $rn */
5790  0,
5791  { CS_AC_WRITE, CS_AC_READ, 0 }
5792 },
5793 { /* AArch64_SQNEGv1i8, ARM64_INS_SQNEG: sqneg $rd, $rn */
5794  0,
5795  { CS_AC_WRITE, CS_AC_READ, 0 }
5796 },
5797 { /* AArch64_SQNEGv2i32, ARM64_INS_SQNEG: sqneg.2s $rd, $rn */
5798  0,
5799  { CS_AC_WRITE, CS_AC_READ, 0 }
5800 },
5801 { /* AArch64_SQNEGv2i64, ARM64_INS_SQNEG: sqneg.2d $rd, $rn */
5802  0,
5803  { CS_AC_WRITE, CS_AC_READ, 0 }
5804 },
5805 { /* AArch64_SQNEGv4i16, ARM64_INS_SQNEG: sqneg.4h $rd, $rn */
5806  0,
5807  { CS_AC_WRITE, CS_AC_READ, 0 }
5808 },
5809 { /* AArch64_SQNEGv4i32, ARM64_INS_SQNEG: sqneg.4s $rd, $rn */
5810  0,
5811  { CS_AC_WRITE, CS_AC_READ, 0 }
5812 },
5813 { /* AArch64_SQNEGv8i16, ARM64_INS_SQNEG: sqneg.8h $rd, $rn */
5814  0,
5815  { CS_AC_WRITE, CS_AC_READ, 0 }
5816 },
5817 { /* AArch64_SQNEGv8i8, ARM64_INS_SQNEG: sqneg.8b $rd, $rn */
5818  0,
5819  { CS_AC_WRITE, CS_AC_READ, 0 }
5820 },
5821 { /* AArch64_SQRDMULHv1i16, ARM64_INS_SQRDMULH: sqrdmulh $rd, $rn, $rm */
5822  0,
5824 },
5825 { /* AArch64_SQRDMULHv1i16_indexed, ARM64_INS_SQRDMULH: sqrdmulh.h $rd, $rn, $rm$idx */
5826  0,
5828 },
5829 { /* AArch64_SQRDMULHv1i32, ARM64_INS_SQRDMULH: sqrdmulh $rd, $rn, $rm */
5830  0,
5832 },
5833 { /* AArch64_SQRDMULHv1i32_indexed, ARM64_INS_SQRDMULH: sqrdmulh.s $rd, $rn, $rm$idx */
5834  0,
5836 },
5837 { /* AArch64_SQRDMULHv2i32, ARM64_INS_SQRDMULH: sqrdmulh.2s $rd, $rn, $rm| */
5838  0,
5840 },
5841 { /* AArch64_SQRDMULHv2i32_indexed, ARM64_INS_SQRDMULH: sqrdmulh.2s $rd, $rn, $rm$idx */
5842  0,
5844 },
5845 { /* AArch64_SQRDMULHv4i16, ARM64_INS_SQRDMULH: sqrdmulh.4h $rd, $rn, $rm| */
5846  0,
5848 },
5849 { /* AArch64_SQRDMULHv4i16_indexed, ARM64_INS_SQRDMULH: sqrdmulh.4h $rd, $rn, $rm$idx */
5850  0,
5852 },
5853 { /* AArch64_SQRDMULHv4i32, ARM64_INS_SQRDMULH: sqrdmulh.4s $rd, $rn, $rm| */
5854  0,
5856 },
5857 { /* AArch64_SQRDMULHv4i32_indexed, ARM64_INS_SQRDMULH: sqrdmulh.4s $rd, $rn, $rm$idx */
5858  0,
5860 },
5861 { /* AArch64_SQRDMULHv8i16, ARM64_INS_SQRDMULH: sqrdmulh.8h $rd, $rn, $rm| */
5862  0,
5864 },
5865 { /* AArch64_SQRDMULHv8i16_indexed, ARM64_INS_SQRDMULH: sqrdmulh.8h $rd, $rn, $rm$idx */
5866  0,
5868 },
5869 { /* AArch64_SQRSHLv16i8, ARM64_INS_SQRSHL: sqrshl.16b $rd, $rn, $rm| */
5870  0,
5872 },
5873 { /* AArch64_SQRSHLv1i16, ARM64_INS_SQRSHL: sqrshl $rd, $rn, $rm */
5874  0,
5876 },
5877 { /* AArch64_SQRSHLv1i32, ARM64_INS_SQRSHL: sqrshl $rd, $rn, $rm */
5878  0,
5880 },
5881 { /* AArch64_SQRSHLv1i64, ARM64_INS_SQRSHL: sqrshl $rd, $rn, $rm */
5882  0,
5884 },
5885 { /* AArch64_SQRSHLv1i8, ARM64_INS_SQRSHL: sqrshl $rd, $rn, $rm */
5886  0,
5888 },
5889 { /* AArch64_SQRSHLv2i32, ARM64_INS_SQRSHL: sqrshl.2s $rd, $rn, $rm| */
5890  0,
5892 },
5893 { /* AArch64_SQRSHLv2i64, ARM64_INS_SQRSHL: sqrshl.2d $rd, $rn, $rm| */
5894  0,
5896 },
5897 { /* AArch64_SQRSHLv4i16, ARM64_INS_SQRSHL: sqrshl.4h $rd, $rn, $rm| */
5898  0,
5900 },
5901 { /* AArch64_SQRSHLv4i32, ARM64_INS_SQRSHL: sqrshl.4s $rd, $rn, $rm| */
5902  0,
5904 },
5905 { /* AArch64_SQRSHLv8i16, ARM64_INS_SQRSHL: sqrshl.8h $rd, $rn, $rm| */
5906  0,
5908 },
5909 { /* AArch64_SQRSHLv8i8, ARM64_INS_SQRSHL: sqrshl.8b $rd, $rn, $rm| */
5910  0,
5912 },
5913 { /* AArch64_SQRSHRNb, ARM64_INS_SQRSHRN: sqrshrn $rd, $rn, $imm */
5914  0,
5916 },
5917 { /* AArch64_SQRSHRNh, ARM64_INS_SQRSHRN: sqrshrn $rd, $rn, $imm */
5918  0,
5920 },
5921 { /* AArch64_SQRSHRNs, ARM64_INS_SQRSHRN: sqrshrn $rd, $rn, $imm */
5922  0,
5924 },
5925 { /* AArch64_SQRSHRNv16i8_shift, ARM64_INS_SQRSHRN2: sqrshrn2.16b $rd, $rn, $imm */
5926  0,
5928 },
5929 { /* AArch64_SQRSHRNv2i32_shift, ARM64_INS_SQRSHRN: sqrshrn.2s $rd, $rn, $imm */
5930  0,
5932 },
5933 { /* AArch64_SQRSHRNv4i16_shift, ARM64_INS_SQRSHRN: sqrshrn.4h $rd, $rn, $imm */
5934  0,
5936 },
5937 { /* AArch64_SQRSHRNv4i32_shift, ARM64_INS_SQRSHRN2: sqrshrn2.4s $rd, $rn, $imm */
5938  0,
5940 },
5941 { /* AArch64_SQRSHRNv8i16_shift, ARM64_INS_SQRSHRN2: sqrshrn2.8h $rd, $rn, $imm */
5942  0,
5944 },
5945 { /* AArch64_SQRSHRNv8i8_shift, ARM64_INS_SQRSHRN: sqrshrn.8b $rd, $rn, $imm */
5946  0,
5948 },
5949 { /* AArch64_SQRSHRUNb, ARM64_INS_SQRSHRUN: sqrshrun $rd, $rn, $imm */
5950  0,
5952 },
5953 { /* AArch64_SQRSHRUNh, ARM64_INS_SQRSHRUN: sqrshrun $rd, $rn, $imm */
5954  0,
5956 },
5957 { /* AArch64_SQRSHRUNs, ARM64_INS_SQRSHRUN: sqrshrun $rd, $rn, $imm */
5958  0,
5960 },
5961 { /* AArch64_SQRSHRUNv16i8_shift, ARM64_INS_SQRSHRUN2: sqrshrun2.16b $rd, $rn, $imm */
5962  0,
5964 },
5965 { /* AArch64_SQRSHRUNv2i32_shift, ARM64_INS_SQRSHRUN: sqrshrun.2s $rd, $rn, $imm */
5966  0,
5968 },
5969 { /* AArch64_SQRSHRUNv4i16_shift, ARM64_INS_SQRSHRUN: sqrshrun.4h $rd, $rn, $imm */
5970  0,
5972 },
5973 { /* AArch64_SQRSHRUNv4i32_shift, ARM64_INS_SQRSHRUN2: sqrshrun2.4s $rd, $rn, $imm */
5974  0,
5976 },
5977 { /* AArch64_SQRSHRUNv8i16_shift, ARM64_INS_SQRSHRUN2: sqrshrun2.8h $rd, $rn, $imm */
5978  0,
5980 },
5981 { /* AArch64_SQRSHRUNv8i8_shift, ARM64_INS_SQRSHRUN: sqrshrun.8b $rd, $rn, $imm */
5982  0,
5984 },
5985 { /* AArch64_SQSHLUb, ARM64_INS_SQSHLU: sqshlu $rd, $rn, $imm */
5986  0,
5988 },
5989 { /* AArch64_SQSHLUd, ARM64_INS_SQSHLU: sqshlu $rd, $rn, $imm */
5990  0,
5992 },
5993 { /* AArch64_SQSHLUh, ARM64_INS_SQSHLU: sqshlu $rd, $rn, $imm */
5994  0,
5996 },
5997 { /* AArch64_SQSHLUs, ARM64_INS_SQSHLU: sqshlu $rd, $rn, $imm */
5998  0,
6000 },
6001 { /* AArch64_SQSHLUv16i8_shift, ARM64_INS_SQSHLU: sqshlu.16b $rd, $rn, $imm */
6002  0,
6004 },
6005 { /* AArch64_SQSHLUv2i32_shift, ARM64_INS_SQSHLU: sqshlu.2s $rd, $rn, $imm */
6006  0,
6008 },
6009 { /* AArch64_SQSHLUv2i64_shift, ARM64_INS_SQSHLU: sqshlu.2d $rd, $rn, $imm */
6010  0,
6012 },
6013 { /* AArch64_SQSHLUv4i16_shift, ARM64_INS_SQSHLU: sqshlu.4h $rd, $rn, $imm */
6014  0,
6016 },
6017 { /* AArch64_SQSHLUv4i32_shift, ARM64_INS_SQSHLU: sqshlu.4s $rd, $rn, $imm */
6018  0,
6020 },
6021 { /* AArch64_SQSHLUv8i16_shift, ARM64_INS_SQSHLU: sqshlu.8h $rd, $rn, $imm */
6022  0,
6024 },
6025 { /* AArch64_SQSHLUv8i8_shift, ARM64_INS_SQSHLU: sqshlu.8b $rd, $rn, $imm */
6026  0,
6028 },
6029 { /* AArch64_SQSHLb, ARM64_INS_SQSHL: sqshl $rd, $rn, $imm */
6030  0,
6032 },
6033 { /* AArch64_SQSHLd, ARM64_INS_SQSHL: sqshl $rd, $rn, $imm */
6034  0,
6036 },
6037 { /* AArch64_SQSHLh, ARM64_INS_SQSHL: sqshl $rd, $rn, $imm */
6038  0,
6040 },
6041 { /* AArch64_SQSHLs, ARM64_INS_SQSHL: sqshl $rd, $rn, $imm */
6042  0,
6044 },
6045 { /* AArch64_SQSHLv16i8, ARM64_INS_SQSHL: sqshl.16b $rd, $rn, $rm| */
6046  0,
6048 },
6049 { /* AArch64_SQSHLv16i8_shift, ARM64_INS_SQSHL: sqshl.16b $rd, $rn, $imm */
6050  0,
6052 },
6053 { /* AArch64_SQSHLv1i16, ARM64_INS_SQSHL: sqshl $rd, $rn, $rm */
6054  0,
6056 },
6057 { /* AArch64_SQSHLv1i32, ARM64_INS_SQSHL: sqshl $rd, $rn, $rm */
6058  0,
6060 },
6061 { /* AArch64_SQSHLv1i64, ARM64_INS_SQSHL: sqshl $rd, $rn, $rm */
6062  0,
6064 },
6065 { /* AArch64_SQSHLv1i8, ARM64_INS_SQSHL: sqshl $rd, $rn, $rm */
6066  0,
6068 },
6069 { /* AArch64_SQSHLv2i32, ARM64_INS_SQSHL: sqshl.2s $rd, $rn, $rm| */
6070  0,
6072 },
6073 { /* AArch64_SQSHLv2i32_shift, ARM64_INS_SQSHL: sqshl.2s $rd, $rn, $imm */
6074  0,
6076 },
6077 { /* AArch64_SQSHLv2i64, ARM64_INS_SQSHL: sqshl.2d $rd, $rn, $rm| */
6078  0,
6080 },
6081 { /* AArch64_SQSHLv2i64_shift, ARM64_INS_SQSHL: sqshl.2d $rd, $rn, $imm */
6082  0,
6084 },
6085 { /* AArch64_SQSHLv4i16, ARM64_INS_SQSHL: sqshl.4h $rd, $rn, $rm| */
6086  0,
6088 },
6089 { /* AArch64_SQSHLv4i16_shift, ARM64_INS_SQSHL: sqshl.4h $rd, $rn, $imm */
6090  0,
6092 },
6093 { /* AArch64_SQSHLv4i32, ARM64_INS_SQSHL: sqshl.4s $rd, $rn, $rm| */
6094  0,
6096 },
6097 { /* AArch64_SQSHLv4i32_shift, ARM64_INS_SQSHL: sqshl.4s $rd, $rn, $imm */
6098  0,
6100 },
6101 { /* AArch64_SQSHLv8i16, ARM64_INS_SQSHL: sqshl.8h $rd, $rn, $rm| */
6102  0,
6104 },
6105 { /* AArch64_SQSHLv8i16_shift, ARM64_INS_SQSHL: sqshl.8h $rd, $rn, $imm */
6106  0,
6108 },
6109 { /* AArch64_SQSHLv8i8, ARM64_INS_SQSHL: sqshl.8b $rd, $rn, $rm| */
6110  0,
6112 },
6113 { /* AArch64_SQSHLv8i8_shift, ARM64_INS_SQSHL: sqshl.8b $rd, $rn, $imm */
6114  0,
6116 },
6117 { /* AArch64_SQSHRNb, ARM64_INS_SQSHRN: sqshrn $rd, $rn, $imm */
6118  0,
6120 },
6121 { /* AArch64_SQSHRNh, ARM64_INS_SQSHRN: sqshrn $rd, $rn, $imm */
6122  0,
6124 },
6125 { /* AArch64_SQSHRNs, ARM64_INS_SQSHRN: sqshrn $rd, $rn, $imm */
6126  0,
6128 },
6129 { /* AArch64_SQSHRNv16i8_shift, ARM64_INS_SQSHRN2: sqshrn2.16b $rd, $rn, $imm */
6130  0,
6132 },
6133 { /* AArch64_SQSHRNv2i32_shift, ARM64_INS_SQSHRN: sqshrn.2s $rd, $rn, $imm */
6134  0,
6136 },
6137 { /* AArch64_SQSHRNv4i16_shift, ARM64_INS_SQSHRN: sqshrn.4h $rd, $rn, $imm */
6138  0,
6140 },
6141 { /* AArch64_SQSHRNv4i32_shift, ARM64_INS_SQSHRN2: sqshrn2.4s $rd, $rn, $imm */
6142  0,
6144 },
6145 { /* AArch64_SQSHRNv8i16_shift, ARM64_INS_SQSHRN2: sqshrn2.8h $rd, $rn, $imm */
6146  0,
6148 },
6149 { /* AArch64_SQSHRNv8i8_shift, ARM64_INS_SQSHRN: sqshrn.8b $rd, $rn, $imm */
6150  0,
6152 },
6153 { /* AArch64_SQSHRUNb, ARM64_INS_SQSHRUN: sqshrun $rd, $rn, $imm */
6154  0,
6156 },
6157 { /* AArch64_SQSHRUNh, ARM64_INS_SQSHRUN: sqshrun $rd, $rn, $imm */
6158  0,
6160 },
6161 { /* AArch64_SQSHRUNs, ARM64_INS_SQSHRUN: sqshrun $rd, $rn, $imm */
6162  0,
6164 },
6165 { /* AArch64_SQSHRUNv16i8_shift, ARM64_INS_SQSHRUN2: sqshrun2.16b $rd, $rn, $imm */
6166  0,
6168 },
6169 { /* AArch64_SQSHRUNv2i32_shift, ARM64_INS_SQSHRUN: sqshrun.2s $rd, $rn, $imm */
6170  0,
6172 },
6173 { /* AArch64_SQSHRUNv4i16_shift, ARM64_INS_SQSHRUN: sqshrun.4h $rd, $rn, $imm */
6174  0,
6176 },
6177 { /* AArch64_SQSHRUNv4i32_shift, ARM64_INS_SQSHRUN2: sqshrun2.4s $rd, $rn, $imm */
6178  0,
6180 },
6181 { /* AArch64_SQSHRUNv8i16_shift, ARM64_INS_SQSHRUN2: sqshrun2.8h $rd, $rn, $imm */
6182  0,
6184 },
6185 { /* AArch64_SQSHRUNv8i8_shift, ARM64_INS_SQSHRUN: sqshrun.8b $rd, $rn, $imm */
6186  0,
6188 },
6189 { /* AArch64_SQSUBv16i8, ARM64_INS_SQSUB: sqsub.16b $rd, $rn, $rm| */
6190  0,
6192 },
6193 { /* AArch64_SQSUBv1i16, ARM64_INS_SQSUB: sqsub $rd, $rn, $rm */
6194  0,
6196 },
6197 { /* AArch64_SQSUBv1i32, ARM64_INS_SQSUB: sqsub $rd, $rn, $rm */
6198  0,
6200 },
6201 { /* AArch64_SQSUBv1i64, ARM64_INS_SQSUB: sqsub $rd, $rn, $rm */
6202  0,
6204 },
6205 { /* AArch64_SQSUBv1i8, ARM64_INS_SQSUB: sqsub $rd, $rn, $rm */
6206  0,
6208 },
6209 { /* AArch64_SQSUBv2i32, ARM64_INS_SQSUB: sqsub.2s $rd, $rn, $rm| */
6210  0,
6212 },
6213 { /* AArch64_SQSUBv2i64, ARM64_INS_SQSUB: sqsub.2d $rd, $rn, $rm| */
6214  0,
6216 },
6217 { /* AArch64_SQSUBv4i16, ARM64_INS_SQSUB: sqsub.4h $rd, $rn, $rm| */
6218  0,
6220 },
6221 { /* AArch64_SQSUBv4i32, ARM64_INS_SQSUB: sqsub.4s $rd, $rn, $rm| */
6222  0,
6224 },
6225 { /* AArch64_SQSUBv8i16, ARM64_INS_SQSUB: sqsub.8h $rd, $rn, $rm| */
6226  0,
6228 },
6229 { /* AArch64_SQSUBv8i8, ARM64_INS_SQSUB: sqsub.8b $rd, $rn, $rm| */
6230  0,
6232 },
6233 { /* AArch64_SQXTNv16i8, ARM64_INS_SQXTN2: sqxtn2.16b $rd, $rn */
6234  0,
6235  { CS_AC_WRITE, CS_AC_READ, 0 }
6236 },
6237 { /* AArch64_SQXTNv1i16, ARM64_INS_SQXTN: sqxtn $rd, $rn */
6238  0,
6239  { CS_AC_WRITE, CS_AC_READ, 0 }
6240 },
6241 { /* AArch64_SQXTNv1i32, ARM64_INS_SQXTN: sqxtn $rd, $rn */
6242  0,
6243  { CS_AC_WRITE, CS_AC_READ, 0 }
6244 },
6245 { /* AArch64_SQXTNv1i8, ARM64_INS_SQXTN: sqxtn $rd, $rn */
6246  0,
6247  { CS_AC_WRITE, CS_AC_READ, 0 }
6248 },
6249 { /* AArch64_SQXTNv2i32, ARM64_INS_SQXTN: sqxtn.2s $rd, $rn */
6250  0,
6251  { CS_AC_WRITE, CS_AC_READ, 0 }
6252 },
6253 { /* AArch64_SQXTNv4i16, ARM64_INS_SQXTN: sqxtn.4h $rd, $rn */
6254  0,
6255  { CS_AC_WRITE, CS_AC_READ, 0 }
6256 },
6257 { /* AArch64_SQXTNv4i32, ARM64_INS_SQXTN2: sqxtn2.4s $rd, $rn */
6258  0,
6259  { CS_AC_WRITE, CS_AC_READ, 0 }
6260 },
6261 { /* AArch64_SQXTNv8i16, ARM64_INS_SQXTN2: sqxtn2.8h $rd, $rn */
6262  0,
6263  { CS_AC_WRITE, CS_AC_READ, 0 }
6264 },
6265 { /* AArch64_SQXTNv8i8, ARM64_INS_SQXTN: sqxtn.8b $rd, $rn */
6266  0,
6267  { CS_AC_WRITE, CS_AC_READ, 0 }
6268 },
6269 { /* AArch64_SQXTUNv16i8, ARM64_INS_SQXTUN2: sqxtun2.16b $rd, $rn */
6270  0,
6271  { CS_AC_WRITE, CS_AC_READ, 0 }
6272 },
6273 { /* AArch64_SQXTUNv1i16, ARM64_INS_SQXTUN: sqxtun $rd, $rn */
6274  0,
6275  { CS_AC_WRITE, CS_AC_READ, 0 }
6276 },
6277 { /* AArch64_SQXTUNv1i32, ARM64_INS_SQXTUN: sqxtun $rd, $rn */
6278  0,
6279  { CS_AC_WRITE, CS_AC_READ, 0 }
6280 },
6281 { /* AArch64_SQXTUNv1i8, ARM64_INS_SQXTUN: sqxtun $rd, $rn */
6282  0,
6283  { CS_AC_WRITE, CS_AC_READ, 0 }
6284 },
6285 { /* AArch64_SQXTUNv2i32, ARM64_INS_SQXTUN: sqxtun.2s $rd, $rn */
6286  0,
6287  { CS_AC_WRITE, CS_AC_READ, 0 }
6288 },
6289 { /* AArch64_SQXTUNv4i16, ARM64_INS_SQXTUN: sqxtun.4h $rd, $rn */
6290  0,
6291  { CS_AC_WRITE, CS_AC_READ, 0 }
6292 },
6293 { /* AArch64_SQXTUNv4i32, ARM64_INS_SQXTUN2: sqxtun2.4s $rd, $rn */
6294  0,
6295  { CS_AC_WRITE, CS_AC_READ, 0 }
6296 },
6297 { /* AArch64_SQXTUNv8i16, ARM64_INS_SQXTUN2: sqxtun2.8h $rd, $rn */
6298  0,
6299  { CS_AC_WRITE, CS_AC_READ, 0 }
6300 },
6301 { /* AArch64_SQXTUNv8i8, ARM64_INS_SQXTUN: sqxtun.8b $rd, $rn */
6302  0,
6303  { CS_AC_WRITE, CS_AC_READ, 0 }
6304 },
6305 { /* AArch64_SRHADDv16i8, ARM64_INS_SRHADD: srhadd.16b $rd, $rn, $rm| */
6306  0,
6308 },
6309 { /* AArch64_SRHADDv2i32, ARM64_INS_SRHADD: srhadd.2s $rd, $rn, $rm| */
6310  0,
6312 },
6313 { /* AArch64_SRHADDv4i16, ARM64_INS_SRHADD: srhadd.4h $rd, $rn, $rm| */
6314  0,
6316 },
6317 { /* AArch64_SRHADDv4i32, ARM64_INS_SRHADD: srhadd.4s $rd, $rn, $rm| */
6318  0,
6320 },
6321 { /* AArch64_SRHADDv8i16, ARM64_INS_SRHADD: srhadd.8h $rd, $rn, $rm| */
6322  0,
6324 },
6325 { /* AArch64_SRHADDv8i8, ARM64_INS_SRHADD: srhadd.8b $rd, $rn, $rm| */
6326  0,
6328 },
6329 { /* AArch64_SRId, ARM64_INS_SRI: sri $rd, $rn, $imm */
6330  0,
6332 },
6333 { /* AArch64_SRIv16i8_shift, ARM64_INS_SRI: sri.16b $rd, $rn, $imm */
6334  0,
6336 },
6337 { /* AArch64_SRIv2i32_shift, ARM64_INS_SRI: sri.2s $rd, $rn, $imm */
6338  0,
6340 },
6341 { /* AArch64_SRIv2i64_shift, ARM64_INS_SRI: sri.2d $rd, $rn, $imm */
6342  0,
6344 },
6345 { /* AArch64_SRIv4i16_shift, ARM64_INS_SRI: sri.4h $rd, $rn, $imm */
6346  0,
6348 },
6349 { /* AArch64_SRIv4i32_shift, ARM64_INS_SRI: sri.4s $rd, $rn, $imm */
6350  0,
6352 },
6353 { /* AArch64_SRIv8i16_shift, ARM64_INS_SRI: sri.8h $rd, $rn, $imm */
6354  0,
6356 },
6357 { /* AArch64_SRIv8i8_shift, ARM64_INS_SRI: sri.8b $rd, $rn, $imm */
6358  0,
6360 },
6361 { /* AArch64_SRSHLv16i8, ARM64_INS_SRSHL: srshl.16b $rd, $rn, $rm| */
6362  0,
6364 },
6365 { /* AArch64_SRSHLv1i64, ARM64_INS_SRSHL: srshl $rd, $rn, $rm */
6366  0,
6368 },
6369 { /* AArch64_SRSHLv2i32, ARM64_INS_SRSHL: srshl.2s $rd, $rn, $rm| */
6370  0,
6372 },
6373 { /* AArch64_SRSHLv2i64, ARM64_INS_SRSHL: srshl.2d $rd, $rn, $rm| */
6374  0,
6376 },
6377 { /* AArch64_SRSHLv4i16, ARM64_INS_SRSHL: srshl.4h $rd, $rn, $rm| */
6378  0,
6380 },
6381 { /* AArch64_SRSHLv4i32, ARM64_INS_SRSHL: srshl.4s $rd, $rn, $rm| */
6382  0,
6384 },
6385 { /* AArch64_SRSHLv8i16, ARM64_INS_SRSHL: srshl.8h $rd, $rn, $rm| */
6386  0,
6388 },
6389 { /* AArch64_SRSHLv8i8, ARM64_INS_SRSHL: srshl.8b $rd, $rn, $rm| */
6390  0,
6392 },
6393 { /* AArch64_SRSHRd, ARM64_INS_SRSHR: srshr $rd, $rn, $imm */
6394  0,
6396 },
6397 { /* AArch64_SRSHRv16i8_shift, ARM64_INS_SRSHR: srshr.16b $rd, $rn, $imm */
6398  0,
6400 },
6401 { /* AArch64_SRSHRv2i32_shift, ARM64_INS_SRSHR: srshr.2s $rd, $rn, $imm */
6402  0,
6404 },
6405 { /* AArch64_SRSHRv2i64_shift, ARM64_INS_SRSHR: srshr.2d $rd, $rn, $imm */
6406  0,
6408 },
6409 { /* AArch64_SRSHRv4i16_shift, ARM64_INS_SRSHR: srshr.4h $rd, $rn, $imm */
6410  0,
6412 },
6413 { /* AArch64_SRSHRv4i32_shift, ARM64_INS_SRSHR: srshr.4s $rd, $rn, $imm */
6414  0,
6416 },
6417 { /* AArch64_SRSHRv8i16_shift, ARM64_INS_SRSHR: srshr.8h $rd, $rn, $imm */
6418  0,
6420 },
6421 { /* AArch64_SRSHRv8i8_shift, ARM64_INS_SRSHR: srshr.8b $rd, $rn, $imm */
6422  0,
6424 },
6425 { /* AArch64_SRSRAd, ARM64_INS_SRSRA: srsra $rd, $rn, $imm */
6426  0,
6428 },
6429 { /* AArch64_SRSRAv16i8_shift, ARM64_INS_SRSRA: srsra.16b $rd, $rn, $imm */
6430  0,
6432 },
6433 { /* AArch64_SRSRAv2i32_shift, ARM64_INS_SRSRA: srsra.2s $rd, $rn, $imm */
6434  0,
6436 },
6437 { /* AArch64_SRSRAv2i64_shift, ARM64_INS_SRSRA: srsra.2d $rd, $rn, $imm */
6438  0,
6440 },
6441 { /* AArch64_SRSRAv4i16_shift, ARM64_INS_SRSRA: srsra.4h $rd, $rn, $imm */
6442  0,
6444 },
6445 { /* AArch64_SRSRAv4i32_shift, ARM64_INS_SRSRA: srsra.4s $rd, $rn, $imm */
6446  0,
6448 },
6449 { /* AArch64_SRSRAv8i16_shift, ARM64_INS_SRSRA: srsra.8h $rd, $rn, $imm */
6450  0,
6452 },
6453 { /* AArch64_SRSRAv8i8_shift, ARM64_INS_SRSRA: srsra.8b $rd, $rn, $imm */
6454  0,
6456 },
6457 { /* AArch64_SSHLLv16i8_shift, ARM64_INS_SSHLL2: sshll2.8h $rd, $rn, $imm */
6458  0,
6460 },
6461 { /* AArch64_SSHLLv2i32_shift, ARM64_INS_SSHLL: sshll.2d $rd, $rn, $imm */
6462  0,
6464 },
6465 { /* AArch64_SSHLLv4i16_shift, ARM64_INS_SSHLL: sshll.4s $rd, $rn, $imm */
6466  0,
6468 },
6469 { /* AArch64_SSHLLv4i32_shift, ARM64_INS_SSHLL2: sshll2.2d $rd, $rn, $imm */
6470  0,
6472 },
6473 { /* AArch64_SSHLLv8i16_shift, ARM64_INS_SSHLL2: sshll2.4s $rd, $rn, $imm */
6474  0,
6476 },
6477 { /* AArch64_SSHLLv8i8_shift, ARM64_INS_SSHLL: sshll.8h $rd, $rn, $imm */
6478  0,
6480 },
6481 { /* AArch64_SSHLv16i8, ARM64_INS_SSHL: sshl.16b $rd, $rn, $rm| */
6482  0,
6484 },
6485 { /* AArch64_SSHLv1i64, ARM64_INS_SSHL: sshl $rd, $rn, $rm */
6486  0,
6488 },
6489 { /* AArch64_SSHLv2i32, ARM64_INS_SSHL: sshl.2s $rd, $rn, $rm| */
6490  0,
6492 },
6493 { /* AArch64_SSHLv2i64, ARM64_INS_SSHL: sshl.2d $rd, $rn, $rm| */
6494  0,
6496 },
6497 { /* AArch64_SSHLv4i16, ARM64_INS_SSHL: sshl.4h $rd, $rn, $rm| */
6498  0,
6500 },
6501 { /* AArch64_SSHLv4i32, ARM64_INS_SSHL: sshl.4s $rd, $rn, $rm| */
6502  0,
6504 },
6505 { /* AArch64_SSHLv8i16, ARM64_INS_SSHL: sshl.8h $rd, $rn, $rm| */
6506  0,
6508 },
6509 { /* AArch64_SSHLv8i8, ARM64_INS_SSHL: sshl.8b $rd, $rn, $rm| */
6510  0,
6512 },
6513 { /* AArch64_SSHRd, ARM64_INS_SSHR: sshr $rd, $rn, $imm */
6514  0,
6516 },
6517 { /* AArch64_SSHRv16i8_shift, ARM64_INS_SSHR: sshr.16b $rd, $rn, $imm */
6518  0,
6520 },
6521 { /* AArch64_SSHRv2i32_shift, ARM64_INS_SSHR: sshr.2s $rd, $rn, $imm */
6522  0,
6524 },
6525 { /* AArch64_SSHRv2i64_shift, ARM64_INS_SSHR: sshr.2d $rd, $rn, $imm */
6526  0,
6528 },
6529 { /* AArch64_SSHRv4i16_shift, ARM64_INS_SSHR: sshr.4h $rd, $rn, $imm */
6530  0,
6532 },
6533 { /* AArch64_SSHRv4i32_shift, ARM64_INS_SSHR: sshr.4s $rd, $rn, $imm */
6534  0,
6536 },
6537 { /* AArch64_SSHRv8i16_shift, ARM64_INS_SSHR: sshr.8h $rd, $rn, $imm */
6538  0,
6540 },
6541 { /* AArch64_SSHRv8i8_shift, ARM64_INS_SSHR: sshr.8b $rd, $rn, $imm */
6542  0,
6544 },
6545 { /* AArch64_SSRAd, ARM64_INS_SSRA: ssra $rd, $rn, $imm */
6546  0,
6548 },
6549 { /* AArch64_SSRAv16i8_shift, ARM64_INS_SSRA: ssra.16b $rd, $rn, $imm */
6550  0,
6552 },
6553 { /* AArch64_SSRAv2i32_shift, ARM64_INS_SSRA: ssra.2s $rd, $rn, $imm */
6554  0,
6556 },
6557 { /* AArch64_SSRAv2i64_shift, ARM64_INS_SSRA: ssra.2d $rd, $rn, $imm */
6558  0,
6560 },
6561 { /* AArch64_SSRAv4i16_shift, ARM64_INS_SSRA: ssra.4h $rd, $rn, $imm */
6562  0,
6564 },
6565 { /* AArch64_SSRAv4i32_shift, ARM64_INS_SSRA: ssra.4s $rd, $rn, $imm */
6566  0,
6568 },
6569 { /* AArch64_SSRAv8i16_shift, ARM64_INS_SSRA: ssra.8h $rd, $rn, $imm */
6570  0,
6572 },
6573 { /* AArch64_SSRAv8i8_shift, ARM64_INS_SSRA: ssra.8b $rd, $rn, $imm */
6574  0,
6576 },
6577 { /* AArch64_SSUBLv16i8_v8i16, ARM64_INS_SSUBL2: ssubl2.8h $rd, $rn, $rm */
6578  0,
6580 },
6581 { /* AArch64_SSUBLv2i32_v2i64, ARM64_INS_SSUBL: ssubl.2d $rd, $rn, $rm */
6582  0,
6584 },
6585 { /* AArch64_SSUBLv4i16_v4i32, ARM64_INS_SSUBL: ssubl.4s $rd, $rn, $rm */
6586  0,
6588 },
6589 { /* AArch64_SSUBLv4i32_v2i64, ARM64_INS_SSUBL2: ssubl2.2d $rd, $rn, $rm */
6590  0,
6592 },
6593 { /* AArch64_SSUBLv8i16_v4i32, ARM64_INS_SSUBL2: ssubl2.4s $rd, $rn, $rm */
6594  0,
6596 },
6597 { /* AArch64_SSUBLv8i8_v8i16, ARM64_INS_SSUBL: ssubl.8h $rd, $rn, $rm */
6598  0,
6600 },
6601 { /* AArch64_SSUBWv16i8_v8i16, ARM64_INS_SSUBW2: ssubw2.8h $rd, $rn, $rm */
6602  0,
6604 },
6605 { /* AArch64_SSUBWv2i32_v2i64, ARM64_INS_SSUBW: ssubw.2d $rd, $rn, $rm */
6606  0,
6608 },
6609 { /* AArch64_SSUBWv4i16_v4i32, ARM64_INS_SSUBW: ssubw.4s $rd, $rn, $rm */
6610  0,
6612 },
6613 { /* AArch64_SSUBWv4i32_v2i64, ARM64_INS_SSUBW2: ssubw2.2d $rd, $rn, $rm */
6614  0,
6616 },
6617 { /* AArch64_SSUBWv8i16_v4i32, ARM64_INS_SSUBW2: ssubw2.4s $rd, $rn, $rm */
6618  0,
6620 },
6621 { /* AArch64_SSUBWv8i8_v8i16, ARM64_INS_SSUBW: ssubw.8h $rd, $rn, $rm */
6622  0,
6624 },
6625 { /* AArch64_ST1Fourv16b, ARM64_INS_ST1: st1 $vt, [$rn] */
6626  0,
6628 },
6629 { /* AArch64_ST1Fourv16b_POST, ARM64_INS_ST1: st1 $vt, [$rn], $xm */
6630  0,
6632 },
6633 { /* AArch64_ST1Fourv1d, ARM64_INS_ST1: st1 $vt, [$rn] */
6634  0,
6636 },
6637 { /* AArch64_ST1Fourv1d_POST, ARM64_INS_ST1: st1 $vt, [$rn], $xm */
6638  0,
6640 },
6641 { /* AArch64_ST1Fourv2d, ARM64_INS_ST1: st1 $vt, [$rn] */
6642  0,
6644 },
6645 { /* AArch64_ST1Fourv2d_POST, ARM64_INS_ST1: st1 $vt, [$rn], $xm */
6646  0,
6648 },
6649 { /* AArch64_ST1Fourv2s, ARM64_INS_ST1: st1 $vt, [$rn] */
6650  0,
6652 },
6653 { /* AArch64_ST1Fourv2s_POST, ARM64_INS_ST1: st1 $vt, [$rn], $xm */
6654  0,
6656 },
6657 { /* AArch64_ST1Fourv4h, ARM64_INS_ST1: st1 $vt, [$rn] */
6658  0,
6660 },
6661 { /* AArch64_ST1Fourv4h_POST, ARM64_INS_ST1: st1 $vt, [$rn], $xm */
6662  0,
6664 },
6665 { /* AArch64_ST1Fourv4s, ARM64_INS_ST1: st1 $vt, [$rn] */
6666  0,
6668 },
6669 { /* AArch64_ST1Fourv4s_POST, ARM64_INS_ST1: st1 $vt, [$rn], $xm */
6670  0,
6672 },
6673 { /* AArch64_ST1Fourv8b, ARM64_INS_ST1: st1 $vt, [$rn] */
6674  0,
6676 },
6677 { /* AArch64_ST1Fourv8b_POST, ARM64_INS_ST1: st1 $vt, [$rn], $xm */
6678  0,
6680 },
6681 { /* AArch64_ST1Fourv8h, ARM64_INS_ST1: st1 $vt, [$rn] */
6682  0,
6684 },
6685 { /* AArch64_ST1Fourv8h_POST, ARM64_INS_ST1: st1 $vt, [$rn], $xm */
6686  0,
6688 },
6689 { /* AArch64_ST1Onev16b, ARM64_INS_ST1: st1 $vt, [$rn] */
6690  0,
6692 },
6693 { /* AArch64_ST1Onev16b_POST, ARM64_INS_ST1: st1 $vt, [$rn], $xm */
6694  0,
6696 },
6697 { /* AArch64_ST1Onev1d, ARM64_INS_ST1: st1 $vt, [$rn] */
6698  0,
6700 },
6701 { /* AArch64_ST1Onev1d_POST, ARM64_INS_ST1: st1 $vt, [$rn], $xm */
6702  0,
6704 },
6705 { /* AArch64_ST1Onev2d, ARM64_INS_ST1: st1 $vt, [$rn] */
6706  0,
6708 },
6709 { /* AArch64_ST1Onev2d_POST, ARM64_INS_ST1: st1 $vt, [$rn], $xm */
6710  0,
6712 },
6713 { /* AArch64_ST1Onev2s, ARM64_INS_ST1: st1 $vt, [$rn] */
6714  0,
6716 },
6717 { /* AArch64_ST1Onev2s_POST, ARM64_INS_ST1: st1 $vt, [$rn], $xm */
6718  0,
6720 },
6721 { /* AArch64_ST1Onev4h, ARM64_INS_ST1: st1 $vt, [$rn] */
6722  0,
6724 },
6725 { /* AArch64_ST1Onev4h_POST, ARM64_INS_ST1: st1 $vt, [$rn], $xm */
6726  0,
6728 },
6729 { /* AArch64_ST1Onev4s, ARM64_INS_ST1: st1 $vt, [$rn] */
6730  0,
6732 },
6733 { /* AArch64_ST1Onev4s_POST, ARM64_INS_ST1: st1 $vt, [$rn], $xm */
6734  0,
6736 },
6737 { /* AArch64_ST1Onev8b, ARM64_INS_ST1: st1 $vt, [$rn] */
6738  0,
6740 },
6741 { /* AArch64_ST1Onev8b_POST, ARM64_INS_ST1: st1 $vt, [$rn], $xm */
6742  0,
6744 },
6745 { /* AArch64_ST1Onev8h, ARM64_INS_ST1: st1 $vt, [$rn] */
6746  0,
6748 },
6749 { /* AArch64_ST1Onev8h_POST, ARM64_INS_ST1: st1 $vt, [$rn], $xm */
6750  0,
6752 },
6753 { /* AArch64_ST1Threev16b, ARM64_INS_ST1: st1 $vt, [$rn] */
6754  0,
6756 },
6757 { /* AArch64_ST1Threev16b_POST, ARM64_INS_ST1: st1 $vt, [$rn], $xm */
6758  0,
6760 },
6761 { /* AArch64_ST1Threev1d, ARM64_INS_ST1: st1 $vt, [$rn] */
6762  0,
6764 },
6765 { /* AArch64_ST1Threev1d_POST, ARM64_INS_ST1: st1 $vt, [$rn], $xm */
6766  0,
6768 },
6769 { /* AArch64_ST1Threev2d, ARM64_INS_ST1: st1 $vt, [$rn] */
6770  0,
6772 },
6773 { /* AArch64_ST1Threev2d_POST, ARM64_INS_ST1: st1 $vt, [$rn], $xm */
6774  0,
6776 },
6777 { /* AArch64_ST1Threev2s, ARM64_INS_ST1: st1 $vt, [$rn] */
6778  0,
6780 },
6781 { /* AArch64_ST1Threev2s_POST, ARM64_INS_ST1: st1 $vt, [$rn], $xm */
6782  0,
6784 },
6785 { /* AArch64_ST1Threev4h, ARM64_INS_ST1: st1 $vt, [$rn] */
6786  0,
6788 },
6789 { /* AArch64_ST1Threev4h_POST, ARM64_INS_ST1: st1 $vt, [$rn], $xm */
6790  0,
6792 },
6793 { /* AArch64_ST1Threev4s, ARM64_INS_ST1: st1 $vt, [$rn] */
6794  0,
6796 },
6797 { /* AArch64_ST1Threev4s_POST, ARM64_INS_ST1: st1 $vt, [$rn], $xm */
6798  0,
6800 },
6801 { /* AArch64_ST1Threev8b, ARM64_INS_ST1: st1 $vt, [$rn] */
6802  0,
6804 },
6805 { /* AArch64_ST1Threev8b_POST, ARM64_INS_ST1: st1 $vt, [$rn], $xm */
6806  0,
6808 },
6809 { /* AArch64_ST1Threev8h, ARM64_INS_ST1: st1 $vt, [$rn] */
6810  0,
6812 },
6813 { /* AArch64_ST1Threev8h_POST, ARM64_INS_ST1: st1 $vt, [$rn], $xm */
6814  0,
6816 },
6817 { /* AArch64_ST1Twov16b, ARM64_INS_ST1: st1 $vt, [$rn] */
6818  0,
6820 },
6821 { /* AArch64_ST1Twov16b_POST, ARM64_INS_ST1: st1 $vt, [$rn], $xm */
6822  0,
6824 },
6825 { /* AArch64_ST1Twov1d, ARM64_INS_ST1: st1 $vt, [$rn] */
6826  0,
6828 },
6829 { /* AArch64_ST1Twov1d_POST, ARM64_INS_ST1: st1 $vt, [$rn], $xm */
6830  0,
6832 },
6833 { /* AArch64_ST1Twov2d, ARM64_INS_ST1: st1 $vt, [$rn] */
6834  0,
6836 },
6837 { /* AArch64_ST1Twov2d_POST, ARM64_INS_ST1: st1 $vt, [$rn], $xm */
6838  0,
6840 },
6841 { /* AArch64_ST1Twov2s, ARM64_INS_ST1: st1 $vt, [$rn] */
6842  0,
6844 },
6845 { /* AArch64_ST1Twov2s_POST, ARM64_INS_ST1: st1 $vt, [$rn], $xm */
6846  0,
6848 },
6849 { /* AArch64_ST1Twov4h, ARM64_INS_ST1: st1 $vt, [$rn] */
6850  0,
6852 },
6853 { /* AArch64_ST1Twov4h_POST, ARM64_INS_ST1: st1 $vt, [$rn], $xm */
6854  0,
6856 },
6857 { /* AArch64_ST1Twov4s, ARM64_INS_ST1: st1 $vt, [$rn] */
6858  0,
6860 },
6861 { /* AArch64_ST1Twov4s_POST, ARM64_INS_ST1: st1 $vt, [$rn], $xm */
6862  0,
6864 },
6865 { /* AArch64_ST1Twov8b, ARM64_INS_ST1: st1 $vt, [$rn] */
6866  0,
6868 },
6869 { /* AArch64_ST1Twov8b_POST, ARM64_INS_ST1: st1 $vt, [$rn], $xm */
6870  0,
6872 },
6873 { /* AArch64_ST1Twov8h, ARM64_INS_ST1: st1 $vt, [$rn] */
6874  0,
6876 },
6877 { /* AArch64_ST1Twov8h_POST, ARM64_INS_ST1: st1 $vt, [$rn], $xm */
6878  0,
6880 },
6881 { /* AArch64_ST1i16, ARM64_INS_ST1: st1 $vt$idx, [$rn] */
6882  0,
6884 },
6885 { /* AArch64_ST1i16_POST, ARM64_INS_ST1: st1 $vt$idx, [$rn], $xm */
6886  0,
6888 },
6889 { /* AArch64_ST1i32, ARM64_INS_ST1: st1 $vt$idx, [$rn] */
6890  0,
6892 },
6893 { /* AArch64_ST1i32_POST, ARM64_INS_ST1: st1 $vt$idx, [$rn], $xm */
6894  0,
6896 },
6897 { /* AArch64_ST1i64, ARM64_INS_ST1: st1 $vt$idx, [$rn] */
6898  0,
6900 },
6901 { /* AArch64_ST1i64_POST, ARM64_INS_ST1: st1 $vt$idx, [$rn], $xm */
6902  0,
6904 },
6905 { /* AArch64_ST1i8, ARM64_INS_ST1: st1 $vt$idx, [$rn] */
6906  0,
6908 },
6909 { /* AArch64_ST1i8_POST, ARM64_INS_ST1: st1 $vt$idx, [$rn], $xm */
6910  0,
6912 },
6913 { /* AArch64_ST2Twov16b, ARM64_INS_ST2: st2 $vt, [$rn] */
6914  0,
6916 },
6917 { /* AArch64_ST2Twov16b_POST, ARM64_INS_ST2: st2 $vt, [$rn], $xm */
6918  0,
6920 },
6921 { /* AArch64_ST2Twov2d, ARM64_INS_ST2: st2 $vt, [$rn] */
6922  0,
6924 },
6925 { /* AArch64_ST2Twov2d_POST, ARM64_INS_ST2: st2 $vt, [$rn], $xm */
6926  0,
6928 },
6929 { /* AArch64_ST2Twov2s, ARM64_INS_ST2: st2 $vt, [$rn] */
6930  0,
6932 },
6933 { /* AArch64_ST2Twov2s_POST, ARM64_INS_ST2: st2 $vt, [$rn], $xm */
6934  0,
6936 },
6937 { /* AArch64_ST2Twov4h, ARM64_INS_ST2: st2 $vt, [$rn] */
6938  0,
6940 },
6941 { /* AArch64_ST2Twov4h_POST, ARM64_INS_ST2: st2 $vt, [$rn], $xm */
6942  0,
6944 },
6945 { /* AArch64_ST2Twov4s, ARM64_INS_ST2: st2 $vt, [$rn] */
6946  0,
6948 },
6949 { /* AArch64_ST2Twov4s_POST, ARM64_INS_ST2: st2 $vt, [$rn], $xm */
6950  0,
6952 },
6953 { /* AArch64_ST2Twov8b, ARM64_INS_ST2: st2 $vt, [$rn] */
6954  0,
6956 },
6957 { /* AArch64_ST2Twov8b_POST, ARM64_INS_ST2: st2 $vt, [$rn], $xm */
6958  0,
6960 },
6961 { /* AArch64_ST2Twov8h, ARM64_INS_ST2: st2 $vt, [$rn] */
6962  0,
6964 },
6965 { /* AArch64_ST2Twov8h_POST, ARM64_INS_ST2: st2 $vt, [$rn], $xm */
6966  0,
6968 },
6969 { /* AArch64_ST2i16, ARM64_INS_ST2: st2 $vt$idx, [$rn] */
6970  0,
6972 },
6973 { /* AArch64_ST2i16_POST, ARM64_INS_ST2: st2 $vt$idx, [$rn], $xm */
6974  0,
6976 },
6977 { /* AArch64_ST2i32, ARM64_INS_ST2: st2 $vt$idx, [$rn] */
6978  0,
6980 },
6981 { /* AArch64_ST2i32_POST, ARM64_INS_ST2: st2 $vt$idx, [$rn], $xm */
6982  0,
6984 },
6985 { /* AArch64_ST2i64, ARM64_INS_ST2: st2 $vt$idx, [$rn] */
6986  0,
6988 },
6989 { /* AArch64_ST2i64_POST, ARM64_INS_ST2: st2 $vt$idx, [$rn], $xm */
6990  0,
6992 },
6993 { /* AArch64_ST2i8, ARM64_INS_ST2: st2 $vt$idx, [$rn] */
6994  0,
6996 },
6997 { /* AArch64_ST2i8_POST, ARM64_INS_ST2: st2 $vt$idx, [$rn], $xm */
6998  0,
7000 },
7001 { /* AArch64_ST3Threev16b, ARM64_INS_ST3: st3 $vt, [$rn] */
7002  0,
7004 },
7005 { /* AArch64_ST3Threev16b_POST, ARM64_INS_ST3: st3 $vt, [$rn], $xm */
7006  0,
7008 },
7009 { /* AArch64_ST3Threev2d, ARM64_INS_ST3: st3 $vt, [$rn] */
7010  0,
7012 },
7013 { /* AArch64_ST3Threev2d_POST, ARM64_INS_ST3: st3 $vt, [$rn], $xm */
7014  0,
7016 },
7017 { /* AArch64_ST3Threev2s, ARM64_INS_ST3: st3 $vt, [$rn] */
7018  0,
7020 },
7021 { /* AArch64_ST3Threev2s_POST, ARM64_INS_ST3: st3 $vt, [$rn], $xm */
7022  0,
7024 },
7025 { /* AArch64_ST3Threev4h, ARM64_INS_ST3: st3 $vt, [$rn] */
7026  0,
7028 },
7029 { /* AArch64_ST3Threev4h_POST, ARM64_INS_ST3: st3 $vt, [$rn], $xm */
7030  0,
7032 },
7033 { /* AArch64_ST3Threev4s, ARM64_INS_ST3: st3 $vt, [$rn] */
7034  0,
7036 },
7037 { /* AArch64_ST3Threev4s_POST, ARM64_INS_ST3: st3 $vt, [$rn], $xm */
7038  0,
7040 },
7041 { /* AArch64_ST3Threev8b, ARM64_INS_ST3: st3 $vt, [$rn] */
7042  0,
7044 },
7045 { /* AArch64_ST3Threev8b_POST, ARM64_INS_ST3: st3 $vt, [$rn], $xm */
7046  0,
7048 },
7049 { /* AArch64_ST3Threev8h, ARM64_INS_ST3: st3 $vt, [$rn] */
7050  0,
7052 },
7053 { /* AArch64_ST3Threev8h_POST, ARM64_INS_ST3: st3 $vt, [$rn], $xm */
7054  0,
7056 },
7057 { /* AArch64_ST3i16, ARM64_INS_ST3: st3 $vt$idx, [$rn] */
7058  0,
7060 },
7061 { /* AArch64_ST3i16_POST, ARM64_INS_ST3: st3 $vt$idx, [$rn], $xm */
7062  0,
7064 },
7065 { /* AArch64_ST3i32, ARM64_INS_ST3: st3 $vt$idx, [$rn] */
7066  0,
7068 },
7069 { /* AArch64_ST3i32_POST, ARM64_INS_ST3: st3 $vt$idx, [$rn], $xm */
7070  0,
7072 },
7073 { /* AArch64_ST3i64, ARM64_INS_ST3: st3 $vt$idx, [$rn] */
7074  0,
7076 },
7077 { /* AArch64_ST3i64_POST, ARM64_INS_ST3: st3 $vt$idx, [$rn], $xm */
7078  0,
7080 },
7081 { /* AArch64_ST3i8, ARM64_INS_ST3: st3 $vt$idx, [$rn] */
7082  0,
7084 },
7085 { /* AArch64_ST3i8_POST, ARM64_INS_ST3: st3 $vt$idx, [$rn], $xm */
7086  0,
7088 },
7089 { /* AArch64_ST4Fourv16b, ARM64_INS_ST4: st4 $vt, [$rn] */
7090  0,
7092 },
7093 { /* AArch64_ST4Fourv16b_POST, ARM64_INS_ST4: st4 $vt, [$rn], $xm */
7094  0,
7096 },
7097 { /* AArch64_ST4Fourv2d, ARM64_INS_ST4: st4 $vt, [$rn] */
7098  0,
7100 },
7101 { /* AArch64_ST4Fourv2d_POST, ARM64_INS_ST4: st4 $vt, [$rn], $xm */
7102  0,
7104 },
7105 { /* AArch64_ST4Fourv2s, ARM64_INS_ST4: st4 $vt, [$rn] */
7106  0,
7108 },
7109 { /* AArch64_ST4Fourv2s_POST, ARM64_INS_ST4: st4 $vt, [$rn], $xm */
7110  0,
7112 },
7113 { /* AArch64_ST4Fourv4h, ARM64_INS_ST4: st4 $vt, [$rn] */
7114  0,
7116 },
7117 { /* AArch64_ST4Fourv4h_POST, ARM64_INS_ST4: st4 $vt, [$rn], $xm */
7118  0,
7120 },
7121 { /* AArch64_ST4Fourv4s, ARM64_INS_ST4: st4 $vt, [$rn] */
7122  0,
7124 },
7125 { /* AArch64_ST4Fourv4s_POST, ARM64_INS_ST4: st4 $vt, [$rn], $xm */
7126  0,
7128 },
7129 { /* AArch64_ST4Fourv8b, ARM64_INS_ST4: st4 $vt, [$rn] */
7130  0,
7132 },
7133 { /* AArch64_ST4Fourv8b_POST, ARM64_INS_ST4: st4 $vt, [$rn], $xm */
7134  0,
7136 },
7137 { /* AArch64_ST4Fourv8h, ARM64_INS_ST4: st4 $vt, [$rn] */
7138  0,
7140 },
7141 { /* AArch64_ST4Fourv8h_POST, ARM64_INS_ST4: st4 $vt, [$rn], $xm */
7142  0,
7144 },
7145 { /* AArch64_ST4i16, ARM64_INS_ST4: st4 $vt$idx, [$rn] */
7146  0,
7148 },
7149 { /* AArch64_ST4i16_POST, ARM64_INS_ST4: st4 $vt$idx, [$rn], $xm */
7150  0,
7152 },
7153 { /* AArch64_ST4i32, ARM64_INS_ST4: st4 $vt$idx, [$rn] */
7154  0,
7156 },
7157 { /* AArch64_ST4i32_POST, ARM64_INS_ST4: st4 $vt$idx, [$rn], $xm */
7158  0,
7160 },
7161 { /* AArch64_ST4i64, ARM64_INS_ST4: st4 $vt$idx, [$rn] */
7162  0,
7164 },
7165 { /* AArch64_ST4i64_POST, ARM64_INS_ST4: st4 $vt$idx, [$rn], $xm */
7166  0,
7168 },
7169 { /* AArch64_ST4i8, ARM64_INS_ST4: st4 $vt$idx, [$rn] */
7170  0,
7172 },
7173 { /* AArch64_ST4i8_POST, ARM64_INS_ST4: st4 $vt$idx, [$rn], $xm */
7174  0,
7176 },
7177 { /* AArch64_STLRB, ARM64_INS_STLRB: stlrb $rt, [$rn] */
7178  0,
7179  { CS_AC_READ, CS_AC_READ, 0 }
7180 },
7181 { /* AArch64_STLRH, ARM64_INS_STLRH: stlrh $rt, [$rn] */
7182  0,
7183  { CS_AC_READ, CS_AC_READ, 0 }
7184 },
7185 { /* AArch64_STLRW, ARM64_INS_STLR: stlr $rt, [$rn] */
7186  0,
7187  { CS_AC_READ, CS_AC_READ, 0 }
7188 },
7189 { /* AArch64_STLRX, ARM64_INS_STLR: stlr $rt, [$rn] */
7190  0,
7191  { CS_AC_READ, CS_AC_READ, 0 }
7192 },
7193 { /* AArch64_STLXPW, ARM64_INS_STLXP: stlxp $ws, $rt, $rt2, [$rn] */
7194  0,
7196 },
7197 { /* AArch64_STLXPX, ARM64_INS_STLXP: stlxp $ws, $rt, $rt2, [$rn] */
7198  0,
7200 },
7201 { /* AArch64_STLXRB, ARM64_INS_STLXRB: stlxrb $ws, $rt, [$rn] */
7202  0,
7204 },
7205 { /* AArch64_STLXRH, ARM64_INS_STLXRH: stlxrh $ws, $rt, [$rn] */
7206  0,
7208 },
7209 { /* AArch64_STLXRW, ARM64_INS_STLXR: stlxr $ws, $rt, [$rn] */
7210  0,
7212 },
7213 { /* AArch64_STLXRX, ARM64_INS_STLXR: stlxr $ws, $rt, [$rn] */
7214  0,
7216 },
7217 { /* AArch64_STNPDi, ARM64_INS_STNP: stnp $rt, $rt2, [$rn, $offset] */
7218  0,
7220 },
7221 { /* AArch64_STNPQi, ARM64_INS_STNP: stnp $rt, $rt2, [$rn, $offset] */
7222  0,
7224 },
7225 { /* AArch64_STNPSi, ARM64_INS_STNP: stnp $rt, $rt2, [$rn, $offset] */
7226  0,
7228 },
7229 { /* AArch64_STNPWi, ARM64_INS_STNP: stnp $rt, $rt2, [$rn, $offset] */
7230  0,
7232 },
7233 { /* AArch64_STNPXi, ARM64_INS_STNP: stnp $rt, $rt2, [$rn, $offset] */
7234  0,
7236 },
7237 { /* AArch64_STPDi, ARM64_INS_STP: stp $rt, $rt2, [$rn, $offset] */
7238  0,
7240 },
7241 { /* AArch64_STPDpost, ARM64_INS_STP: stp $rt, $rt2, [$rn], $offset */
7242  0,
7244 },
7245 { /* AArch64_STPDpre, ARM64_INS_STP: stp $rt, $rt2, [$rn, $offset]! */
7246  0,
7248 },
7249 { /* AArch64_STPQi, ARM64_INS_STP: stp $rt, $rt2, [$rn, $offset] */
7250  0,
7252 },
7253 { /* AArch64_STPQpost, ARM64_INS_STP: stp $rt, $rt2, [$rn], $offset */
7254  0,
7256 },
7257 { /* AArch64_STPQpre, ARM64_INS_STP: stp $rt, $rt2, [$rn, $offset]! */
7258  0,
7260 },
7261 { /* AArch64_STPSi, ARM64_INS_STP: stp $rt, $rt2, [$rn, $offset] */
7262  0,
7264 },
7265 { /* AArch64_STPSpost, ARM64_INS_STP: stp $rt, $rt2, [$rn], $offset */
7266  0,
7268 },
7269 { /* AArch64_STPSpre, ARM64_INS_STP: stp $rt, $rt2, [$rn, $offset]! */
7270  0,
7272 },
7273 { /* AArch64_STPWi, ARM64_INS_STP: stp $rt, $rt2, [$rn, $offset] */
7274  0,
7276 },
7277 { /* AArch64_STPWpost, ARM64_INS_STP: stp $rt, $rt2, [$rn], $offset */
7278  0,
7280 },
7281 { /* AArch64_STPWpre, ARM64_INS_STP: stp $rt, $rt2, [$rn, $offset]! */
7282  0,
7284 },
7285 { /* AArch64_STPXi, ARM64_INS_STP: stp $rt, $rt2, [$rn, $offset] */
7286  0,
7288 },
7289 { /* AArch64_STPXpost, ARM64_INS_STP: stp $rt, $rt2, [$rn], $offset */
7290  0,
7292 },
7293 { /* AArch64_STPXpre, ARM64_INS_STP: stp $rt, $rt2, [$rn, $offset]! */
7294  0,
7296 },
7297 { /* AArch64_STRBBpost, ARM64_INS_STRB: strb $rt, [$rn], $offset */
7298  0,
7300 },
7301 { /* AArch64_STRBBpre, ARM64_INS_STRB: strb $rt, [$rn, $offset]! */
7302  0,
7304 },
7305 { /* AArch64_STRBBroW, ARM64_INS_STRB: strb $rt, [$rn, $rm, $extend] */
7306  0,
7308 },
7309 { /* AArch64_STRBBroX, ARM64_INS_STRB: strb $rt, [$rn, $rm, $extend] */
7310  0,
7312 },
7313 { /* AArch64_STRBBui, ARM64_INS_STRB: strb $rt, [$rn, $offset] */
7314  0,
7316 },
7317 { /* AArch64_STRBpost, ARM64_INS_STR: str $rt, [$rn], $offset */
7318  0,
7320 },
7321 { /* AArch64_STRBpre, ARM64_INS_STR: str $rt, [$rn, $offset]! */
7322  0,
7324 },
7325 { /* AArch64_STRBroW, ARM64_INS_STR: str $rt, [$rn, $rm, $extend] */
7326  0,
7328 },
7329 { /* AArch64_STRBroX, ARM64_INS_STR: str $rt, [$rn, $rm, $extend] */
7330  0,
7332 },
7333 { /* AArch64_STRBui, ARM64_INS_STR: str $rt, [$rn, $offset] */
7334  0,
7336 },
7337 { /* AArch64_STRDpost, ARM64_INS_STR: str $rt, [$rn], $offset */
7338  0,
7340 },
7341 { /* AArch64_STRDpre, ARM64_INS_STR: str $rt, [$rn, $offset]! */
7342  0,
7344 },
7345 { /* AArch64_STRDroW, ARM64_INS_STR: str $rt, [$rn, $rm, $extend] */
7346  0,
7348 },
7349 { /* AArch64_STRDroX, ARM64_INS_STR: str $rt, [$rn, $rm, $extend] */
7350  0,
7352 },
7353 { /* AArch64_STRDui, ARM64_INS_STR: str $rt, [$rn, $offset] */
7354  0,
7356 },
7357 { /* AArch64_STRHHpost, ARM64_INS_STRH: strh $rt, [$rn], $offset */
7358  0,
7360 },
7361 { /* AArch64_STRHHpre, ARM64_INS_STRH: strh $rt, [$rn, $offset]! */
7362  0,
7364 },
7365 { /* AArch64_STRHHroW, ARM64_INS_STRH: strh $rt, [$rn, $rm, $extend] */
7366  0,
7368 },
7369 { /* AArch64_STRHHroX, ARM64_INS_STRH: strh $rt, [$rn, $rm, $extend] */
7370  0,
7372 },
7373 { /* AArch64_STRHHui, ARM64_INS_STRH: strh $rt, [$rn, $offset] */
7374  0,
7376 },
7377 { /* AArch64_STRHpost, ARM64_INS_STR: str $rt, [$rn], $offset */
7378  0,
7380 },
7381 { /* AArch64_STRHpre, ARM64_INS_STR: str $rt, [$rn, $offset]! */
7382  0,
7384 },
7385 { /* AArch64_STRHroW, ARM64_INS_STR: str $rt, [$rn, $rm, $extend] */
7386  0,
7388 },
7389 { /* AArch64_STRHroX, ARM64_INS_STR: str $rt, [$rn, $rm, $extend] */
7390  0,
7392 },
7393 { /* AArch64_STRHui, ARM64_INS_STR: str $rt, [$rn, $offset] */
7394  0,
7396 },
7397 { /* AArch64_STRQpost, ARM64_INS_STR: str $rt, [$rn], $offset */
7398  0,
7400 },
7401 { /* AArch64_STRQpre, ARM64_INS_STR: str $rt, [$rn, $offset]! */
7402  0,
7404 },
7405 { /* AArch64_STRQroW, ARM64_INS_STR: str $rt, [$rn, $rm, $extend] */
7406  0,
7408 },
7409 { /* AArch64_STRQroX, ARM64_INS_STR: str $rt, [$rn, $rm, $extend] */
7410  0,
7412 },
7413 { /* AArch64_STRQui, ARM64_INS_STR: str $rt, [$rn, $offset] */
7414  0,
7416 },
7417 { /* AArch64_STRSpost, ARM64_INS_STR: str $rt, [$rn], $offset */
7418  0,
7420 },
7421 { /* AArch64_STRSpre, ARM64_INS_STR: str $rt, [$rn, $offset]! */
7422  0,
7424 },
7425 { /* AArch64_STRSroW, ARM64_INS_STR: str $rt, [$rn, $rm, $extend] */
7426  0,
7428 },
7429 { /* AArch64_STRSroX, ARM64_INS_STR: str $rt, [$rn, $rm, $extend] */
7430  0,
7432 },
7433 { /* AArch64_STRSui, ARM64_INS_STR: str $rt, [$rn, $offset] */
7434  0,
7436 },
7437 { /* AArch64_STRWpost, ARM64_INS_STR: str $rt, [$rn], $offset */
7438  0,
7440 },
7441 { /* AArch64_STRWpre, ARM64_INS_STR: str $rt, [$rn, $offset]! */
7442  0,
7444 },
7445 { /* AArch64_STRWroW, ARM64_INS_STR: str $rt, [$rn, $rm, $extend] */
7446  0,
7448 },
7449 { /* AArch64_STRWroX, ARM64_INS_STR: str $rt, [$rn, $rm, $extend] */
7450  0,
7452 },
7453 { /* AArch64_STRWui, ARM64_INS_STR: str $rt, [$rn, $offset] */
7454  0,
7456 },
7457 { /* AArch64_STRXpost, ARM64_INS_STR: str $rt, [$rn], $offset */
7458  0,
7460 },
7461 { /* AArch64_STRXpre, ARM64_INS_STR: str $rt, [$rn, $offset]! */
7462  0,
7464 },
7465 { /* AArch64_STRXroW, ARM64_INS_STR: str $rt, [$rn, $rm, $extend] */
7466  0,
7468 },
7469 { /* AArch64_STRXroX, ARM64_INS_STR: str $rt, [$rn, $rm, $extend] */
7470  0,
7472 },
7473 { /* AArch64_STRXui, ARM64_INS_STR: str $rt, [$rn, $offset] */
7474  0,
7476 },
7477 { /* AArch64_STTRBi, ARM64_INS_STTRB: sttrb $rt, [$rn, $offset] */
7478  0,
7480 },
7481 { /* AArch64_STTRHi, ARM64_INS_STTRH: sttrh $rt, [$rn, $offset] */
7482  0,
7484 },
7485 { /* AArch64_STTRWi, ARM64_INS_STTR: sttr $rt, [$rn, $offset] */
7486  0,
7488 },
7489 { /* AArch64_STTRXi, ARM64_INS_STTR: sttr $rt, [$rn, $offset] */
7490  0,
7492 },
7493 { /* AArch64_STURBBi, ARM64_INS_STURB: sturb $rt, [$rn, $offset] */
7494  0,
7496 },
7497 { /* AArch64_STURBi, ARM64_INS_STUR: stur $rt, [$rn, $offset] */
7498  0,
7500 },
7501 { /* AArch64_STURDi, ARM64_INS_STUR: stur $rt, [$rn, $offset] */
7502  0,
7504 },
7505 { /* AArch64_STURHHi, ARM64_INS_STURH: sturh $rt, [$rn, $offset] */
7506  0,
7508 },
7509 { /* AArch64_STURHi, ARM64_INS_STUR: stur $rt, [$rn, $offset] */
7510  0,
7512 },
7513 { /* AArch64_STURQi, ARM64_INS_STUR: stur $rt, [$rn, $offset] */
7514  0,
7516 },
7517 { /* AArch64_STURSi, ARM64_INS_STUR: stur $rt, [$rn, $offset] */
7518  0,
7520 },
7521 { /* AArch64_STURWi, ARM64_INS_STUR: stur $rt, [$rn, $offset] */
7522  0,
7524 },
7525 { /* AArch64_STURXi, ARM64_INS_STUR: stur $rt, [$rn, $offset] */
7526  0,
7528 },
7529 { /* AArch64_STXPW, ARM64_INS_STXP: stxp $ws, $rt, $rt2, [$rn] */
7530  0,
7532 },
7533 { /* AArch64_STXPX, ARM64_INS_STXP: stxp $ws, $rt, $rt2, [$rn] */
7534  0,
7536 },
7537 { /* AArch64_STXRB, ARM64_INS_STXRB: stxrb $ws, $rt, [$rn] */
7538  0,
7540 },
7541 { /* AArch64_STXRH, ARM64_INS_STXRH: stxrh $ws, $rt, [$rn] */
7542  0,
7544 },
7545 { /* AArch64_STXRW, ARM64_INS_STXR: stxr $ws, $rt, [$rn] */
7546  0,
7548 },
7549 { /* AArch64_STXRX, ARM64_INS_STXR: stxr $ws, $rt, [$rn] */
7550  0,
7552 },
7553 { /* AArch64_SUBHNv2i64_v2i32, ARM64_INS_SUBHN: subhn.2s $rd, $rn, $rm */
7554  0,
7556 },
7557 { /* AArch64_SUBHNv2i64_v4i32, ARM64_INS_SUBHN2: subhn2.4s $rd, $rn, $rm */
7558  0,
7560 },
7561 { /* AArch64_SUBHNv4i32_v4i16, ARM64_INS_SUBHN: subhn.4h $rd, $rn, $rm */
7562  0,
7564 },
7565 { /* AArch64_SUBHNv4i32_v8i16, ARM64_INS_SUBHN2: subhn2.8h $rd, $rn, $rm */
7566  0,
7568 },
7569 { /* AArch64_SUBHNv8i16_v16i8, ARM64_INS_SUBHN2: subhn2.16b $rd, $rn, $rm */
7570  0,
7572 },
7573 { /* AArch64_SUBHNv8i16_v8i8, ARM64_INS_SUBHN: subhn.8b $rd, $rn, $rm */
7574  0,
7576 },
7577 { /* AArch64_SUBSWri, ARM64_INS_SUBS: subs $rd, $rn, $imm */
7578  0,
7580 },
7581 { /* AArch64_SUBSWrs, ARM64_INS_SUBS: subs $rd, $rn, $rm */
7582  0,
7584 },
7585 { /* AArch64_SUBSWrx, ARM64_INS_SUBS: subs $r1, $r2, $r3 */
7586  0,
7588 },
7589 { /* AArch64_SUBSXri, ARM64_INS_SUBS: subs $rd, $rn, $imm */
7590  0,
7592 },
7593 { /* AArch64_SUBSXrs, ARM64_INS_SUBS: subs $rd, $rn, $rm */
7594  0,
7596 },
7597 { /* AArch64_SUBSXrx, ARM64_INS_SUBS: subs $r1, $r2, $r3 */
7598  0,
7600 },
7601 { /* AArch64_SUBSXrx64, ARM64_INS_SUBS: subs $rd, $rn, $rm$ext */
7602  0,
7604 },
7605 { /* AArch64_SUBWri, ARM64_INS_SUB: sub $rd, $rn, $imm */
7606  0,
7608 },
7609 { /* AArch64_SUBWrs, ARM64_INS_SUB: sub $rd, $rn, $rm */
7610  0,
7612 },
7613 { /* AArch64_SUBWrx, ARM64_INS_SUB: sub $r1, $r2, $r3 */
7614  0,
7616 },
7617 { /* AArch64_SUBXri, ARM64_INS_SUB: sub $rd, $rn, $imm */
7618  0,
7620 },
7621 { /* AArch64_SUBXrs, ARM64_INS_SUB: sub $rd, $rn, $rm */
7622  0,
7624 },
7625 { /* AArch64_SUBXrx, ARM64_INS_SUB: sub $r1, $r2, $r3 */
7626  0,
7628 },
7629 { /* AArch64_SUBXrx64, ARM64_INS_SUB: sub $rd, $rn, $rm$ext */
7630  0,
7632 },
7633 { /* AArch64_SUBv16i8, ARM64_INS_SUB: sub.16b $rd, $rn, $rm| */
7634  0,
7636 },
7637 { /* AArch64_SUBv1i64, ARM64_INS_SUB: sub $rd, $rn, $rm */
7638  0,
7640 },
7641 { /* AArch64_SUBv2i32, ARM64_INS_SUB: sub.2s $rd, $rn, $rm| */
7642  0,
7644 },
7645 { /* AArch64_SUBv2i64, ARM64_INS_SUB: sub.2d $rd, $rn, $rm| */
7646  0,
7648 },
7649 { /* AArch64_SUBv4i16, ARM64_INS_SUB: sub.4h $rd, $rn, $rm| */
7650  0,
7652 },
7653 { /* AArch64_SUBv4i32, ARM64_INS_SUB: sub.4s $rd, $rn, $rm| */
7654  0,
7656 },
7657 { /* AArch64_SUBv8i16, ARM64_INS_SUB: sub.8h $rd, $rn, $rm| */
7658  0,
7660 },
7661 { /* AArch64_SUBv8i8, ARM64_INS_SUB: sub.8b $rd, $rn, $rm| */
7662  0,
7664 },
7665 { /* AArch64_SUQADDv16i8, ARM64_INS_SUQADD: suqadd.16b $rd, $rn */
7666  0,
7668 },
7669 { /* AArch64_SUQADDv1i16, ARM64_INS_SUQADD: suqadd $rd, $rn */
7670  0,
7672 },
7673 { /* AArch64_SUQADDv1i32, ARM64_INS_SUQADD: suqadd $rd, $rn */
7674  0,
7676 },
7677 { /* AArch64_SUQADDv1i64, ARM64_INS_SUQADD: suqadd $rd, $rn */
7678  0,
7680 },
7681 { /* AArch64_SUQADDv1i8, ARM64_INS_SUQADD: suqadd $rd, $rn */
7682  0,
7684 },
7685 { /* AArch64_SUQADDv2i32, ARM64_INS_SUQADD: suqadd.2s $rd, $rn */
7686  0,
7688 },
7689 { /* AArch64_SUQADDv2i64, ARM64_INS_SUQADD: suqadd.2d $rd, $rn */
7690  0,
7692 },
7693 { /* AArch64_SUQADDv4i16, ARM64_INS_SUQADD: suqadd.4h $rd, $rn */
7694  0,
7696 },
7697 { /* AArch64_SUQADDv4i32, ARM64_INS_SUQADD: suqadd.4s $rd, $rn */
7698  0,
7700 },
7701 { /* AArch64_SUQADDv8i16, ARM64_INS_SUQADD: suqadd.8h $rd, $rn */
7702  0,
7704 },
7705 { /* AArch64_SUQADDv8i8, ARM64_INS_SUQADD: suqadd.8b $rd, $rn */
7706  0,
7708 },
7709 { /* AArch64_SVC, ARM64_INS_SVC: svc $imm */
7710  0,
7711  { CS_AC_READ, 0 }
7712 },
7713 { /* AArch64_SYSLxt, ARM64_INS_SYSL: sysl $rt, $op1, $cn, $cm, $op2 */
7714  0,
7716 },
7717 { /* AArch64_SYSxt, ARM64_INS_SYS: sys $op1, $cn, $cm, $op2, $rt */
7718  0,
7720 },
7721 { /* AArch64_TBLv16i8Four, ARM64_INS_TBL: tbl $vd.16b, $vn, $vm.16b */
7722  0,
7724 },
7725 { /* AArch64_TBLv16i8One, ARM64_INS_TBL: tbl $vd.16b, $vn, $vm.16b */
7726  0,
7728 },
7729 { /* AArch64_TBLv16i8Three, ARM64_INS_TBL: tbl $vd.16b, $vn, $vm.16b */
7730  0,
7732 },
7733 { /* AArch64_TBLv16i8Two, ARM64_INS_TBL: tbl $vd.16b, $vn, $vm.16b */
7734  0,
7736 },
7737 { /* AArch64_TBLv8i8Four, ARM64_INS_TBL: tbl $vd.8b, $vn, $vm.8b */
7738  0,
7740 },
7741 { /* AArch64_TBLv8i8One, ARM64_INS_TBL: tbl $vd.8b, $vn, $vm.8b */
7742  0,
7744 },
7745 { /* AArch64_TBLv8i8Three, ARM64_INS_TBL: tbl $vd.8b, $vn, $vm.8b */
7746  0,
7748 },
7749 { /* AArch64_TBLv8i8Two, ARM64_INS_TBL: tbl $vd.8b, $vn, $vm.8b */
7750  0,
7752 },
7753 { /* AArch64_TBNZW, ARM64_INS_TBNZ: tbnz $rt, $bit_off, $target */
7754  0,
7756 },
7757 { /* AArch64_TBNZX, ARM64_INS_TBNZ: tbnz $rt, $bit_off, $target */
7758  0,
7760 },
7761 { /* AArch64_TBXv16i8Four, ARM64_INS_TBX: tbx $vd.16b, $vn, $vm.16b */
7762  0,
7764 },
7765 { /* AArch64_TBXv16i8One, ARM64_INS_TBX: tbx $vd.16b, $vn, $vm.16b */
7766  0,
7768 },
7769 { /* AArch64_TBXv16i8Three, ARM64_INS_TBX: tbx $vd.16b, $vn, $vm.16b */
7770  0,
7772 },
7773 { /* AArch64_TBXv16i8Two, ARM64_INS_TBX: tbx $vd.16b, $vn, $vm.16b */
7774  0,
7776 },
7777 { /* AArch64_TBXv8i8Four, ARM64_INS_TBX: tbx $vd.8b, $vn, $vm.8b */
7778  0,
7780 },
7781 { /* AArch64_TBXv8i8One, ARM64_INS_TBX: tbx $vd.8b, $vn, $vm.8b */
7782  0,
7784 },
7785 { /* AArch64_TBXv8i8Three, ARM64_INS_TBX: tbx $vd.8b, $vn, $vm.8b */
7786  0,
7788 },
7789 { /* AArch64_TBXv8i8Two, ARM64_INS_TBX: tbx $vd.8b, $vn, $vm.8b */
7790  0,
7792 },
7793 { /* AArch64_TBZW, ARM64_INS_TBZ: tbz $rt, $bit_off, $target */
7794  0,
7796 },
7797 { /* AArch64_TBZX, ARM64_INS_TBZ: tbz $rt, $bit_off, $target */
7798  0,
7800 },
7801 { /* AArch64_TRN1v16i8, ARM64_INS_TRN1: trn1.16b $rd, $rn, $rm */
7802  0,
7804 },
7805 { /* AArch64_TRN1v2i32, ARM64_INS_TRN1: trn1.2s $rd, $rn, $rm */
7806  0,
7808 },
7809 { /* AArch64_TRN1v2i64, ARM64_INS_TRN1: trn1.2d $rd, $rn, $rm */
7810  0,
7812 },
7813 { /* AArch64_TRN1v4i16, ARM64_INS_TRN1: trn1.4h $rd, $rn, $rm */
7814  0,
7816 },
7817 { /* AArch64_TRN1v4i32, ARM64_INS_TRN1: trn1.4s $rd, $rn, $rm */
7818  0,
7820 },
7821 { /* AArch64_TRN1v8i16, ARM64_INS_TRN1: trn1.8h $rd, $rn, $rm */
7822  0,
7824 },
7825 { /* AArch64_TRN1v8i8, ARM64_INS_TRN1: trn1.8b $rd, $rn, $rm */
7826  0,
7828 },
7829 { /* AArch64_TRN2v16i8, ARM64_INS_TRN2: trn2.16b $rd, $rn, $rm */
7830  0,
7832 },
7833 { /* AArch64_TRN2v2i32, ARM64_INS_TRN2: trn2.2s $rd, $rn, $rm */
7834  0,
7836 },
7837 { /* AArch64_TRN2v2i64, ARM64_INS_TRN2: trn2.2d $rd, $rn, $rm */
7838  0,
7840 },
7841 { /* AArch64_TRN2v4i16, ARM64_INS_TRN2: trn2.4h $rd, $rn, $rm */
7842  0,
7844 },
7845 { /* AArch64_TRN2v4i32, ARM64_INS_TRN2: trn2.4s $rd, $rn, $rm */
7846  0,
7848 },
7849 { /* AArch64_TRN2v8i16, ARM64_INS_TRN2: trn2.8h $rd, $rn, $rm */
7850  0,
7852 },
7853 { /* AArch64_TRN2v8i8, ARM64_INS_TRN2: trn2.8b $rd, $rn, $rm */
7854  0,
7856 },
7857 { /* AArch64_UABALv16i8_v8i16, ARM64_INS_UABAL2: uabal2.8h $rd, $rn, $rm */
7858  0,
7860 },
7861 { /* AArch64_UABALv2i32_v2i64, ARM64_INS_UABAL: uabal.2d $rd, $rn, $rm */
7862  0,
7864 },
7865 { /* AArch64_UABALv4i16_v4i32, ARM64_INS_UABAL: uabal.4s $rd, $rn, $rm */
7866  0,
7868 },
7869 { /* AArch64_UABALv4i32_v2i64, ARM64_INS_UABAL2: uabal2.2d $rd, $rn, $rm */
7870  0,
7872 },
7873 { /* AArch64_UABALv8i16_v4i32, ARM64_INS_UABAL2: uabal2.4s $rd, $rn, $rm */
7874  0,
7876 },
7877 { /* AArch64_UABALv8i8_v8i16, ARM64_INS_UABAL: uabal.8h $rd, $rn, $rm */
7878  0,
7880 },
7881 { /* AArch64_UABAv16i8, ARM64_INS_UABA: uaba.16b $rd, $rn, $rm */
7882  0,
7884 },
7885 { /* AArch64_UABAv2i32, ARM64_INS_UABA: uaba.2s $rd, $rn, $rm */
7886  0,
7888 },
7889 { /* AArch64_UABAv4i16, ARM64_INS_UABA: uaba.4h $rd, $rn, $rm */
7890  0,
7892 },
7893 { /* AArch64_UABAv4i32, ARM64_INS_UABA: uaba.4s $rd, $rn, $rm */
7894  0,
7896 },
7897 { /* AArch64_UABAv8i16, ARM64_INS_UABA: uaba.8h $rd, $rn, $rm */
7898  0,
7900 },
7901 { /* AArch64_UABAv8i8, ARM64_INS_UABA: uaba.8b $rd, $rn, $rm */
7902  0,
7904 },
7905 { /* AArch64_UABDLv16i8_v8i16, ARM64_INS_UABDL2: uabdl2.8h $rd, $rn, $rm */
7906  0,
7908 },
7909 { /* AArch64_UABDLv2i32_v2i64, ARM64_INS_UABDL: uabdl.2d $rd, $rn, $rm */
7910  0,
7912 },
7913 { /* AArch64_UABDLv4i16_v4i32, ARM64_INS_UABDL: uabdl.4s $rd, $rn, $rm */
7914  0,
7916 },
7917 { /* AArch64_UABDLv4i32_v2i64, ARM64_INS_UABDL2: uabdl2.2d $rd, $rn, $rm */
7918  0,
7920 },
7921 { /* AArch64_UABDLv8i16_v4i32, ARM64_INS_UABDL2: uabdl2.4s $rd, $rn, $rm */
7922  0,
7924 },
7925 { /* AArch64_UABDLv8i8_v8i16, ARM64_INS_UABDL: uabdl.8h $rd, $rn, $rm */
7926  0,
7928 },
7929 { /* AArch64_UABDv16i8, ARM64_INS_UABD: uabd.16b $rd, $rn, $rm| */
7930  0,
7932 },
7933 { /* AArch64_UABDv2i32, ARM64_INS_UABD: uabd.2s $rd, $rn, $rm| */
7934  0,
7936 },
7937 { /* AArch64_UABDv4i16, ARM64_INS_UABD: uabd.4h $rd, $rn, $rm| */
7938  0,
7940 },
7941 { /* AArch64_UABDv4i32, ARM64_INS_UABD: uabd.4s $rd, $rn, $rm| */
7942  0,
7944 },
7945 { /* AArch64_UABDv8i16, ARM64_INS_UABD: uabd.8h $rd, $rn, $rm| */
7946  0,
7948 },
7949 { /* AArch64_UABDv8i8, ARM64_INS_UABD: uabd.8b $rd, $rn, $rm| */
7950  0,
7952 },
7953 { /* AArch64_UADALPv16i8_v8i16, ARM64_INS_UADALP: uadalp.8h $rd, $rn */
7954  0,
7956 },
7957 { /* AArch64_UADALPv2i32_v1i64, ARM64_INS_UADALP: uadalp.1d $rd, $rn */
7958  0,
7960 },
7961 { /* AArch64_UADALPv4i16_v2i32, ARM64_INS_UADALP: uadalp.2s $rd, $rn */
7962  0,
7964 },
7965 { /* AArch64_UADALPv4i32_v2i64, ARM64_INS_UADALP: uadalp.2d $rd, $rn */
7966  0,
7968 },
7969 { /* AArch64_UADALPv8i16_v4i32, ARM64_INS_UADALP: uadalp.4s $rd, $rn */
7970  0,
7972 },
7973 { /* AArch64_UADALPv8i8_v4i16, ARM64_INS_UADALP: uadalp.4h $rd, $rn */
7974  0,
7976 },
7977 { /* AArch64_UADDLPv16i8_v8i16, ARM64_INS_UADDLP: uaddlp.8h $rd, $rn */
7978  0,
7980 },
7981 { /* AArch64_UADDLPv2i32_v1i64, ARM64_INS_UADDLP: uaddlp.1d $rd, $rn */
7982  0,
7984 },
7985 { /* AArch64_UADDLPv4i16_v2i32, ARM64_INS_UADDLP: uaddlp.2s $rd, $rn */
7986  0,
7988 },
7989 { /* AArch64_UADDLPv4i32_v2i64, ARM64_INS_UADDLP: uaddlp.2d $rd, $rn */
7990  0,
7992 },
7993 { /* AArch64_UADDLPv8i16_v4i32, ARM64_INS_UADDLP: uaddlp.4s $rd, $rn */
7994  0,
7996 },
7997 { /* AArch64_UADDLPv8i8_v4i16, ARM64_INS_UADDLP: uaddlp.4h $rd, $rn */
7998  0,
8000 },
8001 { /* AArch64_UADDLVv16i8v, ARM64_INS_UADDLV: uaddlv.16b $rd, $rn */
8002  0,
8003  { CS_AC_WRITE, CS_AC_READ, 0 }
8004 },
8005 { /* AArch64_UADDLVv4i16v, ARM64_INS_UADDLV: uaddlv.4h $rd, $rn */
8006  0,
8007  { CS_AC_WRITE, CS_AC_READ, 0 }
8008 },
8009 { /* AArch64_UADDLVv4i32v, ARM64_INS_UADDLV: uaddlv.4s $rd, $rn */
8010  0,
8011  { CS_AC_WRITE, CS_AC_READ, 0 }
8012 },
8013 { /* AArch64_UADDLVv8i16v, ARM64_INS_UADDLV: uaddlv.8h $rd, $rn */
8014  0,
8015  { CS_AC_WRITE, CS_AC_READ, 0 }
8016 },
8017 { /* AArch64_UADDLVv8i8v, ARM64_INS_UADDLV: uaddlv.8b $rd, $rn */
8018  0,
8019  { CS_AC_WRITE, CS_AC_READ, 0 }
8020 },
8021 { /* AArch64_UADDLv16i8_v8i16, ARM64_INS_UADDL2: uaddl2.8h $rd, $rn, $rm */
8022  0,
8024 },
8025 { /* AArch64_UADDLv2i32_v2i64, ARM64_INS_UADDL: uaddl.2d $rd, $rn, $rm */
8026  0,
8028 },
8029 { /* AArch64_UADDLv4i16_v4i32, ARM64_INS_UADDL: uaddl.4s $rd, $rn, $rm */
8030  0,
8032 },
8033 { /* AArch64_UADDLv4i32_v2i64, ARM64_INS_UADDL2: uaddl2.2d $rd, $rn, $rm */
8034  0,
8036 },
8037 { /* AArch64_UADDLv8i16_v4i32, ARM64_INS_UADDL2: uaddl2.4s $rd, $rn, $rm */
8038  0,
8040 },
8041 { /* AArch64_UADDLv8i8_v8i16, ARM64_INS_UADDL: uaddl.8h $rd, $rn, $rm */
8042  0,
8044 },
8045 { /* AArch64_UADDWv16i8_v8i16, ARM64_INS_UADDW2: uaddw2.8h $rd, $rn, $rm */
8046  0,
8048 },
8049 { /* AArch64_UADDWv2i32_v2i64, ARM64_INS_UADDW: uaddw.2d $rd, $rn, $rm */
8050  0,
8052 },
8053 { /* AArch64_UADDWv4i16_v4i32, ARM64_INS_UADDW: uaddw.4s $rd, $rn, $rm */
8054  0,
8056 },
8057 { /* AArch64_UADDWv4i32_v2i64, ARM64_INS_UADDW2: uaddw2.2d $rd, $rn, $rm */
8058  0,
8060 },
8061 { /* AArch64_UADDWv8i16_v4i32, ARM64_INS_UADDW2: uaddw2.4s $rd, $rn, $rm */
8062  0,
8064 },
8065 { /* AArch64_UADDWv8i8_v8i16, ARM64_INS_UADDW: uaddw.8h $rd, $rn, $rm */
8066  0,
8068 },
8069 { /* AArch64_UBFMWri, ARM64_INS_UBFM: ubfm $rd, $rn, $immr, $imms */
8070  0,
8072 },
8073 { /* AArch64_UBFMXri, ARM64_INS_UBFM: ubfm $rd, $rn, $immr, $imms */
8074  0,
8076 },
8077 { /* AArch64_UCVTFSWDri, ARM64_INS_UCVTF: ucvtf $rd, $rn, $scale */
8078  0,
8080 },
8081 { /* AArch64_UCVTFSWSri, ARM64_INS_UCVTF: ucvtf $rd, $rn, $scale */
8082  0,
8084 },
8085 { /* AArch64_UCVTFSXDri, ARM64_INS_UCVTF: ucvtf $rd, $rn, $scale */
8086  0,
8088 },
8089 { /* AArch64_UCVTFSXSri, ARM64_INS_UCVTF: ucvtf $rd, $rn, $scale */
8090  0,
8092 },
8093 { /* AArch64_UCVTFUWDri, ARM64_INS_UCVTF: ucvtf $rd, $rn */
8094  0,
8095  { CS_AC_WRITE, CS_AC_READ, 0 }
8096 },
8097 { /* AArch64_UCVTFUWSri, ARM64_INS_UCVTF: ucvtf $rd, $rn */
8098  0,
8099  { CS_AC_WRITE, CS_AC_READ, 0 }
8100 },
8101 { /* AArch64_UCVTFUXDri, ARM64_INS_UCVTF: ucvtf $rd, $rn */
8102  0,
8103  { CS_AC_WRITE, CS_AC_READ, 0 }
8104 },
8105 { /* AArch64_UCVTFUXSri, ARM64_INS_UCVTF: ucvtf $rd, $rn */
8106  0,
8107  { CS_AC_WRITE, CS_AC_READ, 0 }
8108 },
8109 { /* AArch64_UCVTFd, ARM64_INS_UCVTF: ucvtf $rd, $rn, $imm */
8110  0,
8112 },
8113 { /* AArch64_UCVTFs, ARM64_INS_UCVTF: ucvtf $rd, $rn, $imm */
8114  0,
8116 },
8117 { /* AArch64_UCVTFv1i32, ARM64_INS_UCVTF: ucvtf $rd, $rn */
8118  0,
8119  { CS_AC_WRITE, CS_AC_READ, 0 }
8120 },
8121 { /* AArch64_UCVTFv1i64, ARM64_INS_UCVTF: ucvtf $rd, $rn */
8122  0,
8123  { CS_AC_WRITE, CS_AC_READ, 0 }
8124 },
8125 { /* AArch64_UCVTFv2f32, ARM64_INS_UCVTF: ucvtf.2s $rd, $rn */
8126  0,
8127  { CS_AC_WRITE, CS_AC_READ, 0 }
8128 },
8129 { /* AArch64_UCVTFv2f64, ARM64_INS_UCVTF: ucvtf.2d $rd, $rn */
8130  0,
8131  { CS_AC_WRITE, CS_AC_READ, 0 }
8132 },
8133 { /* AArch64_UCVTFv2i32_shift, ARM64_INS_UCVTF: ucvtf.2s $rd, $rn, $imm */
8134  0,
8136 },
8137 { /* AArch64_UCVTFv2i64_shift, ARM64_INS_UCVTF: ucvtf.2d $rd, $rn, $imm */
8138  0,
8140 },
8141 { /* AArch64_UCVTFv4f32, ARM64_INS_UCVTF: ucvtf.4s $rd, $rn */
8142  0,
8143  { CS_AC_WRITE, CS_AC_READ, 0 }
8144 },
8145 { /* AArch64_UCVTFv4i32_shift, ARM64_INS_UCVTF: ucvtf.4s $rd, $rn, $imm */
8146  0,
8148 },
8149 { /* AArch64_UDIVWr, ARM64_INS_UDIV: udiv $rd, $rn, $rm */
8150  0,
8152 },
8153 { /* AArch64_UDIVXr, ARM64_INS_UDIV: udiv $rd, $rn, $rm */
8154  0,
8156 },
8157 { /* AArch64_UDIV_IntWr, ARM64_INS_UDIV: udiv $rd, $rn, $rm */
8158  0,
8160 },
8161 { /* AArch64_UDIV_IntXr, ARM64_INS_UDIV: udiv $rd, $rn, $rm */
8162  0,
8164 },
8165 { /* AArch64_UHADDv16i8, ARM64_INS_UHADD: uhadd.16b $rd, $rn, $rm| */
8166  0,
8168 },
8169 { /* AArch64_UHADDv2i32, ARM64_INS_UHADD: uhadd.2s $rd, $rn, $rm| */
8170  0,
8172 },
8173 { /* AArch64_UHADDv4i16, ARM64_INS_UHADD: uhadd.4h $rd, $rn, $rm| */
8174  0,
8176 },
8177 { /* AArch64_UHADDv4i32, ARM64_INS_UHADD: uhadd.4s $rd, $rn, $rm| */
8178  0,
8180 },
8181 { /* AArch64_UHADDv8i16, ARM64_INS_UHADD: uhadd.8h $rd, $rn, $rm| */
8182  0,
8184 },
8185 { /* AArch64_UHADDv8i8, ARM64_INS_UHADD: uhadd.8b $rd, $rn, $rm| */
8186  0,
8188 },
8189 { /* AArch64_UHSUBv16i8, ARM64_INS_UHSUB: uhsub.16b $rd, $rn, $rm| */
8190  0,
8192 },
8193 { /* AArch64_UHSUBv2i32, ARM64_INS_UHSUB: uhsub.2s $rd, $rn, $rm| */
8194  0,
8196 },
8197 { /* AArch64_UHSUBv4i16, ARM64_INS_UHSUB: uhsub.4h $rd, $rn, $rm| */
8198  0,
8200 },
8201 { /* AArch64_UHSUBv4i32, ARM64_INS_UHSUB: uhsub.4s $rd, $rn, $rm| */
8202  0,
8204 },
8205 { /* AArch64_UHSUBv8i16, ARM64_INS_UHSUB: uhsub.8h $rd, $rn, $rm| */
8206  0,
8208 },
8209 { /* AArch64_UHSUBv8i8, ARM64_INS_UHSUB: uhsub.8b $rd, $rn, $rm| */
8210  0,
8212 },
8213 { /* AArch64_UMADDLrrr, ARM64_INS_UMADDL: umaddl $rd, $rn, $rm, $ra */
8214  0,
8216 },
8217 { /* AArch64_UMAXPv16i8, ARM64_INS_UMAXP: umaxp.16b $rd, $rn, $rm| */
8218  0,
8220 },
8221 { /* AArch64_UMAXPv2i32, ARM64_INS_UMAXP: umaxp.2s $rd, $rn, $rm| */
8222  0,
8224 },
8225 { /* AArch64_UMAXPv4i16, ARM64_INS_UMAXP: umaxp.4h $rd, $rn, $rm| */
8226  0,
8228 },
8229 { /* AArch64_UMAXPv4i32, ARM64_INS_UMAXP: umaxp.4s $rd, $rn, $rm| */
8230  0,
8232 },
8233 { /* AArch64_UMAXPv8i16, ARM64_INS_UMAXP: umaxp.8h $rd, $rn, $rm| */
8234  0,
8236 },
8237 { /* AArch64_UMAXPv8i8, ARM64_INS_UMAXP: umaxp.8b $rd, $rn, $rm| */
8238  0,
8240 },
8241 { /* AArch64_UMAXVv16i8v, ARM64_INS_UMAXV: umaxv.16b $rd, $rn */
8242  0,
8243  { CS_AC_WRITE, CS_AC_READ, 0 }
8244 },
8245 { /* AArch64_UMAXVv4i16v, ARM64_INS_UMAXV: umaxv.4h $rd, $rn */
8246  0,
8247  { CS_AC_WRITE, CS_AC_READ, 0 }
8248 },
8249 { /* AArch64_UMAXVv4i32v, ARM64_INS_UMAXV: umaxv.4s $rd, $rn */
8250  0,
8251  { CS_AC_WRITE, CS_AC_READ, 0 }
8252 },
8253 { /* AArch64_UMAXVv8i16v, ARM64_INS_UMAXV: umaxv.8h $rd, $rn */
8254  0,
8255  { CS_AC_WRITE, CS_AC_READ, 0 }
8256 },
8257 { /* AArch64_UMAXVv8i8v, ARM64_INS_UMAXV: umaxv.8b $rd, $rn */
8258  0,
8259  { CS_AC_WRITE, CS_AC_READ, 0 }
8260 },
8261 { /* AArch64_UMAXv16i8, ARM64_INS_UMAX: umax.16b $rd, $rn, $rm| */
8262  0,
8264 },
8265 { /* AArch64_UMAXv2i32, ARM64_INS_UMAX: umax.2s $rd, $rn, $rm| */
8266  0,
8268 },
8269 { /* AArch64_UMAXv4i16, ARM64_INS_UMAX: umax.4h $rd, $rn, $rm| */
8270  0,
8272 },
8273 { /* AArch64_UMAXv4i32, ARM64_INS_UMAX: umax.4s $rd, $rn, $rm| */
8274  0,
8276 },
8277 { /* AArch64_UMAXv8i16, ARM64_INS_UMAX: umax.8h $rd, $rn, $rm| */
8278  0,
8280 },
8281 { /* AArch64_UMAXv8i8, ARM64_INS_UMAX: umax.8b $rd, $rn, $rm| */
8282  0,
8284 },
8285 { /* AArch64_UMINPv16i8, ARM64_INS_UMINP: uminp.16b $rd, $rn, $rm| */
8286  0,
8288 },
8289 { /* AArch64_UMINPv2i32, ARM64_INS_UMINP: uminp.2s $rd, $rn, $rm| */
8290  0,
8292 },
8293 { /* AArch64_UMINPv4i16, ARM64_INS_UMINP: uminp.4h $rd, $rn, $rm| */
8294  0,
8296 },
8297 { /* AArch64_UMINPv4i32, ARM64_INS_UMINP: uminp.4s $rd, $rn, $rm| */
8298  0,
8300 },
8301 { /* AArch64_UMINPv8i16, ARM64_INS_UMINP: uminp.8h $rd, $rn, $rm| */
8302  0,
8304 },
8305 { /* AArch64_UMINPv8i8, ARM64_INS_UMINP: uminp.8b $rd, $rn, $rm| */
8306  0,
8308 },
8309 { /* AArch64_UMINVv16i8v, ARM64_INS_UMINV: uminv.16b $rd, $rn */
8310  0,
8311  { CS_AC_WRITE, CS_AC_READ, 0 }
8312 },
8313 { /* AArch64_UMINVv4i16v, ARM64_INS_UMINV: uminv.4h $rd, $rn */
8314  0,
8315  { CS_AC_WRITE, CS_AC_READ, 0 }
8316 },
8317 { /* AArch64_UMINVv4i32v, ARM64_INS_UMINV: uminv.4s $rd, $rn */
8318  0,
8319  { CS_AC_WRITE, CS_AC_READ, 0 }
8320 },
8321 { /* AArch64_UMINVv8i16v, ARM64_INS_UMINV: uminv.8h $rd, $rn */
8322  0,
8323  { CS_AC_WRITE, CS_AC_READ, 0 }
8324 },
8325 { /* AArch64_UMINVv8i8v, ARM64_INS_UMINV: uminv.8b $rd, $rn */
8326  0,
8327  { CS_AC_WRITE, CS_AC_READ, 0 }
8328 },
8329 { /* AArch64_UMINv16i8, ARM64_INS_UMIN: umin.16b $rd, $rn, $rm| */
8330  0,
8332 },
8333 { /* AArch64_UMINv2i32, ARM64_INS_UMIN: umin.2s $rd, $rn, $rm| */
8334  0,
8336 },
8337 { /* AArch64_UMINv4i16, ARM64_INS_UMIN: umin.4h $rd, $rn, $rm| */
8338  0,
8340 },
8341 { /* AArch64_UMINv4i32, ARM64_INS_UMIN: umin.4s $rd, $rn, $rm| */
8342  0,
8344 },
8345 { /* AArch64_UMINv8i16, ARM64_INS_UMIN: umin.8h $rd, $rn, $rm| */
8346  0,
8348 },
8349 { /* AArch64_UMINv8i8, ARM64_INS_UMIN: umin.8b $rd, $rn, $rm| */
8350  0,
8352 },
8353 { /* AArch64_UMLALv16i8_v8i16, ARM64_INS_UMLAL2: umlal2.8h $rd, $rn, $rm */
8354  0,
8356 },
8357 { /* AArch64_UMLALv2i32_indexed, ARM64_INS_UMLAL: umlal.2d $rd, $rn, $rm$idx */
8358  0,
8360 },
8361 { /* AArch64_UMLALv2i32_v2i64, ARM64_INS_UMLAL: umlal.2d $rd, $rn, $rm */
8362  0,
8364 },
8365 { /* AArch64_UMLALv4i16_indexed, ARM64_INS_UMLAL: umlal.4s $rd, $rn, $rm$idx */
8366  0,
8368 },
8369 { /* AArch64_UMLALv4i16_v4i32, ARM64_INS_UMLAL: umlal.4s $rd, $rn, $rm */
8370  0,
8372 },
8373 { /* AArch64_UMLALv4i32_indexed, ARM64_INS_UMLAL2: umlal2.2d $rd, $rn, $rm$idx */
8374  0,
8376 },
8377 { /* AArch64_UMLALv4i32_v2i64, ARM64_INS_UMLAL2: umlal2.2d $rd, $rn, $rm */
8378  0,
8380 },
8381 { /* AArch64_UMLALv8i16_indexed, ARM64_INS_UMLAL2: umlal2.4s $rd, $rn, $rm$idx */
8382  0,
8384 },
8385 { /* AArch64_UMLALv8i16_v4i32, ARM64_INS_UMLAL2: umlal2.4s $rd, $rn, $rm */
8386  0,
8388 },
8389 { /* AArch64_UMLALv8i8_v8i16, ARM64_INS_UMLAL: umlal.8h $rd, $rn, $rm */
8390  0,
8392 },
8393 { /* AArch64_UMLSLv16i8_v8i16, ARM64_INS_UMLSL2: umlsl2.8h $rd, $rn, $rm */
8394  0,
8396 },
8397 { /* AArch64_UMLSLv2i32_indexed, ARM64_INS_UMLSL: umlsl.2d $rd, $rn, $rm$idx */
8398  0,
8400 },
8401 { /* AArch64_UMLSLv2i32_v2i64, ARM64_INS_UMLSL: umlsl.2d $rd, $rn, $rm */
8402  0,
8404 },
8405 { /* AArch64_UMLSLv4i16_indexed, ARM64_INS_UMLSL: umlsl.4s $rd, $rn, $rm$idx */
8406  0,
8408 },
8409 { /* AArch64_UMLSLv4i16_v4i32, ARM64_INS_UMLSL: umlsl.4s $rd, $rn, $rm */
8410  0,
8412 },
8413 { /* AArch64_UMLSLv4i32_indexed, ARM64_INS_UMLSL2: umlsl2.2d $rd, $rn, $rm$idx */
8414  0,
8416 },
8417 { /* AArch64_UMLSLv4i32_v2i64, ARM64_INS_UMLSL2: umlsl2.2d $rd, $rn, $rm */
8418  0,
8420 },
8421 { /* AArch64_UMLSLv8i16_indexed, ARM64_INS_UMLSL2: umlsl2.4s $rd, $rn, $rm$idx */
8422  0,
8424 },
8425 { /* AArch64_UMLSLv8i16_v4i32, ARM64_INS_UMLSL2: umlsl2.4s $rd, $rn, $rm */
8426  0,
8428 },
8429 { /* AArch64_UMLSLv8i8_v8i16, ARM64_INS_UMLSL: umlsl.8h $rd, $rn, $rm */
8430  0,
8432 },
8433 { /* AArch64_UMOVvi16, ARM64_INS_UMOV: umov.h $rd, $rn$idx */
8434  0,
8436 },
8437 { /* AArch64_UMOVvi32, ARM64_INS_UMOV: umov.s $rd, $rn$idx */
8438  0,
8440 },
8441 { /* AArch64_UMOVvi64, ARM64_INS_UMOV: umov.d $rd, $rn$idx */
8442  0,
8444 },
8445 { /* AArch64_UMOVvi8, ARM64_INS_UMOV: umov.b $rd, $rn$idx */
8446  0,
8448 },
8449 { /* AArch64_UMSUBLrrr, ARM64_INS_UMSUBL: umsubl $rd, $rn, $rm, $ra */
8450  0,
8452 },
8453 { /* AArch64_UMULHrr, ARM64_INS_UMULH: umulh $rd, $rn, $rm */
8454  0,
8456 },
8457 { /* AArch64_UMULLv16i8_v8i16, ARM64_INS_UMULL2: umull2.8h $rd, $rn, $rm */
8458  0,
8460 },
8461 { /* AArch64_UMULLv2i32_indexed, ARM64_INS_UMULL: umull.2d $rd, $rn, $rm$idx */
8462  0,
8464 },
8465 { /* AArch64_UMULLv2i32_v2i64, ARM64_INS_UMULL: umull.2d $rd, $rn, $rm */
8466  0,
8468 },
8469 { /* AArch64_UMULLv4i16_indexed, ARM64_INS_UMULL: umull.4s $rd, $rn, $rm$idx */
8470  0,
8472 },
8473 { /* AArch64_UMULLv4i16_v4i32, ARM64_INS_UMULL: umull.4s $rd, $rn, $rm */
8474  0,
8476 },
8477 { /* AArch64_UMULLv4i32_indexed, ARM64_INS_UMULL2: umull2.2d $rd, $rn, $rm$idx */
8478  0,
8480 },
8481 { /* AArch64_UMULLv4i32_v2i64, ARM64_INS_UMULL2: umull2.2d $rd, $rn, $rm */
8482  0,
8484 },
8485 { /* AArch64_UMULLv8i16_indexed, ARM64_INS_UMULL2: umull2.4s $rd, $rn, $rm$idx */
8486  0,
8488 },
8489 { /* AArch64_UMULLv8i16_v4i32, ARM64_INS_UMULL2: umull2.4s $rd, $rn, $rm */
8490  0,
8492 },
8493 { /* AArch64_UMULLv8i8_v8i16, ARM64_INS_UMULL: umull.8h $rd, $rn, $rm */
8494  0,
8496 },
8497 { /* AArch64_UQADDv16i8, ARM64_INS_UQADD: uqadd.16b $rd, $rn, $rm| */
8498  0,
8500 },
8501 { /* AArch64_UQADDv1i16, ARM64_INS_UQADD: uqadd $rd, $rn, $rm */
8502  0,
8504 },
8505 { /* AArch64_UQADDv1i32, ARM64_INS_UQADD: uqadd $rd, $rn, $rm */
8506  0,
8508 },
8509 { /* AArch64_UQADDv1i64, ARM64_INS_UQADD: uqadd $rd, $rn, $rm */
8510  0,
8512 },
8513 { /* AArch64_UQADDv1i8, ARM64_INS_UQADD: uqadd $rd, $rn, $rm */
8514  0,
8516 },
8517 { /* AArch64_UQADDv2i32, ARM64_INS_UQADD: uqadd.2s $rd, $rn, $rm| */
8518  0,
8520 },
8521 { /* AArch64_UQADDv2i64, ARM64_INS_UQADD: uqadd.2d $rd, $rn, $rm| */
8522  0,
8524 },
8525 { /* AArch64_UQADDv4i16, ARM64_INS_UQADD: uqadd.4h $rd, $rn, $rm| */
8526  0,
8528 },
8529 { /* AArch64_UQADDv4i32, ARM64_INS_UQADD: uqadd.4s $rd, $rn, $rm| */
8530  0,
8532 },
8533 { /* AArch64_UQADDv8i16, ARM64_INS_UQADD: uqadd.8h $rd, $rn, $rm| */
8534  0,
8536 },
8537 { /* AArch64_UQADDv8i8, ARM64_INS_UQADD: uqadd.8b $rd, $rn, $rm| */
8538  0,
8540 },
8541 { /* AArch64_UQRSHLv16i8, ARM64_INS_UQRSHL: uqrshl.16b $rd, $rn, $rm| */
8542  0,
8544 },
8545 { /* AArch64_UQRSHLv1i16, ARM64_INS_UQRSHL: uqrshl $rd, $rn, $rm */
8546  0,
8548 },
8549 { /* AArch64_UQRSHLv1i32, ARM64_INS_UQRSHL: uqrshl $rd, $rn, $rm */
8550  0,
8552 },
8553 { /* AArch64_UQRSHLv1i64, ARM64_INS_UQRSHL: uqrshl $rd, $rn, $rm */
8554  0,
8556 },
8557 { /* AArch64_UQRSHLv1i8, ARM64_INS_UQRSHL: uqrshl $rd, $rn, $rm */
8558  0,
8560 },
8561 { /* AArch64_UQRSHLv2i32, ARM64_INS_UQRSHL: uqrshl.2s $rd, $rn, $rm| */
8562  0,
8564 },
8565 { /* AArch64_UQRSHLv2i64, ARM64_INS_UQRSHL: uqrshl.2d $rd, $rn, $rm| */
8566  0,
8568 },
8569 { /* AArch64_UQRSHLv4i16, ARM64_INS_UQRSHL: uqrshl.4h $rd, $rn, $rm| */
8570  0,
8572 },
8573 { /* AArch64_UQRSHLv4i32, ARM64_INS_UQRSHL: uqrshl.4s $rd, $rn, $rm| */
8574  0,
8576 },
8577 { /* AArch64_UQRSHLv8i16, ARM64_INS_UQRSHL: uqrshl.8h $rd, $rn, $rm| */
8578  0,
8580 },
8581 { /* AArch64_UQRSHLv8i8, ARM64_INS_UQRSHL: uqrshl.8b $rd, $rn, $rm| */
8582  0,
8584 },
8585 { /* AArch64_UQRSHRNb, ARM64_INS_UQRSHRN: uqrshrn $rd, $rn, $imm */
8586  0,
8588 },
8589 { /* AArch64_UQRSHRNh, ARM64_INS_UQRSHRN: uqrshrn $rd, $rn, $imm */
8590  0,
8592 },
8593 { /* AArch64_UQRSHRNs, ARM64_INS_UQRSHRN: uqrshrn $rd, $rn, $imm */
8594  0,
8596 },
8597 { /* AArch64_UQRSHRNv16i8_shift, ARM64_INS_UQRSHRN2: uqrshrn2.16b $rd, $rn, $imm */
8598  0,
8600 },
8601 { /* AArch64_UQRSHRNv2i32_shift, ARM64_INS_UQRSHRN: uqrshrn.2s $rd, $rn, $imm */
8602  0,
8604 },
8605 { /* AArch64_UQRSHRNv4i16_shift, ARM64_INS_UQRSHRN: uqrshrn.4h $rd, $rn, $imm */
8606  0,
8608 },
8609 { /* AArch64_UQRSHRNv4i32_shift, ARM64_INS_UQRSHRN2: uqrshrn2.4s $rd, $rn, $imm */
8610  0,
8612 },
8613 { /* AArch64_UQRSHRNv8i16_shift, ARM64_INS_UQRSHRN2: uqrshrn2.8h $rd, $rn, $imm */
8614  0,
8616 },
8617 { /* AArch64_UQRSHRNv8i8_shift, ARM64_INS_UQRSHRN: uqrshrn.8b $rd, $rn, $imm */
8618  0,
8620 },
8621 { /* AArch64_UQSHLb, ARM64_INS_UQSHL: uqshl $rd, $rn, $imm */
8622  0,
8624 },
8625 { /* AArch64_UQSHLd, ARM64_INS_UQSHL: uqshl $rd, $rn, $imm */
8626  0,
8628 },
8629 { /* AArch64_UQSHLh, ARM64_INS_UQSHL: uqshl $rd, $rn, $imm */
8630  0,
8632 },
8633 { /* AArch64_UQSHLs, ARM64_INS_UQSHL: uqshl $rd, $rn, $imm */
8634  0,
8636 },
8637 { /* AArch64_UQSHLv16i8, ARM64_INS_UQSHL: uqshl.16b $rd, $rn, $rm| */
8638  0,
8640 },
8641 { /* AArch64_UQSHLv16i8_shift, ARM64_INS_UQSHL: uqshl.16b $rd, $rn, $imm */
8642  0,
8644 },
8645 { /* AArch64_UQSHLv1i16, ARM64_INS_UQSHL: uqshl $rd, $rn, $rm */
8646  0,
8648 },
8649 { /* AArch64_UQSHLv1i32, ARM64_INS_UQSHL: uqshl $rd, $rn, $rm */
8650  0,
8652 },
8653 { /* AArch64_UQSHLv1i64, ARM64_INS_UQSHL: uqshl $rd, $rn, $rm */
8654  0,
8656 },
8657 { /* AArch64_UQSHLv1i8, ARM64_INS_UQSHL: uqshl $rd, $rn, $rm */
8658  0,
8660 },
8661 { /* AArch64_UQSHLv2i32, ARM64_INS_UQSHL: uqshl.2s $rd, $rn, $rm| */
8662  0,
8664 },
8665 { /* AArch64_UQSHLv2i32_shift, ARM64_INS_UQSHL: uqshl.2s $rd, $rn, $imm */
8666  0,
8668 },
8669 { /* AArch64_UQSHLv2i64, ARM64_INS_UQSHL: uqshl.2d $rd, $rn, $rm| */
8670  0,
8672 },
8673 { /* AArch64_UQSHLv2i64_shift, ARM64_INS_UQSHL: uqshl.2d $rd, $rn, $imm */
8674  0,
8676 },
8677 { /* AArch64_UQSHLv4i16, ARM64_INS_UQSHL: uqshl.4h $rd, $rn, $rm| */
8678  0,
8680 },
8681 { /* AArch64_UQSHLv4i16_shift, ARM64_INS_UQSHL: uqshl.4h $rd, $rn, $imm */
8682  0,
8684 },
8685 { /* AArch64_UQSHLv4i32, ARM64_INS_UQSHL: uqshl.4s $rd, $rn, $rm| */
8686  0,
8688 },
8689 { /* AArch64_UQSHLv4i32_shift, ARM64_INS_UQSHL: uqshl.4s $rd, $rn, $imm */
8690  0,
8692 },
8693 { /* AArch64_UQSHLv8i16, ARM64_INS_UQSHL: uqshl.8h $rd, $rn, $rm| */
8694  0,
8696 },
8697 { /* AArch64_UQSHLv8i16_shift, ARM64_INS_UQSHL: uqshl.8h $rd, $rn, $imm */
8698  0,
8700 },
8701 { /* AArch64_UQSHLv8i8, ARM64_INS_UQSHL: uqshl.8b $rd, $rn, $rm| */
8702  0,
8704 },
8705 { /* AArch64_UQSHLv8i8_shift, ARM64_INS_UQSHL: uqshl.8b $rd, $rn, $imm */
8706  0,
8708 },
8709 { /* AArch64_UQSHRNb, ARM64_INS_UQSHRN: uqshrn $rd, $rn, $imm */
8710  0,
8712 },
8713 { /* AArch64_UQSHRNh, ARM64_INS_UQSHRN: uqshrn $rd, $rn, $imm */
8714  0,
8716 },
8717 { /* AArch64_UQSHRNs, ARM64_INS_UQSHRN: uqshrn $rd, $rn, $imm */
8718  0,
8720 },
8721 { /* AArch64_UQSHRNv16i8_shift, ARM64_INS_UQSHRN2: uqshrn2.16b $rd, $rn, $imm */
8722  0,
8724 },
8725 { /* AArch64_UQSHRNv2i32_shift, ARM64_INS_UQSHRN: uqshrn.2s $rd, $rn, $imm */
8726  0,
8728 },
8729 { /* AArch64_UQSHRNv4i16_shift, ARM64_INS_UQSHRN: uqshrn.4h $rd, $rn, $imm */
8730  0,
8732 },
8733 { /* AArch64_UQSHRNv4i32_shift, ARM64_INS_UQSHRN2: uqshrn2.4s $rd, $rn, $imm */
8734  0,
8736 },
8737 { /* AArch64_UQSHRNv8i16_shift, ARM64_INS_UQSHRN2: uqshrn2.8h $rd, $rn, $imm */
8738  0,
8740 },
8741 { /* AArch64_UQSHRNv8i8_shift, ARM64_INS_UQSHRN: uqshrn.8b $rd, $rn, $imm */
8742  0,
8744 },
8745 { /* AArch64_UQSUBv16i8, ARM64_INS_UQSUB: uqsub.16b $rd, $rn, $rm| */
8746  0,
8748 },
8749 { /* AArch64_UQSUBv1i16, ARM64_INS_UQSUB: uqsub $rd, $rn, $rm */
8750  0,
8752 },
8753 { /* AArch64_UQSUBv1i32, ARM64_INS_UQSUB: uqsub $rd, $rn, $rm */
8754  0,
8756 },
8757 { /* AArch64_UQSUBv1i64, ARM64_INS_UQSUB: uqsub $rd, $rn, $rm */
8758  0,
8760 },
8761 { /* AArch64_UQSUBv1i8, ARM64_INS_UQSUB: uqsub $rd, $rn, $rm */
8762  0,
8764 },
8765 { /* AArch64_UQSUBv2i32, ARM64_INS_UQSUB: uqsub.2s $rd, $rn, $rm| */
8766  0,
8768 },
8769 { /* AArch64_UQSUBv2i64, ARM64_INS_UQSUB: uqsub.2d $rd, $rn, $rm| */
8770  0,
8772 },
8773 { /* AArch64_UQSUBv4i16, ARM64_INS_UQSUB: uqsub.4h $rd, $rn, $rm| */
8774  0,
8776 },
8777 { /* AArch64_UQSUBv4i32, ARM64_INS_UQSUB: uqsub.4s $rd, $rn, $rm| */
8778  0,
8780 },
8781 { /* AArch64_UQSUBv8i16, ARM64_INS_UQSUB: uqsub.8h $rd, $rn, $rm| */
8782  0,
8784 },
8785 { /* AArch64_UQSUBv8i8, ARM64_INS_UQSUB: uqsub.8b $rd, $rn, $rm| */
8786  0,
8788 },
8789 { /* AArch64_UQXTNv16i8, ARM64_INS_UQXTN2: uqxtn2.16b $rd, $rn */
8790  0,
8791  { CS_AC_WRITE, CS_AC_READ, 0 }
8792 },
8793 { /* AArch64_UQXTNv1i16, ARM64_INS_UQXTN: uqxtn $rd, $rn */
8794  0,
8795  { CS_AC_WRITE, CS_AC_READ, 0 }
8796 },
8797 { /* AArch64_UQXTNv1i32, ARM64_INS_UQXTN: uqxtn $rd, $rn */
8798  0,
8799  { CS_AC_WRITE, CS_AC_READ, 0 }
8800 },
8801 { /* AArch64_UQXTNv1i8, ARM64_INS_UQXTN: uqxtn $rd, $rn */
8802  0,
8803  { CS_AC_WRITE, CS_AC_READ, 0 }
8804 },
8805 { /* AArch64_UQXTNv2i32, ARM64_INS_UQXTN: uqxtn.2s $rd, $rn */
8806  0,
8807  { CS_AC_WRITE, CS_AC_READ, 0 }
8808 },
8809 { /* AArch64_UQXTNv4i16, ARM64_INS_UQXTN: uqxtn.4h $rd, $rn */
8810  0,
8811  { CS_AC_WRITE, CS_AC_READ, 0 }
8812 },
8813 { /* AArch64_UQXTNv4i32, ARM64_INS_UQXTN2: uqxtn2.4s $rd, $rn */
8814  0,
8815  { CS_AC_WRITE, CS_AC_READ, 0 }
8816 },
8817 { /* AArch64_UQXTNv8i16, ARM64_INS_UQXTN2: uqxtn2.8h $rd, $rn */
8818  0,
8819  { CS_AC_WRITE, CS_AC_READ, 0 }
8820 },
8821 { /* AArch64_UQXTNv8i8, ARM64_INS_UQXTN: uqxtn.8b $rd, $rn */
8822  0,
8823  { CS_AC_WRITE, CS_AC_READ, 0 }
8824 },
8825 { /* AArch64_URECPEv2i32, ARM64_INS_URECPE: urecpe.2s $rd, $rn */
8826  0,
8827  { CS_AC_WRITE, CS_AC_READ, 0 }
8828 },
8829 { /* AArch64_URECPEv4i32, ARM64_INS_URECPE: urecpe.4s $rd, $rn */
8830  0,
8831  { CS_AC_WRITE, CS_AC_READ, 0 }
8832 },
8833 { /* AArch64_URHADDv16i8, ARM64_INS_URHADD: urhadd.16b $rd, $rn, $rm| */
8834  0,
8836 },
8837 { /* AArch64_URHADDv2i32, ARM64_INS_URHADD: urhadd.2s $rd, $rn, $rm| */
8838  0,
8840 },
8841 { /* AArch64_URHADDv4i16, ARM64_INS_URHADD: urhadd.4h $rd, $rn, $rm| */
8842  0,
8844 },
8845 { /* AArch64_URHADDv4i32, ARM64_INS_URHADD: urhadd.4s $rd, $rn, $rm| */
8846  0,
8848 },
8849 { /* AArch64_URHADDv8i16, ARM64_INS_URHADD: urhadd.8h $rd, $rn, $rm| */
8850  0,
8852 },
8853 { /* AArch64_URHADDv8i8, ARM64_INS_URHADD: urhadd.8b $rd, $rn, $rm| */
8854  0,
8856 },
8857 { /* AArch64_URSHLv16i8, ARM64_INS_URSHL: urshl.16b $rd, $rn, $rm| */
8858  0,
8860 },
8861 { /* AArch64_URSHLv1i64, ARM64_INS_URSHL: urshl $rd, $rn, $rm */
8862  0,
8864 },
8865 { /* AArch64_URSHLv2i32, ARM64_INS_URSHL: urshl.2s $rd, $rn, $rm| */
8866  0,
8868 },
8869 { /* AArch64_URSHLv2i64, ARM64_INS_URSHL: urshl.2d $rd, $rn, $rm| */
8870  0,
8872 },
8873 { /* AArch64_URSHLv4i16, ARM64_INS_URSHL: urshl.4h $rd, $rn, $rm| */
8874  0,
8876 },
8877 { /* AArch64_URSHLv4i32, ARM64_INS_URSHL: urshl.4s $rd, $rn, $rm| */
8878  0,
8880 },
8881 { /* AArch64_URSHLv8i16, ARM64_INS_URSHL: urshl.8h $rd, $rn, $rm| */
8882  0,
8884 },
8885 { /* AArch64_URSHLv8i8, ARM64_INS_URSHL: urshl.8b $rd, $rn, $rm| */
8886  0,
8888 },
8889 { /* AArch64_URSHRd, ARM64_INS_URSHR: urshr $rd, $rn, $imm */
8890  0,
8892 },
8893 { /* AArch64_URSHRv16i8_shift, ARM64_INS_URSHR: urshr.16b $rd, $rn, $imm */
8894  0,
8896 },
8897 { /* AArch64_URSHRv2i32_shift, ARM64_INS_URSHR: urshr.2s $rd, $rn, $imm */
8898  0,
8900 },
8901 { /* AArch64_URSHRv2i64_shift, ARM64_INS_URSHR: urshr.2d $rd, $rn, $imm */
8902  0,
8904 },
8905 { /* AArch64_URSHRv4i16_shift, ARM64_INS_URSHR: urshr.4h $rd, $rn, $imm */
8906  0,
8908 },
8909 { /* AArch64_URSHRv4i32_shift, ARM64_INS_URSHR: urshr.4s $rd, $rn, $imm */
8910  0,
8912 },
8913 { /* AArch64_URSHRv8i16_shift, ARM64_INS_URSHR: urshr.8h $rd, $rn, $imm */
8914  0,
8916 },
8917 { /* AArch64_URSHRv8i8_shift, ARM64_INS_URSHR: urshr.8b $rd, $rn, $imm */
8918  0,
8920 },
8921 { /* AArch64_URSQRTEv2i32, ARM64_INS_URSQRTE: ursqrte.2s $rd, $rn */
8922  0,
8923  { CS_AC_WRITE, CS_AC_READ, 0 }
8924 },
8925 { /* AArch64_URSQRTEv4i32, ARM64_INS_URSQRTE: ursqrte.4s $rd, $rn */
8926  0,
8927  { CS_AC_WRITE, CS_AC_READ, 0 }
8928 },
8929 { /* AArch64_URSRAd, ARM64_INS_URSRA: ursra $rd, $rn, $imm */
8930  0,
8932 },
8933 { /* AArch64_URSRAv16i8_shift, ARM64_INS_URSRA: ursra.16b $rd, $rn, $imm */
8934  0,
8936 },
8937 { /* AArch64_URSRAv2i32_shift, ARM64_INS_URSRA: ursra.2s $rd, $rn, $imm */
8938  0,
8940 },
8941 { /* AArch64_URSRAv2i64_shift, ARM64_INS_URSRA: ursra.2d $rd, $rn, $imm */
8942  0,
8944 },
8945 { /* AArch64_URSRAv4i16_shift, ARM64_INS_URSRA: ursra.4h $rd, $rn, $imm */
8946  0,
8948 },
8949 { /* AArch64_URSRAv4i32_shift, ARM64_INS_URSRA: ursra.4s $rd, $rn, $imm */
8950  0,
8952 },
8953 { /* AArch64_URSRAv8i16_shift, ARM64_INS_URSRA: ursra.8h $rd, $rn, $imm */
8954  0,
8956 },
8957 { /* AArch64_URSRAv8i8_shift, ARM64_INS_URSRA: ursra.8b $rd, $rn, $imm */
8958  0,
8960 },
8961 { /* AArch64_USHLLv16i8_shift, ARM64_INS_USHLL2: ushll2.8h $rd, $rn, $imm */
8962  0,
8964 },
8965 { /* AArch64_USHLLv2i32_shift, ARM64_INS_USHLL: ushll.2d $rd, $rn, $imm */
8966  0,
8968 },
8969 { /* AArch64_USHLLv4i16_shift, ARM64_INS_USHLL: ushll.4s $rd, $rn, $imm */
8970  0,
8972 },
8973 { /* AArch64_USHLLv4i32_shift, ARM64_INS_USHLL2: ushll2.2d $rd, $rn, $imm */
8974  0,
8976 },
8977 { /* AArch64_USHLLv8i16_shift, ARM64_INS_USHLL2: ushll2.4s $rd, $rn, $imm */
8978  0,
8980 },
8981 { /* AArch64_USHLLv8i8_shift, ARM64_INS_USHLL: ushll.8h $rd, $rn, $imm */
8982  0,
8984 },
8985 { /* AArch64_USHLv16i8, ARM64_INS_USHL: ushl.16b $rd, $rn, $rm| */
8986  0,
8988 },
8989 { /* AArch64_USHLv1i64, ARM64_INS_USHL: ushl $rd, $rn, $rm */
8990  0,
8992 },
8993 { /* AArch64_USHLv2i32, ARM64_INS_USHL: ushl.2s $rd, $rn, $rm| */
8994  0,
8996 },
8997 { /* AArch64_USHLv2i64, ARM64_INS_USHL: ushl.2d $rd, $rn, $rm| */
8998  0,
9000 },
9001 { /* AArch64_USHLv4i16, ARM64_INS_USHL: ushl.4h $rd, $rn, $rm| */
9002  0,
9004 },
9005 { /* AArch64_USHLv4i32, ARM64_INS_USHL: ushl.4s $rd, $rn, $rm| */
9006  0,
9008 },
9009 { /* AArch64_USHLv8i16, ARM64_INS_USHL: ushl.8h $rd, $rn, $rm| */
9010  0,
9012 },
9013 { /* AArch64_USHLv8i8, ARM64_INS_USHL: ushl.8b $rd, $rn, $rm| */
9014  0,
9016 },
9017 { /* AArch64_USHRd, ARM64_INS_USHR: ushr $rd, $rn, $imm */
9018  0,
9020 },
9021 { /* AArch64_USHRv16i8_shift, ARM64_INS_USHR: ushr.16b $rd, $rn, $imm */
9022  0,
9024 },
9025 { /* AArch64_USHRv2i32_shift, ARM64_INS_USHR: ushr.2s $rd, $rn, $imm */
9026  0,
9028 },
9029 { /* AArch64_USHRv2i64_shift, ARM64_INS_USHR: ushr.2d $rd, $rn, $imm */
9030  0,
9032 },
9033 { /* AArch64_USHRv4i16_shift, ARM64_INS_USHR: ushr.4h $rd, $rn, $imm */
9034  0,
9036 },
9037 { /* AArch64_USHRv4i32_shift, ARM64_INS_USHR: ushr.4s $rd, $rn, $imm */
9038  0,
9040 },
9041 { /* AArch64_USHRv8i16_shift, ARM64_INS_USHR: ushr.8h $rd, $rn, $imm */
9042  0,
9044 },
9045 { /* AArch64_USHRv8i8_shift, ARM64_INS_USHR: ushr.8b $rd, $rn, $imm */
9046  0,
9048 },
9049 { /* AArch64_USQADDv16i8, ARM64_INS_USQADD: usqadd.16b $rd, $rn */
9050  0,
9052 },
9053 { /* AArch64_USQADDv1i16, ARM64_INS_USQADD: usqadd $rd, $rn */
9054  0,
9056 },
9057 { /* AArch64_USQADDv1i32, ARM64_INS_USQADD: usqadd $rd, $rn */
9058  0,
9060 },
9061 { /* AArch64_USQADDv1i64, ARM64_INS_USQADD: usqadd $rd, $rn */
9062  0,
9064 },
9065 { /* AArch64_USQADDv1i8, ARM64_INS_USQADD: usqadd $rd, $rn */
9066  0,
9068 },
9069 { /* AArch64_USQADDv2i32, ARM64_INS_USQADD: usqadd.2s $rd, $rn */
9070  0,
9072 },
9073 { /* AArch64_USQADDv2i64, ARM64_INS_USQADD: usqadd.2d $rd, $rn */
9074  0,
9076 },
9077 { /* AArch64_USQADDv4i16, ARM64_INS_USQADD: usqadd.4h $rd, $rn */
9078  0,
9080 },
9081 { /* AArch64_USQADDv4i32, ARM64_INS_USQADD: usqadd.4s $rd, $rn */
9082  0,
9084 },
9085 { /* AArch64_USQADDv8i16, ARM64_INS_USQADD: usqadd.8h $rd, $rn */
9086  0,
9088 },
9089 { /* AArch64_USQADDv8i8, ARM64_INS_USQADD: usqadd.8b $rd, $rn */
9090  0,
9092 },
9093 { /* AArch64_USRAd, ARM64_INS_USRA: usra $rd, $rn, $imm */
9094  0,
9096 },
9097 { /* AArch64_USRAv16i8_shift, ARM64_INS_USRA: usra.16b $rd, $rn, $imm */
9098  0,
9100 },
9101 { /* AArch64_USRAv2i32_shift, ARM64_INS_USRA: usra.2s $rd, $rn, $imm */
9102  0,
9104 },
9105 { /* AArch64_USRAv2i64_shift, ARM64_INS_USRA: usra.2d $rd, $rn, $imm */
9106  0,
9108 },
9109 { /* AArch64_USRAv4i16_shift, ARM64_INS_USRA: usra.4h $rd, $rn, $imm */
9110  0,
9112 },
9113 { /* AArch64_USRAv4i32_shift, ARM64_INS_USRA: usra.4s $rd, $rn, $imm */
9114  0,
9116 },
9117 { /* AArch64_USRAv8i16_shift, ARM64_INS_USRA: usra.8h $rd, $rn, $imm */
9118  0,
9120 },
9121 { /* AArch64_USRAv8i8_shift, ARM64_INS_USRA: usra.8b $rd, $rn, $imm */
9122  0,
9124 },
9125 { /* AArch64_USUBLv16i8_v8i16, ARM64_INS_USUBL2: usubl2.8h $rd, $rn, $rm */
9126  0,
9128 },
9129 { /* AArch64_USUBLv2i32_v2i64, ARM64_INS_USUBL: usubl.2d $rd, $rn, $rm */
9130  0,
9132 },
9133 { /* AArch64_USUBLv4i16_v4i32, ARM64_INS_USUBL: usubl.4s $rd, $rn, $rm */
9134  0,
9136 },
9137 { /* AArch64_USUBLv4i32_v2i64, ARM64_INS_USUBL2: usubl2.2d $rd, $rn, $rm */
9138  0,
9140 },
9141 { /* AArch64_USUBLv8i16_v4i32, ARM64_INS_USUBL2: usubl2.4s $rd, $rn, $rm */
9142  0,
9144 },
9145 { /* AArch64_USUBLv8i8_v8i16, ARM64_INS_USUBL: usubl.8h $rd, $rn, $rm */
9146  0,
9148 },
9149 { /* AArch64_USUBWv16i8_v8i16, ARM64_INS_USUBW2: usubw2.8h $rd, $rn, $rm */
9150  0,
9152 },
9153 { /* AArch64_USUBWv2i32_v2i64, ARM64_INS_USUBW: usubw.2d $rd, $rn, $rm */
9154  0,
9156 },
9157 { /* AArch64_USUBWv4i16_v4i32, ARM64_INS_USUBW: usubw.4s $rd, $rn, $rm */
9158  0,
9160 },
9161 { /* AArch64_USUBWv4i32_v2i64, ARM64_INS_USUBW2: usubw2.2d $rd, $rn, $rm */
9162  0,
9164 },
9165 { /* AArch64_USUBWv8i16_v4i32, ARM64_INS_USUBW2: usubw2.4s $rd, $rn, $rm */
9166  0,
9168 },
9169 { /* AArch64_USUBWv8i8_v8i16, ARM64_INS_USUBW: usubw.8h $rd, $rn, $rm */
9170  0,
9172 },
9173 { /* AArch64_UZP1v16i8, ARM64_INS_UZP1: uzp1.16b $rd, $rn, $rm */
9174  0,
9176 },
9177 { /* AArch64_UZP1v2i32, ARM64_INS_UZP1: uzp1.2s $rd, $rn, $rm */
9178  0,
9180 },
9181 { /* AArch64_UZP1v2i64, ARM64_INS_UZP1: uzp1.2d $rd, $rn, $rm */
9182  0,
9184 },
9185 { /* AArch64_UZP1v4i16, ARM64_INS_UZP1: uzp1.4h $rd, $rn, $rm */
9186  0,
9188 },
9189 { /* AArch64_UZP1v4i32, ARM64_INS_UZP1: uzp1.4s $rd, $rn, $rm */
9190  0,
9192 },
9193 { /* AArch64_UZP1v8i16, ARM64_INS_UZP1: uzp1.8h $rd, $rn, $rm */
9194  0,
9196 },
9197 { /* AArch64_UZP1v8i8, ARM64_INS_UZP1: uzp1.8b $rd, $rn, $rm */
9198  0,
9200 },
9201 { /* AArch64_UZP2v16i8, ARM64_INS_UZP2: uzp2.16b $rd, $rn, $rm */
9202  0,
9204 },
9205 { /* AArch64_UZP2v2i32, ARM64_INS_UZP2: uzp2.2s $rd, $rn, $rm */
9206  0,
9208 },
9209 { /* AArch64_UZP2v2i64, ARM64_INS_UZP2: uzp2.2d $rd, $rn, $rm */
9210  0,
9212 },
9213 { /* AArch64_UZP2v4i16, ARM64_INS_UZP2: uzp2.4h $rd, $rn, $rm */
9214  0,
9216 },
9217 { /* AArch64_UZP2v4i32, ARM64_INS_UZP2: uzp2.4s $rd, $rn, $rm */
9218  0,
9220 },
9221 { /* AArch64_UZP2v8i16, ARM64_INS_UZP2: uzp2.8h $rd, $rn, $rm */
9222  0,
9224 },
9225 { /* AArch64_UZP2v8i8, ARM64_INS_UZP2: uzp2.8b $rd, $rn, $rm */
9226  0,
9228 },
9229 { /* AArch64_XTNv16i8, ARM64_INS_XTN2: xtn2.16b $rd, $rn */
9230  0,
9231  { CS_AC_WRITE, CS_AC_READ, 0 }
9232 },
9233 { /* AArch64_XTNv2i32, ARM64_INS_XTN: xtn.2s $rd, $rn */
9234  0,
9235  { CS_AC_WRITE, CS_AC_READ, 0 }
9236 },
9237 { /* AArch64_XTNv4i16, ARM64_INS_XTN: xtn.4h $rd, $rn */
9238  0,
9239  { CS_AC_WRITE, CS_AC_READ, 0 }
9240 },
9241 { /* AArch64_XTNv4i32, ARM64_INS_XTN2: xtn2.4s $rd, $rn */
9242  0,
9243  { CS_AC_WRITE, CS_AC_READ, 0 }
9244 },
9245 { /* AArch64_XTNv8i16, ARM64_INS_XTN2: xtn2.8h $rd, $rn */
9246  0,
9247  { CS_AC_WRITE, CS_AC_READ, 0 }
9248 },
9249 { /* AArch64_XTNv8i8, ARM64_INS_XTN: xtn.8b $rd, $rn */
9250  0,
9251  { CS_AC_WRITE, CS_AC_READ, 0 }
9252 },
9253 { /* AArch64_ZIP1v16i8, ARM64_INS_ZIP1: zip1.16b $rd, $rn, $rm */
9254  0,
9256 },
9257 { /* AArch64_ZIP1v2i32, ARM64_INS_ZIP1: zip1.2s $rd, $rn, $rm */
9258  0,
9260 },
9261 { /* AArch64_ZIP1v2i64, ARM64_INS_ZIP1: zip1.2d $rd, $rn, $rm */
9262  0,
9264 },
9265 { /* AArch64_ZIP1v4i16, ARM64_INS_ZIP1: zip1.4h $rd, $rn, $rm */
9266  0,
9268 },
9269 { /* AArch64_ZIP1v4i32, ARM64_INS_ZIP1: zip1.4s $rd, $rn, $rm */
9270  0,
9272 },
9273 { /* AArch64_ZIP1v8i16, ARM64_INS_ZIP1: zip1.8h $rd, $rn, $rm */
9274  0,
9276 },
9277 { /* AArch64_ZIP1v8i8, ARM64_INS_ZIP1: zip1.8b $rd, $rn, $rm */
9278  0,
9280 },
9281 { /* AArch64_ZIP2v16i8, ARM64_INS_ZIP2: zip2.16b $rd, $rn, $rm */
9282  0,
9284 },
9285 { /* AArch64_ZIP2v2i32, ARM64_INS_ZIP2: zip2.2s $rd, $rn, $rm */
9286  0,
9288 },
9289 { /* AArch64_ZIP2v2i64, ARM64_INS_ZIP2: zip2.2d $rd, $rn, $rm */
9290  0,
9292 },
9293 { /* AArch64_ZIP2v4i16, ARM64_INS_ZIP2: zip2.4h $rd, $rn, $rm */
9294  0,
9296 },
9297 { /* AArch64_ZIP2v4i32, ARM64_INS_ZIP2: zip2.4s $rd, $rn, $rm */
9298  0,
9300 },
9301 { /* AArch64_ZIP2v8i16, ARM64_INS_ZIP2: zip2.8h $rd, $rn, $rm */
9302  0,
9304 },
9305 { /* AArch64_ZIP2v8i8, ARM64_INS_ZIP2: zip2.8b $rd, $rn, $rm */
9306  0,
9308 }
@ CS_AC_READ
Operand read from memory or register.
Definition: capstone.h:204
@ CS_AC_WRITE
Operand write to memory or register.
Definition: capstone.h:205