2410 static const uint32_t OpInfo2[] = {
4804 #ifndef CAPSTONE_DIET
4805 static const char AsmStrs[] = {
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4821 's',
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4822 's',
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4823 'u',
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4824 's',
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4825 'u',
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4839 'f',
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4841 'r',
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4842 's',
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4843 'u',
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4844 's',
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4845 'u',
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4846 't',
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4847 'f',
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4851 's',
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4853 'f',
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4854 'z',
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4855 'u',
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4856 'd',
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4860 's',
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4862 'l',
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4868 'r',
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4869 's',
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4871 'f',
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4887 's',
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4888 'l',
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4889 'l',
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4890 's',
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4891 's',
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4892 'd',
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4893 'i',
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4894 'l',
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4895 'l',
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4896 'l',
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4897 'f',
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4898 's',
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4899 'u',
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4900 'f',
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4901 'f',
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4902 's',
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4904 's',
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4905 's',
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4906 'a',
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4907 'b',
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4908 'a',
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4909 'a',
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4910 'c',
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4911 'h',
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4912 's',
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4913 'f',
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4914 's',
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4916 'f',
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4920 'u',
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4924 's',
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4925 'a',
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4926 'a',
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4927 'f',
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4931 'u',
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4933 'f',
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4934 'a',
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4935 'f',
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'x',
'p', 9, 0,
5070 'f',
'c',
'm',
'e',
'q', 9, 0,
5071 'l',
'd',
'1',
'r', 9, 0,
5072 'l',
'd',
'2',
'r', 9, 0,
5073 'l',
'd',
'3',
'r', 9, 0,
5074 'l',
'd',
'4',
'r', 9, 0,
5075 'l',
'd',
'a',
'r', 9, 0,
5077 'a',
'd',
'r', 9, 0,
5078 'l',
'd',
'r', 9, 0,
5079 's',
'r',
's',
'h',
'r', 9, 0,
5080 'u',
'r',
's',
'h',
'r', 9, 0,
5081 's',
's',
'h',
'r', 9, 0,
5082 'u',
's',
'h',
'r', 9, 0,
5083 'b',
'l',
'r', 9, 0,
5084 's',
't',
'l',
'r', 9, 0,
5085 'e',
'o',
'r', 9, 0,
5086 'r',
'o',
'r', 9, 0,
5087 'o',
'r',
'r', 9, 0,
5088 'a',
's',
'r', 9, 0,
5089 'l',
's',
'r', 9, 0,
5090 'm',
's',
'r', 9, 0,
5091 'l',
'd',
't',
'r', 9, 0,
5092 's',
't',
'r', 9, 0,
5093 's',
't',
't',
'r', 9, 0,
5094 'e',
'x',
't',
'r', 9, 0,
5095 'l',
'd',
'u',
'r', 9, 0,
5096 's',
't',
'u',
'r', 9, 0,
5097 'l',
'd',
'a',
'x',
'r', 9, 0,
5098 'l',
'd',
'x',
'r', 9, 0,
5099 's',
't',
'l',
'x',
'r', 9, 0,
5100 's',
't',
'x',
'r', 9, 0,
5101 'f',
'c',
'v',
't',
'a',
's', 9, 0,
5102 'f',
'a',
'b',
's', 9, 0,
5103 's',
'q',
'a',
'b',
's', 9, 0,
5104 's',
'u',
'b',
's', 9, 0,
5105 's',
'b',
'c',
's', 9, 0,
5106 'a',
'd',
'c',
's', 9, 0,
5107 'b',
'i',
'c',
's', 9, 0,
5108 'a',
'd',
'd',
's', 9, 0,
5109 'a',
'n',
'd',
's', 9, 0,
5110 'c',
'm',
'h',
's', 9, 0,
5111 'c',
'l',
's', 9, 0,
5112 'f',
'm',
'l',
's', 9, 0,
5113 'f',
'c',
'v',
't',
'm',
's', 9, 0,
5114 'i',
'n',
's', 9, 0,
5115 'f',
'c',
'v',
't',
'n',
's', 9, 0,
5116 'f',
'r',
'e',
'c',
'p',
's', 9, 0,
5117 'f',
'c',
'v',
't',
'p',
's', 9, 0,
5118 'm',
'r',
's', 9, 0,
5119 'f',
'r',
's',
'q',
'r',
't',
's', 9, 0,
5120 's',
'y',
's', 9, 0,
5121 'f',
'c',
'v',
't',
'z',
's', 9, 0,
5122 'r',
'e',
't', 9, 0,
5123 'f',
'a',
'c',
'g',
't', 9, 0,
5124 'f',
'c',
'm',
'g',
't', 9, 0,
5125 'r',
'b',
'i',
't', 9, 0,
5126 'h',
'l',
't', 9, 0,
5127 'f',
'c',
'm',
'l',
't', 9, 0,
5128 'c',
'n',
't', 9, 0,
5129 'n',
'o',
't', 9, 0,
5130 'f',
's',
'q',
'r',
't', 9, 0,
5131 'c',
'm',
't',
's',
't', 9, 0,
5132 'f',
'c',
'v',
't', 9, 0,
5133 'e',
'x',
't', 9, 0,
5134 'f',
'c',
'v',
't',
'a',
'u', 9, 0,
5135 's',
'q',
's',
'h',
'l',
'u', 9, 0,
5136 'f',
'c',
'v',
't',
'm',
'u', 9, 0,
5137 'f',
'c',
'v',
't',
'n',
'u', 9, 0,
5138 'f',
'c',
'v',
't',
'p',
'u', 9, 0,
5139 'f',
'c',
'v',
't',
'z',
'u', 9, 0,
5140 'a',
'd',
'd',
'v', 9, 0,
5141 'r',
'e',
'v', 9, 0,
5142 'f',
'd',
'i',
'v', 9, 0,
5143 's',
'd',
'i',
'v', 9, 0,
5144 'u',
'd',
'i',
'v', 9, 0,
5145 's',
'a',
'd',
'd',
'l',
'v', 9, 0,
5146 'u',
'a',
'd',
'd',
'l',
'v', 9, 0,
5147 'f',
'm',
'i',
'n',
'n',
'm',
'v', 9, 0,
5148 'f',
'm',
'a',
'x',
'n',
'm',
'v', 9, 0,
5149 'f',
'm',
'i',
'n',
'v', 9, 0,
5150 's',
'm',
'i',
'n',
'v', 9, 0,
5151 'u',
'm',
'i',
'n',
'v', 9, 0,
5152 'c',
's',
'i',
'n',
'v', 9, 0,
5153 'f',
'm',
'o',
'v', 9, 0,
5154 's',
'm',
'o',
'v', 9, 0,
5155 'u',
'm',
'o',
'v', 9, 0,
5156 'f',
'm',
'a',
'x',
'v', 9, 0,
5157 's',
'm',
'a',
'x',
'v', 9, 0,
5158 'u',
'm',
'a',
'x',
'v', 9, 0,
5159 'c',
'r',
'c',
'3',
'2',
'w', 9, 0,
5160 's',
's',
'u',
'b',
'w', 9, 0,
5161 'u',
's',
'u',
'b',
'w', 9, 0,
5162 'c',
'r',
'c',
'3',
'2',
'c',
'w', 9, 0,
5163 's',
'a',
'd',
'd',
'w', 9, 0,
5164 'u',
'a',
'd',
'd',
'w', 9, 0,
5165 'l',
'd',
'p',
's',
'w', 9, 0,
5166 'l',
'd',
'r',
's',
'w', 9, 0,
5167 'l',
'd',
't',
'r',
's',
'w', 9, 0,
5168 'l',
'd',
'u',
'r',
's',
'w', 9, 0,
5169 'c',
'r',
'c',
'3',
'2',
'x', 9, 0,
5170 'f',
'm',
'a',
'x', 9, 0,
5171 's',
'm',
'a',
'x', 9, 0,
5172 'u',
'm',
'a',
'x', 9, 0,
5173 't',
'b',
'x', 9, 0,
5174 'c',
'r',
'c',
'3',
'2',
'c',
'x', 9, 0,
5175 'c',
'l',
'r',
'e',
'x', 9, 0,
5176 'f',
'm',
'u',
'l',
'x', 9, 0,
5177 'f',
'r',
'e',
'c',
'p',
'x', 9, 0,
5178 'f',
'r',
'i',
'n',
't',
'x', 9, 0,
5179 'c',
'b',
'z', 9, 0,
5180 't',
'b',
'z', 9, 0,
5181 'c',
'l',
'z', 9, 0,
5182 'c',
'b',
'n',
'z', 9, 0,
5183 't',
'b',
'n',
'z', 9, 0,
5184 'f',
'r',
'i',
'n',
't',
'z', 9, 0,
5185 'm',
'o',
'v',
'z', 9, 0,
5186 '.',
't',
'l',
's',
'd',
'e',
's',
'c',
'c',
'a',
'l',
'l', 32, 0,
5187 'h',
'i',
'n',
't', 32, 0,
5189 'L',
'I',
'F',
'E',
'T',
'I',
'M',
'E',
'_',
'E',
'N',
'D', 0,
5190 'B',
'U',
'N',
'D',
'L',
'E', 0,
5191 'D',
'B',
'G',
'_',
'V',
'A',
'L',
'U',
'E', 0,
5192 'L',
'I',
'F',
'E',
'T',
'I',
'M',
'E',
'_',
'S',
'T',
'A',
'R',
'T', 0,
5193 'd',
'r',
'p',
's', 0,
5194 'e',
'r',
'e',
't', 0,
5201 uint64_t Bits = (Bits2 << 32) | Bits1;
5203 #ifndef CAPSTONE_DIET
5210 switch ((Bits >> 12) & 63) {
5218 printVRegOperand(MI, 0,
O);
5222 printOperand(MI, 0,
O);
5226 printVRegOperand(MI, 1,
O);
5230 printAlignedLabel(MI, 0,
O);
5235 printHexImm(MI, 0,
O);
5240 printCondCode(MI, 0,
O);
5242 printAlignedLabel(MI, 1,
O);
5247 printBarrierOption(MI, 0,
O);
5252 printOperand(MI, 1,
O);
5256 printTypedVectorList(MI, 0,
O, 16,
'b', MRI);
5258 set_mem_access(MI,
true);
5259 printOperand(MI, 1,
O);
5261 set_mem_access(MI,
false);
5266 printTypedVectorList(MI, 1,
O, 16,
'b', MRI);
5268 set_mem_access(MI,
true);
5269 printOperand(MI, 2,
O);
5271 set_mem_access(MI,
false);
5275 printTypedVectorList(MI, 0,
O, 1,
'd', MRI);
5277 set_mem_access(MI,
true);
5278 printOperand(MI, 1,
O);
5280 set_mem_access(MI,
false);
5285 printTypedVectorList(MI, 1,
O, 1,
'd', MRI);
5287 set_mem_access(MI,
true);
5288 printOperand(MI, 2,
O);
5290 set_mem_access(MI,
false);
5294 printTypedVectorList(MI, 0,
O, 2,
'd', MRI);
5296 set_mem_access(MI,
true);
5297 printOperand(MI, 1,
O);
5299 set_mem_access(MI,
false);
5304 printTypedVectorList(MI, 1,
O, 2,
'd', MRI);
5306 set_mem_access(MI,
true);
5307 printOperand(MI, 2,
O);
5309 set_mem_access(MI,
false);
5313 printTypedVectorList(MI, 0,
O, 2,
's', MRI);
5315 set_mem_access(MI,
true);
5316 printOperand(MI, 1,
O);
5318 set_mem_access(MI,
false);
5323 printTypedVectorList(MI, 1,
O, 2,
's', MRI);
5325 set_mem_access(MI,
true);
5326 printOperand(MI, 2,
O);
5328 set_mem_access(MI,
false);
5332 printTypedVectorList(MI, 0,
O, 4,
'h', MRI);
5334 set_mem_access(MI,
true);
5335 printOperand(MI, 1,
O);
5337 set_mem_access(MI,
false);
5342 printTypedVectorList(MI, 1,
O, 4,
'h', MRI);
5344 set_mem_access(MI,
true);
5345 printOperand(MI, 2,
O);
5347 set_mem_access(MI,
false);
5351 printTypedVectorList(MI, 0,
O, 4,
's', MRI);
5353 set_mem_access(MI,
true);
5354 printOperand(MI, 1,
O);
5356 set_mem_access(MI,
false);
5361 printTypedVectorList(MI, 1,
O, 4,
's', MRI);
5363 set_mem_access(MI,
true);
5364 printOperand(MI, 2,
O);
5366 set_mem_access(MI,
false);
5370 printTypedVectorList(MI, 0,
O, 8,
'b', MRI);
5372 set_mem_access(MI,
true);
5373 printOperand(MI, 1,
O);
5375 set_mem_access(MI,
false);
5380 printTypedVectorList(MI, 1,
O, 8,
'b', MRI);
5382 set_mem_access(MI,
true);
5383 printOperand(MI, 2,
O);
5385 set_mem_access(MI,
false);
5389 printTypedVectorList(MI, 0,
O, 8,
'h', MRI);
5391 set_mem_access(MI,
true);
5392 printOperand(MI, 1,
O);
5394 set_mem_access(MI,
false);
5399 printTypedVectorList(MI, 1,
O, 8,
'h', MRI);
5401 set_mem_access(MI,
true);
5402 printOperand(MI, 2,
O);
5404 set_mem_access(MI,
false);
5408 printTypedVectorList(MI, 1,
O, 0,
'h', MRI);
5409 printVectorIndex(MI, 2,
O);
5411 set_mem_access(MI,
true);
5412 printOperand(MI, 3,
O);
5416 printTypedVectorList(MI, 2,
O, 0,
'h', MRI);
5417 printVectorIndex(MI, 3,
O);
5419 set_mem_access(MI,
true);
5420 printOperand(MI, 4,
O);
5422 set_mem_access(MI,
false);
5426 printTypedVectorList(MI, 1,
O, 0,
's', MRI);
5427 printVectorIndex(MI, 2,
O);
5429 set_mem_access(MI,
true);
5430 printOperand(MI, 3,
O);
5434 printTypedVectorList(MI, 2,
O, 0,
's', MRI);
5435 printVectorIndex(MI, 3,
O);
5437 set_mem_access(MI,
true);
5438 printOperand(MI, 4,
O);
5440 set_mem_access(MI,
false);
5444 printTypedVectorList(MI, 1,
O, 0,
'd', MRI);
5445 printVectorIndex(MI, 2,
O);
5447 set_mem_access(MI,
true);
5448 printOperand(MI, 3,
O);
5452 printTypedVectorList(MI, 2,
O, 0,
'd', MRI);
5453 printVectorIndex(MI, 3,
O);
5455 set_mem_access(MI,
true);
5456 printOperand(MI, 4,
O);
5458 set_mem_access(MI,
false);
5462 printTypedVectorList(MI, 1,
O, 0,
'b', MRI);
5463 printVectorIndex(MI, 2,
O);
5465 set_mem_access(MI,
true);
5466 printOperand(MI, 3,
O);
5470 printTypedVectorList(MI, 2,
O, 0,
'b', MRI);
5471 printVectorIndex(MI, 3,
O);
5473 set_mem_access(MI,
true);
5474 printOperand(MI, 4,
O);
5476 set_mem_access(MI,
false);
5480 printMSRSystemRegister(MI, 0,
O);
5482 printOperand(MI, 1,
O);
5487 printSystemPStateField(MI, 0,
O);
5489 printOperand(MI, 1,
O);
5494 printPrefetchOp(MI, 0,
O);
5498 printTypedVectorList(MI, 0,
O, 0,
'h', MRI);
5499 printVectorIndex(MI, 1,
O);
5501 set_mem_access(MI,
true);
5502 printOperand(MI, 2,
O);
5504 set_mem_access(MI,
false);
5509 printTypedVectorList(MI, 0,
O, 0,
's', MRI);
5510 printVectorIndex(MI, 1,
O);
5512 set_mem_access(MI,
true);
5513 printOperand(MI, 2,
O);
5515 set_mem_access(MI,
false);
5520 printTypedVectorList(MI, 0,
O, 0,
'd', MRI);
5521 printVectorIndex(MI, 1,
O);
5523 set_mem_access(MI,
true);
5524 printOperand(MI, 2,
O);
5526 set_mem_access(MI,
false);
5531 printTypedVectorList(MI, 0,
O, 0,
'b', MRI);
5532 printVectorIndex(MI, 1,
O);
5534 set_mem_access(MI,
true);
5535 printOperand(MI, 2,
O);
5537 set_mem_access(MI,
false);
5545 switch ((Bits >> 18) & 63) {
5600 printVectorIndex(MI, 2,
O);
5607 printVectorIndex(MI, 2,
O);
5614 printVectorIndex(MI, 2,
O);
5621 printVectorIndex(MI, 2,
O);
5626 printPostIncOperand2(MI, 3,
O, 64);
5631 printPostIncOperand2(MI, 3,
O, 32);
5636 printPostIncOperand2(MI, 3,
O, 16);
5641 printPostIncOperand2(MI, 3,
O, 8);
5646 printPostIncOperand2(MI, 3,
O, 1);
5651 printPostIncOperand2(MI, 3,
O, 4);
5656 printPostIncOperand2(MI, 3,
O, 2);
5661 printPostIncOperand2(MI, 3,
O, 48);
5666 printPostIncOperand2(MI, 3,
O, 24);
5672 set_mem_access(MI,
false);
5677 printPostIncOperand2(MI, 5,
O, 2);
5682 printPostIncOperand2(MI, 5,
O, 4);
5687 printPostIncOperand2(MI, 5,
O, 8);
5692 printPostIncOperand2(MI, 5,
O, 1);
5697 printPostIncOperand2(MI, 5,
O, 16);
5702 printPostIncOperand2(MI, 3,
O, 3);
5707 printPostIncOperand2(MI, 3,
O, 12);
5712 printPostIncOperand2(MI, 3,
O, 6);
5717 printPostIncOperand2(MI, 5,
O, 6);
5722 printPostIncOperand2(MI, 5,
O, 12);
5727 printPostIncOperand2(MI, 5,
O, 24);
5732 printPostIncOperand2(MI, 5,
O, 3);
5737 printPostIncOperand2(MI, 5,
O, 32);
5743 set_mem_access(MI,
true);
5749 printVRegOperand(MI, 1,
O);
5759 set_mem_access(MI,
false);
5766 switch ((Bits >> 24) & 31) {
5770 printVRegOperand(MI, 1,
O);
5774 printOperand(MI, 1,
O);
5778 printVRegOperand(MI, 2,
O);
5782 printAdrpLabel(MI, 1,
O);
5787 printOperand(MI, 2,
O);
5791 printHexImm(MI, 2,
O);
5792 printShifter(MI, 3,
O);
5797 printAlignedLabel(MI, 1,
O);
5802 printFPImmOperand(MI, 1,
O);
5807 printOperand(MI, 3,
O);
5812 printVRegOperand(MI, 3,
O);
5816 printSIMDType10Operand(MI, 1,
O);
5821 printHexImm(MI, 1,
O);
5825 printMRSSystemRegister(MI, 1,
O);
5832 printVRegOperand(MI, 2,
O);
5841 printVRegOperand(MI, 2,
O);
5848 printPostIncOperand2(MI, 4,
O, 2);
5853 printPostIncOperand2(MI, 4,
O, 4);
5858 printPostIncOperand2(MI, 4,
O, 8);
5863 printPostIncOperand2(MI, 4,
O, 1);
5868 printPostIncOperand2(MI, 4,
O, 16);
5873 printPostIncOperand2(MI, 4,
O, 6);
5878 printPostIncOperand2(MI, 4,
O, 12);
5883 printPostIncOperand2(MI, 4,
O, 24);
5888 printPostIncOperand2(MI, 4,
O, 3);
5893 printPostIncOperand2(MI, 4,
O, 32);
5898 printSysCROperand(MI, 1,
O);
5900 printSysCROperand(MI, 2,
O);
5902 printOperand(MI, 3,
O);
5904 printOperand(MI, 4,
O);
5909 printTypedVectorList(MI, 1,
O, 16,
'b', MRI);
5911 printVRegOperand(MI, 2,
O);
5915 printTypedVectorList(MI, 2,
O, 16,
'b', MRI);
5917 printVRegOperand(MI, 3,
O);
5924 switch ((Bits >> 29) & 63) {
6116 set_mem_access(MI,
false);
6122 set_mem_access(MI,
true);
6127 set_mem_access(MI,
false);
6128 printOperand(MI, 3,
O);
6133 printShifter(MI, 2,
O);
6183 switch ((Bits >> 35) & 31) {
6187 printOperand(MI, 2,
O);
6191 printVRegOperand(MI, 2,
O);
6195 printVRegOperand(MI, 3,
O);
6199 printAddSubImm(MI, 2,
O);
6204 printShiftedRegister(MI, 2,
O);
6209 printExtendedRegister(MI, 2,
O);
6214 printLogicalImm32(MI, 2,
O);
6219 printLogicalImm64(MI, 2,
O);
6224 printOperand(MI, 3,
O);
6228 printVectorIndex(MI, 2,
O);
6233 printVectorIndex(MI, 4,
O);
6238 printUImm12Offset2(MI, 2,
O, 1);
6240 set_mem_access(MI,
false);
6245 printUImm12Offset2(MI, 2,
O, 8);
6247 set_mem_access(MI,
false);
6252 printUImm12Offset2(MI, 2,
O, 2);
6254 set_mem_access(MI,
false);
6259 printUImm12Offset2(MI, 2,
O, 16);
6261 set_mem_access(MI,
false);
6266 printUImm12Offset2(MI, 2,
O, 4);
6268 set_mem_access(MI,
false);
6273 printSysCROperand(MI, 2,
O);
6275 printSysCROperand(MI, 3,
O);
6277 printOperand(MI, 4,
O);
6282 printAlignedLabel(MI, 2,
O);
6290 switch ((Bits >> 40) & 31) {
6340 printArithExtend(MI, 3,
O);
6351 printOperand(MI, 3,
O);
6358 printOperand(MI, 3,
O);
6374 set_mem_access(MI,
false);
6380 set_mem_access(MI,
false);
6385 set_mem_access(MI,
false);
6396 set_mem_access(MI,
true);
6397 printOperand(MI, 3,
O);
6399 set_mem_access(MI,
false);
6407 switch ((Bits >> 45) & 31) {
6411 printOperand(MI, 4,
O);
6416 printCondCode(MI, 3,
O);
6421 printOperand(MI, 3,
O);
6426 printVectorIndex(MI, 4,
O);
6431 printVectorIndex(MI, 3,
O);
6436 printImmScale(MI, 3,
O, 8);
6438 set_mem_access(MI,
false);
6443 printImmScale(MI, 3,
O, 16);
6445 set_mem_access(MI,
false);
6450 printImmScale(MI, 3,
O, 4);
6452 set_mem_access(MI,
false);
6457 printImmScale(MI, 4,
O, 8);
6461 printImmScale(MI, 4,
O, 16);
6465 printImmScale(MI, 4,
O, 4);
6469 printMemExtend(MI, 3,
O,
'w', 8);
6471 set_mem_access(MI,
false);
6476 printMemExtend(MI, 3,
O,
'x', 8);
6478 set_mem_access(MI,
false);
6483 printMemExtend(MI, 3,
O,
'w', 64);
6485 set_mem_access(MI,
false);
6490 printMemExtend(MI, 3,
O,
'x', 64);
6492 set_mem_access(MI,
false);
6497 printMemExtend(MI, 3,
O,
'w', 16);
6499 set_mem_access(MI,
false);
6504 printMemExtend(MI, 3,
O,
'x', 16);
6506 set_mem_access(MI,
false);
6511 printMemExtend(MI, 3,
O,
'w', 128);
6513 set_mem_access(MI,
false);
6518 printMemExtend(MI, 3,
O,
'x', 128);
6520 set_mem_access(MI,
false);
6525 printMemExtend(MI, 3,
O,
'w', 32);
6527 set_mem_access(MI,
false);
6532 printMemExtend(MI, 3,
O,
'x', 32);
6534 set_mem_access(MI,
false);
6542 if ((Bits >> 50) & 1) {
6545 set_mem_access(MI,
false);
6557 static const char *getRegisterName(
unsigned RegNo,
int AltIdx)
6561 #ifndef CAPSTONE_DIET
6562 static const char AsmStrsNoRegAltName[] = {
6563 'D',
'7',
'_',
'D',
'8',
'_',
'D',
'9',
'_',
'D',
'1',
'0', 0,
6564 'Q',
'7',
'_',
'Q',
'8',
'_',
'Q',
'9',
'_',
'Q',
'1',
'0', 0,
6572 'D',
'1',
'7',
'_',
'D',
'1',
'8',
'_',
'D',
'1',
'9',
'_',
'D',
'2',
'0', 0,
6573 'Q',
'1',
'7',
'_',
'Q',
'1',
'8',
'_',
'Q',
'1',
'9',
'_',
'Q',
'2',
'0', 0,
6581 'D',
'2',
'7',
'_',
'D',
'2',
'8',
'_',
'D',
'2',
'9',
'_',
'D',
'3',
'0', 0,
6582 'Q',
'2',
'7',
'_',
'Q',
'2',
'8',
'_',
'Q',
'2',
'9',
'_',
'Q',
'3',
'0', 0,
6590 'D',
'2',
'9',
'_',
'D',
'3',
'0',
'_',
'D',
'3',
'1',
'_',
'D',
'0', 0,
6591 'Q',
'2',
'9',
'_',
'Q',
'3',
'0',
'_',
'Q',
'3',
'1',
'_',
'Q',
'0', 0,
6599 'D',
'8',
'_',
'D',
'9',
'_',
'D',
'1',
'0',
'_',
'D',
'1',
'1', 0,
6600 'Q',
'8',
'_',
'Q',
'9',
'_',
'Q',
'1',
'0',
'_',
'Q',
'1',
'1', 0,
6608 'D',
'1',
'8',
'_',
'D',
'1',
'9',
'_',
'D',
'2',
'0',
'_',
'D',
'2',
'1', 0,
6609 'Q',
'1',
'8',
'_',
'Q',
'1',
'9',
'_',
'Q',
'2',
'0',
'_',
'Q',
'2',
'1', 0,
6617 'D',
'2',
'8',
'_',
'D',
'2',
'9',
'_',
'D',
'3',
'0',
'_',
'D',
'3',
'1', 0,
6618 'Q',
'2',
'8',
'_',
'Q',
'2',
'9',
'_',
'Q',
'3',
'0',
'_',
'Q',
'3',
'1', 0,
6624 'D',
'3',
'0',
'_',
'D',
'3',
'1',
'_',
'D',
'0',
'_',
'D',
'1', 0,
6625 'Q',
'3',
'0',
'_',
'Q',
'3',
'1',
'_',
'Q',
'0',
'_',
'Q',
'1', 0,
6633 'D',
'9',
'_',
'D',
'1',
'0',
'_',
'D',
'1',
'1',
'_',
'D',
'1',
'2', 0,
6634 'Q',
'9',
'_',
'Q',
'1',
'0',
'_',
'Q',
'1',
'1',
'_',
'Q',
'1',
'2', 0,
6642 'D',
'1',
'9',
'_',
'D',
'2',
'0',
'_',
'D',
'2',
'1',
'_',
'D',
'2',
'2', 0,
6643 'Q',
'1',
'9',
'_',
'Q',
'2',
'0',
'_',
'Q',
'2',
'1',
'_',
'Q',
'2',
'2', 0,
6651 'D',
'3',
'1',
'_',
'D',
'0',
'_',
'D',
'1',
'_',
'D',
'2', 0,
6652 'Q',
'3',
'1',
'_',
'Q',
'0',
'_',
'Q',
'1',
'_',
'Q',
'2', 0,
6660 'D',
'1',
'0',
'_',
'D',
'1',
'1',
'_',
'D',
'1',
'2',
'_',
'D',
'1',
'3', 0,
6661 'Q',
'1',
'0',
'_',
'Q',
'1',
'1',
'_',
'Q',
'1',
'2',
'_',
'Q',
'1',
'3', 0,
6669 'D',
'2',
'0',
'_',
'D',
'2',
'1',
'_',
'D',
'2',
'2',
'_',
'D',
'2',
'3', 0,
6670 'Q',
'2',
'0',
'_',
'Q',
'2',
'1',
'_',
'Q',
'2',
'2',
'_',
'Q',
'2',
'3', 0,
6678 'D',
'0',
'_',
'D',
'1',
'_',
'D',
'2',
'_',
'D',
'3', 0,
6679 'Q',
'0',
'_',
'Q',
'1',
'_',
'Q',
'2',
'_',
'Q',
'3', 0,
6687 'D',
'1',
'1',
'_',
'D',
'1',
'2',
'_',
'D',
'1',
'3',
'_',
'D',
'1',
'4', 0,
6688 'Q',
'1',
'1',
'_',
'Q',
'1',
'2',
'_',
'Q',
'1',
'3',
'_',
'Q',
'1',
'4', 0,
6696 'D',
'2',
'1',
'_',
'D',
'2',
'2',
'_',
'D',
'2',
'3',
'_',
'D',
'2',
'4', 0,
6697 'Q',
'2',
'1',
'_',
'Q',
'2',
'2',
'_',
'Q',
'2',
'3',
'_',
'Q',
'2',
'4', 0,
6705 'D',
'1',
'_',
'D',
'2',
'_',
'D',
'3',
'_',
'D',
'4', 0,
6706 'Q',
'1',
'_',
'Q',
'2',
'_',
'Q',
'3',
'_',
'Q',
'4', 0,
6714 'D',
'1',
'2',
'_',
'D',
'1',
'3',
'_',
'D',
'1',
'4',
'_',
'D',
'1',
'5', 0,
6715 'Q',
'1',
'2',
'_',
'Q',
'1',
'3',
'_',
'Q',
'1',
'4',
'_',
'Q',
'1',
'5', 0,
6723 'D',
'2',
'2',
'_',
'D',
'2',
'3',
'_',
'D',
'2',
'4',
'_',
'D',
'2',
'5', 0,
6724 'Q',
'2',
'2',
'_',
'Q',
'2',
'3',
'_',
'Q',
'2',
'4',
'_',
'Q',
'2',
'5', 0,
6732 'D',
'2',
'_',
'D',
'3',
'_',
'D',
'4',
'_',
'D',
'5', 0,
6733 'Q',
'2',
'_',
'Q',
'3',
'_',
'Q',
'4',
'_',
'Q',
'5', 0,
6741 'D',
'1',
'3',
'_',
'D',
'1',
'4',
'_',
'D',
'1',
'5',
'_',
'D',
'1',
'6', 0,
6742 'Q',
'1',
'3',
'_',
'Q',
'1',
'4',
'_',
'Q',
'1',
'5',
'_',
'Q',
'1',
'6', 0,
6750 'D',
'2',
'3',
'_',
'D',
'2',
'4',
'_',
'D',
'2',
'5',
'_',
'D',
'2',
'6', 0,
6751 'Q',
'2',
'3',
'_',
'Q',
'2',
'4',
'_',
'Q',
'2',
'5',
'_',
'Q',
'2',
'6', 0,
6759 'D',
'3',
'_',
'D',
'4',
'_',
'D',
'5',
'_',
'D',
'6', 0,
6760 'Q',
'3',
'_',
'Q',
'4',
'_',
'Q',
'5',
'_',
'Q',
'6', 0,
6768 'D',
'1',
'4',
'_',
'D',
'1',
'5',
'_',
'D',
'1',
'6',
'_',
'D',
'1',
'7', 0,
6769 'Q',
'1',
'4',
'_',
'Q',
'1',
'5',
'_',
'Q',
'1',
'6',
'_',
'Q',
'1',
'7', 0,
6777 'D',
'2',
'4',
'_',
'D',
'2',
'5',
'_',
'D',
'2',
'6',
'_',
'D',
'2',
'7', 0,
6778 'Q',
'2',
'4',
'_',
'Q',
'2',
'5',
'_',
'Q',
'2',
'6',
'_',
'Q',
'2',
'7', 0,
6786 'D',
'4',
'_',
'D',
'5',
'_',
'D',
'6',
'_',
'D',
'7', 0,
6787 'Q',
'4',
'_',
'Q',
'5',
'_',
'Q',
'6',
'_',
'Q',
'7', 0,
6795 'D',
'1',
'5',
'_',
'D',
'1',
'6',
'_',
'D',
'1',
'7',
'_',
'D',
'1',
'8', 0,
6796 'Q',
'1',
'5',
'_',
'Q',
'1',
'6',
'_',
'Q',
'1',
'7',
'_',
'Q',
'1',
'8', 0,
6804 'D',
'2',
'5',
'_',
'D',
'2',
'6',
'_',
'D',
'2',
'7',
'_',
'D',
'2',
'8', 0,
6805 'Q',
'2',
'5',
'_',
'Q',
'2',
'6',
'_',
'Q',
'2',
'7',
'_',
'Q',
'2',
'8', 0,
6813 'D',
'5',
'_',
'D',
'6',
'_',
'D',
'7',
'_',
'D',
'8', 0,
6814 'Q',
'5',
'_',
'Q',
'6',
'_',
'Q',
'7',
'_',
'Q',
'8', 0,
6822 'D',
'1',
'6',
'_',
'D',
'1',
'7',
'_',
'D',
'1',
'8',
'_',
'D',
'1',
'9', 0,
6823 'Q',
'1',
'6',
'_',
'Q',
'1',
'7',
'_',
'Q',
'1',
'8',
'_',
'Q',
'1',
'9', 0,
6831 'D',
'2',
'6',
'_',
'D',
'2',
'7',
'_',
'D',
'2',
'8',
'_',
'D',
'2',
'9', 0,
6832 'Q',
'2',
'6',
'_',
'Q',
'2',
'7',
'_',
'Q',
'2',
'8',
'_',
'Q',
'2',
'9', 0,
6840 'D',
'6',
'_',
'D',
'7',
'_',
'D',
'8',
'_',
'D',
'9', 0,
6841 'Q',
'6',
'_',
'Q',
'7',
'_',
'Q',
'8',
'_',
'Q',
'9', 0,
6852 'n',
'z',
'c',
'v', 0,
6855 static const uint16_t RegAsmOffsetNoRegAltName[] = {
6856 1713, 170, 1774, 1763, 1762, 1766, 1770, 204, 421, 586, 751, 916, 1081, 1246,
6857 1411, 1576, 1741, 26, 253, 472, 639, 804, 969, 1134, 1299, 1464, 1629, 86,
6858 313, 532, 699, 864, 1029, 1194, 1359, 1524, 1689, 146, 373, 207, 424, 589,
6859 754, 919, 1084, 1249, 1414, 1579, 1744, 30, 257, 476, 643, 808, 973, 1138,
6860 1303, 1468, 1633, 90, 317, 536, 703, 868, 1033, 1198, 1363, 1528, 1693, 150,
6861 377, 210, 427, 592, 757, 922, 1087, 1252, 1417, 1582, 1747, 34, 261, 480,
6862 647, 812, 977, 1142, 1307, 1472, 1637, 94, 321, 540, 707, 872, 1037, 1202,
6863 1367, 1532, 1697, 154, 381, 213, 430, 595, 760, 925, 1090, 1255, 1420, 1585,
6864 1750, 38, 265, 484, 651, 816, 981, 1146, 1311, 1476, 1641, 98, 325, 544,
6865 711, 876, 1041, 1206, 1371, 1536, 1701, 158, 385, 216, 433, 598, 763, 928,
6866 1093, 1258, 1423, 1588, 1753, 42, 269, 488, 655, 820, 985, 1150, 1315, 1480,
6867 1645, 102, 329, 548, 715, 880, 1045, 1210, 1375, 1540, 1705, 162, 389, 219,
6868 436, 601, 766, 931, 1096, 1261, 1426, 1591, 1756, 46, 273, 492, 659, 824,
6869 989, 1154, 1319, 1484, 1649, 106, 333, 552, 719, 884, 1049, 1214, 1379, 1544,
6870 1709, 166, 222, 439, 604, 769, 934, 1099, 1264, 1429, 1594, 1759, 50, 277,
6871 496, 663, 828, 993, 1158, 1323, 1488, 1653, 110, 337, 556, 723, 888, 1053,
6872 1218, 1383, 1548, 401, 567, 733, 898, 1063, 1228, 1393, 1558, 1723, 6, 231,
6873 449, 615, 780, 945, 1110, 1275, 1440, 1605, 62, 289, 508, 675, 840, 1005,
6874 1170, 1335, 1500, 1665, 122, 349, 182, 727, 892, 1057, 1222, 1387, 1552, 1717,
6875 0, 225, 442, 607, 772, 937, 1102, 1267, 1432, 1597, 54, 281, 500, 667,
6876 832, 997, 1162, 1327, 1492, 1657, 114, 341, 174, 393, 560, 564, 730, 895,
6877 1060, 1225, 1390, 1555, 1720, 3, 228, 445, 611, 776, 941, 1106, 1271, 1436,
6878 1601, 58, 285, 504, 671, 836, 1001, 1166, 1331, 1496, 1661, 118, 345, 178,
6879 397, 415, 580, 745, 910, 1075, 1240, 1405, 1570, 1735, 19, 245, 464, 631,
6880 796, 961, 1126, 1291, 1456, 1621, 78, 305, 524, 691, 856, 1021, 1186, 1351,
6881 1516, 1681, 138, 365, 197, 739, 904, 1069, 1234, 1399, 1564, 1729, 13, 239,
6882 457, 623, 788, 953, 1118, 1283, 1448, 1613, 70, 297, 516, 683, 848, 1013,
6883 1178, 1343, 1508, 1673, 130, 357, 189, 407, 573, 577, 742, 907, 1072, 1237,
6884 1402, 1567, 1732, 16, 242, 460, 627, 792, 957, 1122, 1287, 1452, 1617, 74,
6885 301, 520, 687, 852, 1017, 1182, 1347, 1512, 1677, 134, 361, 193, 411,
6888 static const char AsmStrsvreg[] = {
6923 static const uint16_t RegAsmOffsetvreg[] = {
6924 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
6925 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
6926 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 12, 27, 38,
6927 49, 60, 71, 82, 93, 104, 115, 0, 15, 30, 41, 52, 63, 74,
6928 85, 96, 107, 4, 19, 34, 45, 56, 67, 78, 89, 100, 111, 8,
6929 23, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
6930 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
6931 3, 3, 3, 3, 3, 12, 27, 38, 49, 60, 71, 82, 93, 104,
6932 115, 0, 15, 30, 41, 52, 63, 74, 85, 96, 107, 4, 19, 34,
6933 45, 56, 67, 78, 89, 100, 111, 8, 23, 3, 3, 3, 3, 3,
6934 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
6935 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
6936 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
6937 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
6938 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
6939 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
6940 3, 3, 3, 12, 27, 38, 49, 60, 71, 82, 93, 104, 115, 0,
6941 15, 30, 41, 52, 63, 74, 85, 96, 107, 4, 19, 34, 45, 56,
6942 67, 78, 89, 100, 111, 8, 23, 12, 27, 38, 49, 60, 71, 82,
6943 93, 104, 115, 0, 15, 30, 41, 52, 63, 74, 85, 96, 107, 4,
6944 19, 34, 45, 56, 67, 78, 89, 100, 111, 8, 23, 12, 27, 38,
6945 49, 60, 71, 82, 93, 104, 115, 0, 15, 30, 41, 52, 63, 74,
6946 85, 96, 107, 4, 19, 34, 45, 56, 67, 78, 89, 100, 111, 8,
6947 23, 12, 27, 38, 49, 60, 71, 82, 93, 104, 115, 0, 15, 30,
6948 41, 52, 63, 74, 85, 96, 107, 4, 19, 34, 45, 56, 67, 78,
6949 89, 100, 111, 8, 23, 12, 27, 38, 49, 60, 71, 82, 93, 104,
6950 115, 0, 15, 30, 41, 52, 63, 74, 85, 96, 107, 4, 19, 34,
6951 45, 56, 67, 78, 89, 100, 111, 8, 23, 12, 27, 38, 49, 60,
6952 71, 82, 93, 104, 115, 0, 15, 30, 41, 52, 63, 74, 85, 96,
6953 107, 4, 19, 34, 45, 56, 67, 78, 89, 100, 111, 8, 23,
6957 const char *AsmStrs;
6961 case AArch64_NoRegAltName:
6962 AsmStrs = AsmStrsNoRegAltName;
6963 RegAsmOffset = RegAsmOffsetNoRegAltName;
6966 AsmStrs = AsmStrsvreg;
6967 RegAsmOffset = RegAsmOffsetvreg;
6977 return AsmStrs+RegAsmOffset[RegNo-1];
6983 #ifdef PRINT_ALIAS_INSTR
6984 #undef PRINT_ALIAS_INSTR
6986 static void printCustomAliasOperand(
MCInst *MI,
unsigned OpIdx,
6990 switch (PrintMethodIdx) {
6995 printAddSubImm(MI, OpIdx,
OS);
6998 printShifter(MI, OpIdx,
OS);
7001 printArithExtend(MI, OpIdx,
OS);
7004 printLogicalImm32(MI, OpIdx,
OS);
7007 printLogicalImm64(MI, OpIdx,
OS);
7010 printVRegOperand(MI, OpIdx,
OS);
7013 printHexImm(MI, OpIdx,
OS);
7016 printInverseCondCode(MI, OpIdx,
OS);
7019 printVectorIndex(MI, OpIdx,
OS);
7022 printTypedVectorList(MI, OpIdx,
OS, 16,
'b', MRI);
7025 printTypedVectorList(MI, OpIdx,
OS, 1,
'd', MRI);
7028 printTypedVectorList(MI, OpIdx,
OS, 2,
'd', MRI);
7031 printTypedVectorList(MI, OpIdx,
OS, 2,
's', MRI);
7034 printTypedVectorList(MI, OpIdx,
OS, 4,
'h', MRI);
7037 printTypedVectorList(MI, OpIdx,
OS, 4,
's', MRI);
7040 printTypedVectorList(MI, OpIdx,
OS, 8,
'b', MRI);
7043 printTypedVectorList(MI, OpIdx,
OS, 8,
'h', MRI);
7046 printTypedVectorList(MI, OpIdx,
OS, 0,
'h', MRI);
7049 printTypedVectorList(MI, OpIdx,
OS, 0,
's', MRI);
7052 printTypedVectorList(MI, OpIdx,
OS, 0,
'd', MRI);
7055 printTypedVectorList(MI, OpIdx,
OS, 0,
'b', MRI);
7058 printPrefetchOp(MI, OpIdx,
OS);
7061 printSysCROperand(MI, OpIdx,
OS);
7066 static bool AArch64InstPrinterValidateMCOperand(
7067 MCOperand *MCOp,
unsigned PredicateIndex)
7069 switch (PredicateIndex) {
7082 #define GETREGCLASS_CONTAIN(_class, _reg) MCRegisterClass_contains(MCRegisterInfo_getRegClass(MRI, _class), MCOperand_getReg(MCInst_getOperand(MI, _reg)))
7083 const char *AsmString;
7084 char *
tmp, *AsmMnem, *AsmOps, *
c;
7085 int OpIdx, PrintMethodIdx;
7088 default:
return NULL;
7089 case AArch64_ADDSWri:
7093 GETREGCLASS_CONTAIN(AArch64_GPR32spRegClassID, 1)) {
7095 AsmString =
"cmn $\x02, $\xFF\x03\x01";
7099 case AArch64_ADDSWrs:
7103 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) &&
7105 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2) &&
7109 AsmString =
"cmn $\x02, $\x03";
7115 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) &&
7117 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2)) {
7119 AsmString =
"cmn $\x02, $\x03$\xFF\x04\x02";
7124 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
7126 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) &&
7128 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2) &&
7132 AsmString =
"adds $\x01, $\x02, $\x03";
7136 case AArch64_ADDSWrx:
7140 GETREGCLASS_CONTAIN(AArch64_GPR32sponlyRegClassID, 1) &&
7142 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2) &&
7146 AsmString =
"cmn $\x02, $\x03";
7152 GETREGCLASS_CONTAIN(AArch64_GPR32spRegClassID, 1) &&
7154 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2)) {
7156 AsmString =
"cmn $\x02, $\x03$\xFF\x04\x03";
7161 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
7163 GETREGCLASS_CONTAIN(AArch64_GPR32sponlyRegClassID, 1) &&
7165 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2) &&
7169 AsmString =
"adds $\x01, $\x02, $\x03";
7173 case AArch64_ADDSXri:
7177 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1)) {
7179 AsmString =
"cmn $\x02, $\xFF\x03\x01";
7183 case AArch64_ADDSXrs:
7187 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) &&
7189 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) &&
7193 AsmString =
"cmn $\x02, $\x03";
7199 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) &&
7201 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2)) {
7203 AsmString =
"cmn $\x02, $\x03$\xFF\x04\x02";
7208 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
7210 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) &&
7212 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) &&
7216 AsmString =
"adds $\x01, $\x02, $\x03";
7220 case AArch64_ADDSXrx:
7224 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
7226 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2)) {
7228 AsmString =
"cmn $\x02, $\x03$\xFF\x04\x03";
7232 case AArch64_ADDSXrx64:
7236 GETREGCLASS_CONTAIN(AArch64_GPR64sponlyRegClassID, 1) &&
7238 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) &&
7242 AsmString =
"cmn $\x02, $\x03";
7248 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
7250 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2)) {
7252 AsmString =
"cmn $\x02, $\x03$\xFF\x04\x03";
7257 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
7259 GETREGCLASS_CONTAIN(AArch64_GPR64sponlyRegClassID, 1) &&
7261 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) &&
7265 AsmString =
"adds $\x01, $\x02, $\x03";
7269 case AArch64_ADDWri:
7272 GETREGCLASS_CONTAIN(AArch64_GPR32sponlyRegClassID, 0) &&
7274 GETREGCLASS_CONTAIN(AArch64_GPR32spRegClassID, 1) &&
7280 AsmString =
"mov $\x01, $\x02";
7285 GETREGCLASS_CONTAIN(AArch64_GPR32spRegClassID, 0) &&
7287 GETREGCLASS_CONTAIN(AArch64_GPR32sponlyRegClassID, 1) &&
7293 AsmString =
"mov $\x01, $\x02";
7297 case AArch64_ADDWrs:
7300 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
7302 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) &&
7304 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2) &&
7308 AsmString =
"add $\x01, $\x02, $\x03";
7312 case AArch64_ADDWrx:
7315 GETREGCLASS_CONTAIN(AArch64_GPR32sponlyRegClassID, 0) &&
7317 GETREGCLASS_CONTAIN(AArch64_GPR32spRegClassID, 1) &&
7319 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2) &&
7323 AsmString =
"add $\x01, $\x02, $\x03";
7328 GETREGCLASS_CONTAIN(AArch64_GPR32spRegClassID, 0) &&
7330 GETREGCLASS_CONTAIN(AArch64_GPR32sponlyRegClassID, 1) &&
7332 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2) &&
7336 AsmString =
"add $\x01, $\x02, $\x03";
7340 case AArch64_ADDXri:
7343 GETREGCLASS_CONTAIN(AArch64_GPR64sponlyRegClassID, 0) &&
7345 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
7351 AsmString =
"mov $\x01, $\x02";
7356 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
7358 GETREGCLASS_CONTAIN(AArch64_GPR64sponlyRegClassID, 1) &&
7364 AsmString =
"mov $\x01, $\x02";
7368 case AArch64_ADDXrs:
7371 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
7373 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) &&
7375 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) &&
7379 AsmString =
"add $\x01, $\x02, $\x03";
7383 case AArch64_ADDXrx64:
7386 GETREGCLASS_CONTAIN(AArch64_GPR64sponlyRegClassID, 0) &&
7388 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
7390 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) &&
7394 AsmString =
"add $\x01, $\x02, $\x03";
7399 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
7401 GETREGCLASS_CONTAIN(AArch64_GPR64sponlyRegClassID, 1) &&
7403 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) &&
7407 AsmString =
"add $\x01, $\x02, $\x03";
7411 case AArch64_ANDSWri:
7415 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1)) {
7417 AsmString =
"tst $\x02, $\xFF\x03\x04";
7421 case AArch64_ANDSWrs:
7425 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) &&
7427 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2) &&
7431 AsmString =
"tst $\x02, $\x03";
7437 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) &&
7439 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2)) {
7441 AsmString =
"tst $\x02, $\x03$\xFF\x04\x02";
7446 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
7448 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) &&
7450 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2) &&
7454 AsmString =
"ands $\x01, $\x02, $\x03";
7458 case AArch64_ANDSXri:
7462 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1)) {
7464 AsmString =
"tst $\x02, $\xFF\x03\x05";
7468 case AArch64_ANDSXrs:
7472 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) &&
7474 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) &&
7478 AsmString =
"tst $\x02, $\x03";
7484 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) &&
7486 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2)) {
7488 AsmString =
"tst $\x02, $\x03$\xFF\x04\x02";
7493 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
7495 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) &&
7497 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) &&
7501 AsmString =
"ands $\x01, $\x02, $\x03";
7505 case AArch64_ANDWrs:
7508 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
7510 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) &&
7512 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2) &&
7516 AsmString =
"and $\x01, $\x02, $\x03";
7520 case AArch64_ANDXrs:
7523 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
7525 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) &&
7527 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) &&
7531 AsmString =
"and $\x01, $\x02, $\x03";
7535 case AArch64_BICSWrs:
7538 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
7540 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) &&
7542 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2) &&
7546 AsmString =
"bics $\x01, $\x02, $\x03";
7550 case AArch64_BICSXrs:
7553 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
7555 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) &&
7557 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) &&
7561 AsmString =
"bics $\x01, $\x02, $\x03";
7565 case AArch64_BICWrs:
7568 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
7570 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) &&
7572 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2) &&
7576 AsmString =
"bic $\x01, $\x02, $\x03";
7580 case AArch64_BICXrs:
7583 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
7585 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) &&
7587 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) &&
7591 AsmString =
"bic $\x01, $\x02, $\x03";
7595 case AArch64_BICv2i32:
7598 GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 0) &&
7602 AsmString =
"bic $\xFF\x01\x06.2s, $\xFF\x02\x07";
7606 case AArch64_BICv4i16:
7609 GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 0) &&
7613 AsmString =
"bic $\xFF\x01\x06.4h, $\xFF\x02\x07";
7617 case AArch64_BICv4i32:
7620 GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 0) &&
7624 AsmString =
"bic $\xFF\x01\x06.4s, $\xFF\x02\x07";
7628 case AArch64_BICv8i16:
7631 GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 0) &&
7635 AsmString =
"bic $\xFF\x01\x06.8h, $\xFF\x02\x07";
7644 AsmString =
"clrex";
7648 case AArch64_CSINCWr:
7651 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
7656 AsmString =
"cset $\x01, $\xFF\x04\x08";
7661 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
7663 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) &&
7668 AsmString =
"cinc $\x01, $\x02, $\xFF\x04\x08";
7672 case AArch64_CSINCXr:
7675 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
7680 AsmString =
"cset $\x01, $\xFF\x04\x08";
7685 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
7687 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) &&
7692 AsmString =
"cinc $\x01, $\x02, $\xFF\x04\x08";
7696 case AArch64_CSINVWr:
7699 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
7704 AsmString =
"csetm $\x01, $\xFF\x04\x08";
7709 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
7711 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) &&
7716 AsmString =
"cinv $\x01, $\x02, $\xFF\x04\x08";
7720 case AArch64_CSINVXr:
7723 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
7728 AsmString =
"csetm $\x01, $\xFF\x04\x08";
7733 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
7735 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) &&
7740 AsmString =
"cinv $\x01, $\x02, $\xFF\x04\x08";
7744 case AArch64_CSNEGWr:
7747 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
7749 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) &&
7754 AsmString =
"cneg $\x01, $\x02, $\xFF\x04\x08";
7758 case AArch64_CSNEGXr:
7761 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
7763 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) &&
7768 AsmString =
"cneg $\x01, $\x02, $\xFF\x04\x08";
7777 AsmString =
"dcps1";
7786 AsmString =
"dcps2";
7795 AsmString =
"dcps3";
7799 case AArch64_EONWrs:
7802 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
7804 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) &&
7806 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2) &&
7810 AsmString =
"eon $\x01, $\x02, $\x03";
7814 case AArch64_EONXrs:
7817 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
7819 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) &&
7821 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) &&
7825 AsmString =
"eon $\x01, $\x02, $\x03";
7829 case AArch64_EORWrs:
7832 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
7834 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) &&
7836 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2) &&
7840 AsmString =
"eor $\x01, $\x02, $\x03";
7844 case AArch64_EORXrs:
7847 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
7849 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) &&
7851 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) &&
7855 AsmString =
"eor $\x01, $\x02, $\x03";
7859 case AArch64_EXTRWrri:
7862 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
7864 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) &&
7868 AsmString =
"ror $\x01, $\x02, $\x04";
7872 case AArch64_EXTRXrri:
7875 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
7877 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) &&
7881 AsmString =
"ror $\x01, $\x02, $\x04";
7897 AsmString =
"yield";
7929 case AArch64_INSvi16gpr:
7932 GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 0) &&
7934 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2)) {
7936 AsmString =
"mov $\xFF\x01\x06.h$\xFF\x02\x09, $\x03";
7940 case AArch64_INSvi16lane:
7943 GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 0) &&
7945 GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 2)) {
7947 AsmString =
"mov $\xFF\x01\x06.h$\xFF\x02\x09, $\xFF\x03\x06.h$\xFF\x04\x09";
7951 case AArch64_INSvi32gpr:
7954 GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 0) &&
7956 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2)) {
7958 AsmString =
"mov $\xFF\x01\x06.s$\xFF\x02\x09, $\x03";
7962 case AArch64_INSvi32lane:
7965 GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 0) &&
7967 GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 2)) {
7969 AsmString =
"mov $\xFF\x01\x06.s$\xFF\x02\x09, $\xFF\x03\x06.s$\xFF\x04\x09";
7973 case AArch64_INSvi64gpr:
7976 GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 0) &&
7978 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2)) {
7980 AsmString =
"mov $\xFF\x01\x06.d$\xFF\x02\x09, $\x03";
7984 case AArch64_INSvi64lane:
7987 GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 0) &&
7989 GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 2)) {
7991 AsmString =
"mov $\xFF\x01\x06.d$\xFF\x02\x09, $\xFF\x03\x06.d$\xFF\x04\x09";
7995 case AArch64_INSvi8gpr:
7998 GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 0) &&
8000 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2)) {
8002 AsmString =
"mov $\xFF\x01\x06.b$\xFF\x02\x09, $\x03";
8006 case AArch64_INSvi8lane:
8009 GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 0) &&
8011 GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 2)) {
8013 AsmString =
"mov $\xFF\x01\x06.b$\xFF\x02\x09, $\xFF\x03\x06.b$\xFF\x04\x09";
8026 case AArch64_LD1Fourv16b_POST:
8029 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
8031 GETREGCLASS_CONTAIN(AArch64_QQQQRegClassID, 1) &&
8034 AsmString =
"ld1 $\xFF\x02\x0A, [$\x01], #64";
8038 case AArch64_LD1Fourv1d_POST:
8041 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
8043 GETREGCLASS_CONTAIN(AArch64_DDDDRegClassID, 1) &&
8046 AsmString =
"ld1 $\xFF\x02\x0B, [$\x01], #32";
8050 case AArch64_LD1Fourv2d_POST:
8053 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
8055 GETREGCLASS_CONTAIN(AArch64_QQQQRegClassID, 1) &&
8058 AsmString =
"ld1 $\xFF\x02\x0C, [$\x01], #64";
8062 case AArch64_LD1Fourv2s_POST:
8065 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
8067 GETREGCLASS_CONTAIN(AArch64_DDDDRegClassID, 1) &&
8070 AsmString =
"ld1 $\xFF\x02\x0D, [$\x01], #32";
8074 case AArch64_LD1Fourv4h_POST:
8077 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
8079 GETREGCLASS_CONTAIN(AArch64_DDDDRegClassID, 1) &&
8082 AsmString =
"ld1 $\xFF\x02\x0E, [$\x01], #32";
8086 case AArch64_LD1Fourv4s_POST:
8089 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
8091 GETREGCLASS_CONTAIN(AArch64_QQQQRegClassID, 1) &&
8094 AsmString =
"ld1 $\xFF\x02\x0F, [$\x01], #64";
8098 case AArch64_LD1Fourv8b_POST:
8101 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
8103 GETREGCLASS_CONTAIN(AArch64_DDDDRegClassID, 1) &&
8106 AsmString =
"ld1 $\xFF\x02\x10, [$\x01], #32";
8110 case AArch64_LD1Fourv8h_POST:
8113 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
8115 GETREGCLASS_CONTAIN(AArch64_QQQQRegClassID, 1) &&
8118 AsmString =
"ld1 $\xFF\x02\x11, [$\x01], #64";
8122 case AArch64_LD1Onev16b_POST:
8125 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
8127 GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 1) &&
8130 AsmString =
"ld1 $\xFF\x02\x0A, [$\x01], #16";
8134 case AArch64_LD1Onev1d_POST:
8137 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
8139 GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 1) &&
8142 AsmString =
"ld1 $\xFF\x02\x0B, [$\x01], #8";
8146 case AArch64_LD1Onev2d_POST:
8149 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
8151 GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 1) &&
8154 AsmString =
"ld1 $\xFF\x02\x0C, [$\x01], #16";
8158 case AArch64_LD1Onev2s_POST:
8161 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
8163 GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 1) &&
8166 AsmString =
"ld1 $\xFF\x02\x0D, [$\x01], #8";
8170 case AArch64_LD1Onev4h_POST:
8173 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
8175 GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 1) &&
8178 AsmString =
"ld1 $\xFF\x02\x0E, [$\x01], #8";
8182 case AArch64_LD1Onev4s_POST:
8185 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
8187 GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 1) &&
8190 AsmString =
"ld1 $\xFF\x02\x0F, [$\x01], #16";
8194 case AArch64_LD1Onev8b_POST:
8197 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
8199 GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 1) &&
8202 AsmString =
"ld1 $\xFF\x02\x10, [$\x01], #8";
8206 case AArch64_LD1Onev8h_POST:
8209 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
8211 GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 1) &&
8214 AsmString =
"ld1 $\xFF\x02\x11, [$\x01], #16";
8218 case AArch64_LD1Rv16b_POST:
8221 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
8223 GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 1) &&
8226 AsmString =
"ld1r $\xFF\x02\x0A, [$\x01], #1";
8230 case AArch64_LD1Rv1d_POST:
8233 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
8235 GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 1) &&
8238 AsmString =
"ld1r $\xFF\x02\x0B, [$\x01], #8";
8242 case AArch64_LD1Rv2d_POST:
8245 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
8247 GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 1) &&
8250 AsmString =
"ld1r $\xFF\x02\x0C, [$\x01], #8";
8254 case AArch64_LD1Rv2s_POST:
8257 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
8259 GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 1) &&
8262 AsmString =
"ld1r $\xFF\x02\x0D, [$\x01], #4";
8266 case AArch64_LD1Rv4h_POST:
8269 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
8271 GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 1) &&
8274 AsmString =
"ld1r $\xFF\x02\x0E, [$\x01], #2";
8278 case AArch64_LD1Rv4s_POST:
8281 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
8283 GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 1) &&
8286 AsmString =
"ld1r $\xFF\x02\x0F, [$\x01], #4";
8290 case AArch64_LD1Rv8b_POST:
8293 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
8295 GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 1) &&
8298 AsmString =
"ld1r $\xFF\x02\x10, [$\x01], #1";
8302 case AArch64_LD1Rv8h_POST:
8305 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
8307 GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 1) &&
8310 AsmString =
"ld1r $\xFF\x02\x11, [$\x01], #2";
8314 case AArch64_LD1Threev16b_POST:
8317 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
8319 GETREGCLASS_CONTAIN(AArch64_QQQRegClassID, 1) &&
8322 AsmString =
"ld1 $\xFF\x02\x0A, [$\x01], #48";
8326 case AArch64_LD1Threev1d_POST:
8329 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
8331 GETREGCLASS_CONTAIN(AArch64_DDDRegClassID, 1) &&
8334 AsmString =
"ld1 $\xFF\x02\x0B, [$\x01], #24";
8338 case AArch64_LD1Threev2d_POST:
8341 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
8343 GETREGCLASS_CONTAIN(AArch64_QQQRegClassID, 1) &&
8346 AsmString =
"ld1 $\xFF\x02\x0C, [$\x01], #48";
8350 case AArch64_LD1Threev2s_POST:
8353 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
8355 GETREGCLASS_CONTAIN(AArch64_DDDRegClassID, 1) &&
8358 AsmString =
"ld1 $\xFF\x02\x0D, [$\x01], #24";
8362 case AArch64_LD1Threev4h_POST:
8365 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
8367 GETREGCLASS_CONTAIN(AArch64_DDDRegClassID, 1) &&
8370 AsmString =
"ld1 $\xFF\x02\x0E, [$\x01], #24";
8374 case AArch64_LD1Threev4s_POST:
8377 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
8379 GETREGCLASS_CONTAIN(AArch64_QQQRegClassID, 1) &&
8382 AsmString =
"ld1 $\xFF\x02\x0F, [$\x01], #48";
8386 case AArch64_LD1Threev8b_POST:
8389 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
8391 GETREGCLASS_CONTAIN(AArch64_DDDRegClassID, 1) &&
8394 AsmString =
"ld1 $\xFF\x02\x10, [$\x01], #24";
8398 case AArch64_LD1Threev8h_POST:
8401 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
8403 GETREGCLASS_CONTAIN(AArch64_QQQRegClassID, 1) &&
8406 AsmString =
"ld1 $\xFF\x02\x11, [$\x01], #48";
8410 case AArch64_LD1Twov16b_POST:
8413 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
8415 GETREGCLASS_CONTAIN(AArch64_QQRegClassID, 1) &&
8418 AsmString =
"ld1 $\xFF\x02\x0A, [$\x01], #32";
8422 case AArch64_LD1Twov1d_POST:
8425 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
8427 GETREGCLASS_CONTAIN(AArch64_DDRegClassID, 1) &&
8430 AsmString =
"ld1 $\xFF\x02\x0B, [$\x01], #16";
8434 case AArch64_LD1Twov2d_POST:
8437 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
8439 GETREGCLASS_CONTAIN(AArch64_QQRegClassID, 1) &&
8442 AsmString =
"ld1 $\xFF\x02\x0C, [$\x01], #32";
8446 case AArch64_LD1Twov2s_POST:
8449 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
8451 GETREGCLASS_CONTAIN(AArch64_DDRegClassID, 1) &&
8454 AsmString =
"ld1 $\xFF\x02\x0D, [$\x01], #16";
8458 case AArch64_LD1Twov4h_POST:
8461 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
8463 GETREGCLASS_CONTAIN(AArch64_DDRegClassID, 1) &&
8466 AsmString =
"ld1 $\xFF\x02\x0E, [$\x01], #16";
8470 case AArch64_LD1Twov4s_POST:
8473 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
8475 GETREGCLASS_CONTAIN(AArch64_QQRegClassID, 1) &&
8478 AsmString =
"ld1 $\xFF\x02\x0F, [$\x01], #32";
8482 case AArch64_LD1Twov8b_POST:
8485 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
8487 GETREGCLASS_CONTAIN(AArch64_DDRegClassID, 1) &&
8490 AsmString =
"ld1 $\xFF\x02\x10, [$\x01], #16";
8494 case AArch64_LD1Twov8h_POST:
8497 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
8499 GETREGCLASS_CONTAIN(AArch64_QQRegClassID, 1) &&
8502 AsmString =
"ld1 $\xFF\x02\x11, [$\x01], #32";
8506 case AArch64_LD1i16_POST:
8509 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
8511 GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 1) &&
8514 AsmString =
"ld1 $\xFF\x02\x12$\xFF\x03\x09, [$\x01], #2";
8518 case AArch64_LD1i32_POST:
8521 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
8523 GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 1) &&
8526 AsmString =
"ld1 $\xFF\x02\x13$\xFF\x03\x09, [$\x01], #4";
8530 case AArch64_LD1i64_POST:
8533 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
8535 GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 1) &&
8538 AsmString =
"ld1 $\xFF\x02\x14$\xFF\x03\x09, [$\x01], #8";
8542 case AArch64_LD1i8_POST:
8545 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
8547 GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 1) &&
8550 AsmString =
"ld1 $\xFF\x02\x15$\xFF\x03\x09, [$\x01], #1";
8554 case AArch64_LD2Rv16b_POST:
8557 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
8559 GETREGCLASS_CONTAIN(AArch64_QQRegClassID, 1) &&
8562 AsmString =
"ld2r $\xFF\x02\x0A, [$\x01], #2";
8566 case AArch64_LD2Rv1d_POST:
8569 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
8571 GETREGCLASS_CONTAIN(AArch64_DDRegClassID, 1) &&
8574 AsmString =
"ld2r $\xFF\x02\x0B, [$\x01], #16";
8578 case AArch64_LD2Rv2d_POST:
8581 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
8583 GETREGCLASS_CONTAIN(AArch64_QQRegClassID, 1) &&
8586 AsmString =
"ld2r $\xFF\x02\x0C, [$\x01], #16";
8590 case AArch64_LD2Rv2s_POST:
8593 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
8595 GETREGCLASS_CONTAIN(AArch64_DDRegClassID, 1) &&
8598 AsmString =
"ld2r $\xFF\x02\x0D, [$\x01], #8";
8602 case AArch64_LD2Rv4h_POST:
8605 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
8607 GETREGCLASS_CONTAIN(AArch64_DDRegClassID, 1) &&
8610 AsmString =
"ld2r $\xFF\x02\x0E, [$\x01], #4";
8614 case AArch64_LD2Rv4s_POST:
8617 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
8619 GETREGCLASS_CONTAIN(AArch64_QQRegClassID, 1) &&
8622 AsmString =
"ld2r $\xFF\x02\x0F, [$\x01], #8";
8626 case AArch64_LD2Rv8b_POST:
8629 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
8631 GETREGCLASS_CONTAIN(AArch64_DDRegClassID, 1) &&
8634 AsmString =
"ld2r $\xFF\x02\x10, [$\x01], #2";
8638 case AArch64_LD2Rv8h_POST:
8641 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
8643 GETREGCLASS_CONTAIN(AArch64_QQRegClassID, 1) &&
8646 AsmString =
"ld2r $\xFF\x02\x11, [$\x01], #4";
8650 case AArch64_LD2Twov16b_POST:
8653 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
8655 GETREGCLASS_CONTAIN(AArch64_QQRegClassID, 1) &&
8658 AsmString =
"ld2 $\xFF\x02\x0A, [$\x01], #32";
8662 case AArch64_LD2Twov2d_POST:
8665 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
8667 GETREGCLASS_CONTAIN(AArch64_QQRegClassID, 1) &&
8670 AsmString =
"ld2 $\xFF\x02\x0C, [$\x01], #32";
8674 case AArch64_LD2Twov2s_POST:
8677 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
8679 GETREGCLASS_CONTAIN(AArch64_DDRegClassID, 1) &&
8682 AsmString =
"ld2 $\xFF\x02\x0D, [$\x01], #16";
8686 case AArch64_LD2Twov4h_POST:
8689 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
8691 GETREGCLASS_CONTAIN(AArch64_DDRegClassID, 1) &&
8694 AsmString =
"ld2 $\xFF\x02\x0E, [$\x01], #16";
8698 case AArch64_LD2Twov4s_POST:
8701 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
8703 GETREGCLASS_CONTAIN(AArch64_QQRegClassID, 1) &&
8706 AsmString =
"ld2 $\xFF\x02\x0F, [$\x01], #32";
8710 case AArch64_LD2Twov8b_POST:
8713 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
8715 GETREGCLASS_CONTAIN(AArch64_DDRegClassID, 1) &&
8718 AsmString =
"ld2 $\xFF\x02\x10, [$\x01], #16";
8722 case AArch64_LD2Twov8h_POST:
8725 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
8727 GETREGCLASS_CONTAIN(AArch64_QQRegClassID, 1) &&
8730 AsmString =
"ld2 $\xFF\x02\x11, [$\x01], #32";
8734 case AArch64_LD2i16_POST:
8737 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
8739 GETREGCLASS_CONTAIN(AArch64_QQRegClassID, 1) &&
8742 AsmString =
"ld2 $\xFF\x02\x12$\xFF\x03\x09, [$\x01], #4";
8746 case AArch64_LD2i32_POST:
8749 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
8751 GETREGCLASS_CONTAIN(AArch64_QQRegClassID, 1) &&
8754 AsmString =
"ld2 $\xFF\x02\x13$\xFF\x03\x09, [$\x01], #8";
8758 case AArch64_LD2i64_POST:
8761 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
8763 GETREGCLASS_CONTAIN(AArch64_QQRegClassID, 1) &&
8766 AsmString =
"ld2 $\xFF\x02\x14$\xFF\x03\x09, [$\x01], #16";
8770 case AArch64_LD2i8_POST:
8773 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
8775 GETREGCLASS_CONTAIN(AArch64_QQRegClassID, 1) &&
8778 AsmString =
"ld2 $\xFF\x02\x15$\xFF\x03\x09, [$\x01], #2";
8782 case AArch64_LD3Rv16b_POST:
8785 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
8787 GETREGCLASS_CONTAIN(AArch64_QQQRegClassID, 1) &&
8790 AsmString =
"ld3r $\xFF\x02\x0A, [$\x01], #3";
8794 case AArch64_LD3Rv1d_POST:
8797 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
8799 GETREGCLASS_CONTAIN(AArch64_DDDRegClassID, 1) &&
8802 AsmString =
"ld3r $\xFF\x02\x0B, [$\x01], #24";
8806 case AArch64_LD3Rv2d_POST:
8809 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
8811 GETREGCLASS_CONTAIN(AArch64_QQQRegClassID, 1) &&
8814 AsmString =
"ld3r $\xFF\x02\x0C, [$\x01], #24";
8818 case AArch64_LD3Rv2s_POST:
8821 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
8823 GETREGCLASS_CONTAIN(AArch64_DDDRegClassID, 1) &&
8826 AsmString =
"ld3r $\xFF\x02\x0D, [$\x01], #12";
8830 case AArch64_LD3Rv4h_POST:
8833 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
8835 GETREGCLASS_CONTAIN(AArch64_DDDRegClassID, 1) &&
8838 AsmString =
"ld3r $\xFF\x02\x0E, [$\x01], #6";
8842 case AArch64_LD3Rv4s_POST:
8845 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
8847 GETREGCLASS_CONTAIN(AArch64_QQQRegClassID, 1) &&
8850 AsmString =
"ld3r $\xFF\x02\x0F, [$\x01], #12";
8854 case AArch64_LD3Rv8b_POST:
8857 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
8859 GETREGCLASS_CONTAIN(AArch64_DDDRegClassID, 1) &&
8862 AsmString =
"ld3r $\xFF\x02\x10, [$\x01], #3";
8866 case AArch64_LD3Rv8h_POST:
8869 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
8871 GETREGCLASS_CONTAIN(AArch64_QQQRegClassID, 1) &&
8874 AsmString =
"ld3r $\xFF\x02\x11, [$\x01], #6";
8878 case AArch64_LD3Threev16b_POST:
8881 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
8883 GETREGCLASS_CONTAIN(AArch64_QQQRegClassID, 1) &&
8886 AsmString =
"ld3 $\xFF\x02\x0A, [$\x01], #48";
8890 case AArch64_LD3Threev2d_POST:
8893 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
8895 GETREGCLASS_CONTAIN(AArch64_QQQRegClassID, 1) &&
8898 AsmString =
"ld3 $\xFF\x02\x0C, [$\x01], #48";
8902 case AArch64_LD3Threev2s_POST:
8905 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
8907 GETREGCLASS_CONTAIN(AArch64_DDDRegClassID, 1) &&
8910 AsmString =
"ld3 $\xFF\x02\x0D, [$\x01], #24";
8914 case AArch64_LD3Threev4h_POST:
8917 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
8919 GETREGCLASS_CONTAIN(AArch64_DDDRegClassID, 1) &&
8922 AsmString =
"ld3 $\xFF\x02\x0E, [$\x01], #24";
8926 case AArch64_LD3Threev4s_POST:
8929 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
8931 GETREGCLASS_CONTAIN(AArch64_QQQRegClassID, 1) &&
8934 AsmString =
"ld3 $\xFF\x02\x0F, [$\x01], #48";
8938 case AArch64_LD3Threev8b_POST:
8941 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
8943 GETREGCLASS_CONTAIN(AArch64_DDDRegClassID, 1) &&
8946 AsmString =
"ld3 $\xFF\x02\x10, [$\x01], #24";
8950 case AArch64_LD3Threev8h_POST:
8953 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
8955 GETREGCLASS_CONTAIN(AArch64_QQQRegClassID, 1) &&
8958 AsmString =
"ld3 $\xFF\x02\x11, [$\x01], #48";
8962 case AArch64_LD3i16_POST:
8965 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
8967 GETREGCLASS_CONTAIN(AArch64_QQQRegClassID, 1) &&
8970 AsmString =
"ld3 $\xFF\x02\x12$\xFF\x03\x09, [$\x01], #6";
8974 case AArch64_LD3i32_POST:
8977 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
8979 GETREGCLASS_CONTAIN(AArch64_QQQRegClassID, 1) &&
8982 AsmString =
"ld3 $\xFF\x02\x13$\xFF\x03\x09, [$\x01], #12";
8986 case AArch64_LD3i64_POST:
8989 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
8991 GETREGCLASS_CONTAIN(AArch64_QQQRegClassID, 1) &&
8994 AsmString =
"ld3 $\xFF\x02\x14$\xFF\x03\x09, [$\x01], #24";
8998 case AArch64_LD3i8_POST:
9001 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
9003 GETREGCLASS_CONTAIN(AArch64_QQQRegClassID, 1) &&
9006 AsmString =
"ld3 $\xFF\x02\x15$\xFF\x03\x09, [$\x01], #3";
9010 case AArch64_LD4Fourv16b_POST:
9013 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
9015 GETREGCLASS_CONTAIN(AArch64_QQQQRegClassID, 1) &&
9018 AsmString =
"ld4 $\xFF\x02\x0A, [$\x01], #64";
9022 case AArch64_LD4Fourv2d_POST:
9025 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
9027 GETREGCLASS_CONTAIN(AArch64_QQQQRegClassID, 1) &&
9030 AsmString =
"ld4 $\xFF\x02\x0C, [$\x01], #64";
9034 case AArch64_LD4Fourv2s_POST:
9037 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
9039 GETREGCLASS_CONTAIN(AArch64_DDDDRegClassID, 1) &&
9042 AsmString =
"ld4 $\xFF\x02\x0D, [$\x01], #32";
9046 case AArch64_LD4Fourv4h_POST:
9049 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
9051 GETREGCLASS_CONTAIN(AArch64_DDDDRegClassID, 1) &&
9054 AsmString =
"ld4 $\xFF\x02\x0E, [$\x01], #32";
9058 case AArch64_LD4Fourv4s_POST:
9061 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
9063 GETREGCLASS_CONTAIN(AArch64_QQQQRegClassID, 1) &&
9066 AsmString =
"ld4 $\xFF\x02\x0F, [$\x01], #64";
9070 case AArch64_LD4Fourv8b_POST:
9073 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
9075 GETREGCLASS_CONTAIN(AArch64_DDDDRegClassID, 1) &&
9078 AsmString =
"ld4 $\xFF\x02\x10, [$\x01], #32";
9082 case AArch64_LD4Fourv8h_POST:
9085 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
9087 GETREGCLASS_CONTAIN(AArch64_QQQQRegClassID, 1) &&
9090 AsmString =
"ld4 $\xFF\x02\x11, [$\x01], #64";
9094 case AArch64_LD4Rv16b_POST:
9097 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
9099 GETREGCLASS_CONTAIN(AArch64_QQQQRegClassID, 1) &&
9102 AsmString =
"ld4r $\xFF\x02\x0A, [$\x01], #4";
9106 case AArch64_LD4Rv1d_POST:
9109 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
9111 GETREGCLASS_CONTAIN(AArch64_DDDDRegClassID, 1) &&
9114 AsmString =
"ld4r $\xFF\x02\x0B, [$\x01], #32";
9118 case AArch64_LD4Rv2d_POST:
9121 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
9123 GETREGCLASS_CONTAIN(AArch64_QQQQRegClassID, 1) &&
9126 AsmString =
"ld4r $\xFF\x02\x0C, [$\x01], #32";
9130 case AArch64_LD4Rv2s_POST:
9133 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
9135 GETREGCLASS_CONTAIN(AArch64_DDDDRegClassID, 1) &&
9138 AsmString =
"ld4r $\xFF\x02\x0D, [$\x01], #16";
9142 case AArch64_LD4Rv4h_POST:
9145 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
9147 GETREGCLASS_CONTAIN(AArch64_DDDDRegClassID, 1) &&
9150 AsmString =
"ld4r $\xFF\x02\x0E, [$\x01], #8";
9154 case AArch64_LD4Rv4s_POST:
9157 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
9159 GETREGCLASS_CONTAIN(AArch64_QQQQRegClassID, 1) &&
9162 AsmString =
"ld4r $\xFF\x02\x0F, [$\x01], #16";
9166 case AArch64_LD4Rv8b_POST:
9169 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
9171 GETREGCLASS_CONTAIN(AArch64_DDDDRegClassID, 1) &&
9174 AsmString =
"ld4r $\xFF\x02\x10, [$\x01], #4";
9178 case AArch64_LD4Rv8h_POST:
9181 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
9183 GETREGCLASS_CONTAIN(AArch64_QQQQRegClassID, 1) &&
9186 AsmString =
"ld4r $\xFF\x02\x11, [$\x01], #8";
9190 case AArch64_LD4i16_POST:
9193 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
9195 GETREGCLASS_CONTAIN(AArch64_QQQQRegClassID, 1) &&
9198 AsmString =
"ld4 $\xFF\x02\x12$\xFF\x03\x09, [$\x01], #8";
9202 case AArch64_LD4i32_POST:
9205 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
9207 GETREGCLASS_CONTAIN(AArch64_QQQQRegClassID, 1) &&
9210 AsmString =
"ld4 $\xFF\x02\x13$\xFF\x03\x09, [$\x01], #16";
9214 case AArch64_LD4i64_POST:
9217 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
9219 GETREGCLASS_CONTAIN(AArch64_QQQQRegClassID, 1) &&
9222 AsmString =
"ld4 $\xFF\x02\x14$\xFF\x03\x09, [$\x01], #32";
9226 case AArch64_LD4i8_POST:
9229 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
9231 GETREGCLASS_CONTAIN(AArch64_QQQQRegClassID, 1) &&
9234 AsmString =
"ld4 $\xFF\x02\x15$\xFF\x03\x09, [$\x01], #4";
9238 case AArch64_LDNPDi:
9241 GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 0) &&
9243 GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 1) &&
9245 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 2) &&
9249 AsmString =
"ldnp $\x01, $\x02, [$\x03]";
9253 case AArch64_LDNPQi:
9256 GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 0) &&
9258 GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 1) &&
9260 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 2) &&
9264 AsmString =
"ldnp $\x01, $\x02, [$\x03]";
9268 case AArch64_LDNPSi:
9271 GETREGCLASS_CONTAIN(AArch64_FPR32RegClassID, 0) &&
9273 GETREGCLASS_CONTAIN(AArch64_FPR32RegClassID, 1) &&
9275 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 2) &&
9279 AsmString =
"ldnp $\x01, $\x02, [$\x03]";
9283 case AArch64_LDNPWi:
9286 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
9288 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) &&
9290 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 2) &&
9294 AsmString =
"ldnp $\x01, $\x02, [$\x03]";
9298 case AArch64_LDNPXi:
9301 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
9303 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) &&
9305 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 2) &&
9309 AsmString =
"ldnp $\x01, $\x02, [$\x03]";
9316 GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 0) &&
9318 GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 1) &&
9320 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 2) &&
9324 AsmString =
"ldp $\x01, $\x02, [$\x03]";
9331 GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 0) &&
9333 GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 1) &&
9335 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 2) &&
9339 AsmString =
"ldp $\x01, $\x02, [$\x03]";
9343 case AArch64_LDPSWi:
9346 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
9348 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) &&
9350 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 2) &&
9354 AsmString =
"ldpsw $\x01, $\x02, [$\x03]";
9361 GETREGCLASS_CONTAIN(AArch64_FPR32RegClassID, 0) &&
9363 GETREGCLASS_CONTAIN(AArch64_FPR32RegClassID, 1) &&
9365 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 2) &&
9369 AsmString =
"ldp $\x01, $\x02, [$\x03]";
9376 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
9378 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) &&
9380 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 2) &&
9384 AsmString =
"ldp $\x01, $\x02, [$\x03]";
9391 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
9393 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) &&
9395 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 2) &&
9399 AsmString =
"ldp $\x01, $\x02, [$\x03]";
9403 case AArch64_LDRBBroX:
9406 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
9408 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
9410 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) &&
9416 AsmString =
"ldrb $\x01, [$\x02, $\x03]";
9420 case AArch64_LDRBBui:
9423 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
9425 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
9429 AsmString =
"ldrb $\x01, [$\x02]";
9433 case AArch64_LDRBroX:
9436 GETREGCLASS_CONTAIN(AArch64_FPR8RegClassID, 0) &&
9438 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
9440 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) &&
9446 AsmString =
"ldr $\x01, [$\x02, $\x03]";
9450 case AArch64_LDRBui:
9453 GETREGCLASS_CONTAIN(AArch64_FPR8RegClassID, 0) &&
9455 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
9459 AsmString =
"ldr $\x01, [$\x02]";
9463 case AArch64_LDRDroX:
9466 GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 0) &&
9468 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
9470 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) &&
9476 AsmString =
"ldr $\x01, [$\x02, $\x03]";
9480 case AArch64_LDRDui:
9483 GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 0) &&
9485 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
9489 AsmString =
"ldr $\x01, [$\x02]";
9493 case AArch64_LDRHHroX:
9496 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
9498 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
9500 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) &&
9506 AsmString =
"ldrh $\x01, [$\x02, $\x03]";
9510 case AArch64_LDRHHui:
9513 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
9515 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
9519 AsmString =
"ldrh $\x01, [$\x02]";
9523 case AArch64_LDRHroX:
9526 GETREGCLASS_CONTAIN(AArch64_FPR16RegClassID, 0) &&
9528 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
9530 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) &&
9536 AsmString =
"ldr $\x01, [$\x02, $\x03]";
9540 case AArch64_LDRHui:
9543 GETREGCLASS_CONTAIN(AArch64_FPR16RegClassID, 0) &&
9545 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
9549 AsmString =
"ldr $\x01, [$\x02]";
9553 case AArch64_LDRQroX:
9556 GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 0) &&
9558 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
9560 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) &&
9566 AsmString =
"ldr $\x01, [$\x02, $\x03]";
9570 case AArch64_LDRQui:
9573 GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 0) &&
9575 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
9579 AsmString =
"ldr $\x01, [$\x02]";
9583 case AArch64_LDRSBWroX:
9586 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
9588 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
9590 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) &&
9596 AsmString =
"ldrsb $\x01, [$\x02, $\x03]";
9600 case AArch64_LDRSBWui:
9603 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
9605 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
9609 AsmString =
"ldrsb $\x01, [$\x02]";
9613 case AArch64_LDRSBXroX:
9616 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
9618 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
9620 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) &&
9626 AsmString =
"ldrsb $\x01, [$\x02, $\x03]";
9630 case AArch64_LDRSBXui:
9633 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
9635 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
9639 AsmString =
"ldrsb $\x01, [$\x02]";
9643 case AArch64_LDRSHWroX:
9646 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
9648 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
9650 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) &&
9656 AsmString =
"ldrsh $\x01, [$\x02, $\x03]";
9660 case AArch64_LDRSHWui:
9663 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
9665 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
9669 AsmString =
"ldrsh $\x01, [$\x02]";
9673 case AArch64_LDRSHXroX:
9676 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
9678 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
9680 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) &&
9686 AsmString =
"ldrsh $\x01, [$\x02, $\x03]";
9690 case AArch64_LDRSHXui:
9693 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
9695 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
9699 AsmString =
"ldrsh $\x01, [$\x02]";
9703 case AArch64_LDRSWroX:
9706 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
9708 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
9710 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) &&
9716 AsmString =
"ldrsw $\x01, [$\x02, $\x03]";
9720 case AArch64_LDRSWui:
9723 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
9725 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
9729 AsmString =
"ldrsw $\x01, [$\x02]";
9733 case AArch64_LDRSroX:
9736 GETREGCLASS_CONTAIN(AArch64_FPR32RegClassID, 0) &&
9738 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
9740 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) &&
9746 AsmString =
"ldr $\x01, [$\x02, $\x03]";
9750 case AArch64_LDRSui:
9753 GETREGCLASS_CONTAIN(AArch64_FPR32RegClassID, 0) &&
9755 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
9759 AsmString =
"ldr $\x01, [$\x02]";
9763 case AArch64_LDRWroX:
9766 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
9768 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
9770 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) &&
9776 AsmString =
"ldr $\x01, [$\x02, $\x03]";
9780 case AArch64_LDRWui:
9783 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
9785 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
9789 AsmString =
"ldr $\x01, [$\x02]";
9793 case AArch64_LDRXroX:
9796 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
9798 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
9800 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) &&
9806 AsmString =
"ldr $\x01, [$\x02, $\x03]";
9810 case AArch64_LDRXui:
9813 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
9815 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
9819 AsmString =
"ldr $\x01, [$\x02]";
9823 case AArch64_LDTRBi:
9826 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
9828 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
9832 AsmString =
"ldtrb $\x01, [$\x02]";
9836 case AArch64_LDTRHi:
9839 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
9841 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
9845 AsmString =
"ldtrh $\x01, [$\x02]";
9849 case AArch64_LDTRSBWi:
9852 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
9854 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
9858 AsmString =
"ldtrsb $\x01, [$\x02]";
9862 case AArch64_LDTRSBXi:
9865 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
9867 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
9871 AsmString =
"ldtrsb $\x01, [$\x02]";
9875 case AArch64_LDTRSHWi:
9878 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
9880 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
9884 AsmString =
"ldtrsh $\x01, [$\x02]";
9888 case AArch64_LDTRSHXi:
9891 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
9893 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
9897 AsmString =
"ldtrsh $\x01, [$\x02]";
9901 case AArch64_LDTRSWi:
9904 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
9906 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
9910 AsmString =
"ldtrsw $\x01, [$\x02]";
9914 case AArch64_LDTRWi:
9917 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
9919 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
9923 AsmString =
"ldtr $\x01, [$\x02]";
9927 case AArch64_LDTRXi:
9930 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
9932 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
9936 AsmString =
"ldtr $\x01, [$\x02]";
9940 case AArch64_LDURBBi:
9943 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
9945 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
9949 AsmString =
"ldurb $\x01, [$\x02]";
9953 case AArch64_LDURBi:
9956 GETREGCLASS_CONTAIN(AArch64_FPR8RegClassID, 0) &&
9958 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
9962 AsmString =
"ldur $\x01, [$\x02]";
9966 case AArch64_LDURDi:
9969 GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 0) &&
9971 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
9975 AsmString =
"ldur $\x01, [$\x02]";
9979 case AArch64_LDURHHi:
9982 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
9984 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
9988 AsmString =
"ldurh $\x01, [$\x02]";
9992 case AArch64_LDURHi:
9995 GETREGCLASS_CONTAIN(AArch64_FPR16RegClassID, 0) &&
9997 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
10001 AsmString =
"ldur $\x01, [$\x02]";
10005 case AArch64_LDURQi:
10008 GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 0) &&
10010 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
10014 AsmString =
"ldur $\x01, [$\x02]";
10018 case AArch64_LDURSBWi:
10021 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
10023 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
10027 AsmString =
"ldursb $\x01, [$\x02]";
10031 case AArch64_LDURSBXi:
10034 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
10036 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
10040 AsmString =
"ldursb $\x01, [$\x02]";
10044 case AArch64_LDURSHWi:
10047 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
10049 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
10053 AsmString =
"ldursh $\x01, [$\x02]";
10057 case AArch64_LDURSHXi:
10060 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
10062 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
10066 AsmString =
"ldursh $\x01, [$\x02]";
10070 case AArch64_LDURSWi:
10073 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
10075 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
10079 AsmString =
"ldursw $\x01, [$\x02]";
10083 case AArch64_LDURSi:
10086 GETREGCLASS_CONTAIN(AArch64_FPR32RegClassID, 0) &&
10088 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
10092 AsmString =
"ldur $\x01, [$\x02]";
10096 case AArch64_LDURWi:
10099 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
10101 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
10105 AsmString =
"ldur $\x01, [$\x02]";
10109 case AArch64_LDURXi:
10112 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
10114 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
10118 AsmString =
"ldur $\x01, [$\x02]";
10122 case AArch64_MADDWrrr:
10125 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
10127 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) &&
10129 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2) &&
10132 AsmString =
"mul $\x01, $\x02, $\x03";
10136 case AArch64_MADDXrrr:
10139 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
10141 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) &&
10143 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) &&
10146 AsmString =
"mul $\x01, $\x02, $\x03";
10150 case AArch64_MOVKWi:
10153 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
10157 AsmString =
"movk $\x01, $\x02";
10161 case AArch64_MOVKXi:
10164 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
10168 AsmString =
"movk $\x01, $\x02";
10173 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
10177 AsmString =
"movk $\x01, $\x02";
10182 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
10186 AsmString =
"movk $\x01, $\x02";
10190 case AArch64_MSUBWrrr:
10193 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
10195 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) &&
10197 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2) &&
10200 AsmString =
"mneg $\x01, $\x02, $\x03";
10204 case AArch64_MSUBXrrr:
10207 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
10209 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) &&
10211 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) &&
10214 AsmString =
"mneg $\x01, $\x02, $\x03";
10218 case AArch64_NOTv16i8:
10221 GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 0) &&
10223 GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 1)) {
10225 AsmString =
"mvn $\xFF\x01\x06.16b, $\xFF\x02\x06.16b";
10229 case AArch64_NOTv8i8:
10232 GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 0) &&
10234 GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 1)) {
10236 AsmString =
"mvn $\xFF\x01\x06.8b, $\xFF\x02\x06.8b";
10240 case AArch64_ORNWrs:
10243 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
10246 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2) &&
10250 AsmString =
"mvn $\x01, $\x03";
10255 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
10258 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2)) {
10260 AsmString =
"mvn $\x01, $\x03$\xFF\x04\x02";
10265 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
10267 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) &&
10269 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2) &&
10273 AsmString =
"orn $\x01, $\x02, $\x03";
10277 case AArch64_ORNXrs:
10280 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
10283 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) &&
10287 AsmString =
"mvn $\x01, $\x03";
10292 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
10295 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2)) {
10297 AsmString =
"mvn $\x01, $\x03$\xFF\x04\x02";
10302 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
10304 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) &&
10306 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) &&
10310 AsmString =
"orn $\x01, $\x02, $\x03";
10314 case AArch64_ORRWrs:
10317 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
10320 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2) &&
10324 AsmString =
"mov $\x01, $\x03";
10329 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
10331 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) &&
10333 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2) &&
10337 AsmString =
"orr $\x01, $\x02, $\x03";
10341 case AArch64_ORRXrs:
10344 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
10347 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) &&
10351 AsmString =
"mov $\x01, $\x03";
10356 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
10358 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) &&
10360 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) &&
10364 AsmString =
"orr $\x01, $\x02, $\x03";
10368 case AArch64_ORRv16i8:
10371 GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 0) &&
10373 GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 1) &&
10377 AsmString =
"mov $\xFF\x01\x06.16b, $\xFF\x02\x06.16b";
10381 case AArch64_ORRv2i32:
10384 GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 0) &&
10388 AsmString =
"orr $\xFF\x01\x06.2s, $\xFF\x02\x07";
10392 case AArch64_ORRv4i16:
10395 GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 0) &&
10399 AsmString =
"orr $\xFF\x01\x06.4h, $\xFF\x02\x07";
10403 case AArch64_ORRv4i32:
10406 GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 0) &&
10410 AsmString =
"orr $\xFF\x01\x06.4s, $\xFF\x02\x07";
10414 case AArch64_ORRv8i16:
10417 GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 0) &&
10421 AsmString =
"orr $\xFF\x01\x06.8h, $\xFF\x02\x07";
10425 case AArch64_ORRv8i8:
10428 GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 0) &&
10430 GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 1) &&
10434 AsmString =
"mov $\xFF\x01\x06.8b, $\xFF\x02\x06.8b";
10438 case AArch64_PRFMroX:
10441 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
10443 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) &&
10449 AsmString =
"prfm $\xFF\x01\x16, [$\x02, $\x03]";
10453 case AArch64_PRFMui:
10456 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
10460 AsmString =
"prfm $\xFF\x01\x16, [$\x02]";
10464 case AArch64_PRFUMi:
10467 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
10471 AsmString =
"prfum $\xFF\x01\x16, [$\x02]";
10483 case AArch64_SBCSWr:
10486 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
10489 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2)) {
10491 AsmString =
"ngcs $\x01, $\x03";
10495 case AArch64_SBCSXr:
10498 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
10501 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2)) {
10503 AsmString =
"ngcs $\x01, $\x03";
10507 case AArch64_SBCWr:
10510 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
10513 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2)) {
10515 AsmString =
"ngc $\x01, $\x03";
10519 case AArch64_SBCXr:
10522 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
10525 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2)) {
10527 AsmString =
"ngc $\x01, $\x03";
10531 case AArch64_SBFMWri:
10534 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
10536 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) &&
10540 AsmString =
"asr $\x01, $\x02, $\x03";
10545 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
10547 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) &&
10553 AsmString =
"sxtb $\x01, $\x02";
10558 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
10560 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) &&
10566 AsmString =
"sxth $\x01, $\x02";
10570 case AArch64_SBFMXri:
10573 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
10575 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) &&
10579 AsmString =
"asr $\x01, $\x02, $\x03";
10584 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
10586 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) &&
10592 AsmString =
"sxtb $\x01, $\x02";
10597 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
10599 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) &&
10605 AsmString =
"sxth $\x01, $\x02";
10610 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
10612 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) &&
10618 AsmString =
"sxtw $\x01, $\x02";
10622 case AArch64_SMADDLrrr:
10625 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
10627 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) &&
10629 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2) &&
10632 AsmString =
"smull $\x01, $\x02, $\x03";
10636 case AArch64_SMSUBLrrr:
10639 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
10641 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) &&
10643 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2) &&
10646 AsmString =
"smnegl $\x01, $\x02, $\x03";
10650 case AArch64_ST1Fourv16b_POST:
10653 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
10655 GETREGCLASS_CONTAIN(AArch64_QQQQRegClassID, 1) &&
10658 AsmString =
"st1 $\xFF\x02\x0A, [$\x01], #64";
10662 case AArch64_ST1Fourv1d_POST:
10665 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
10667 GETREGCLASS_CONTAIN(AArch64_DDDDRegClassID, 1) &&
10670 AsmString =
"st1 $\xFF\x02\x0B, [$\x01], #32";
10674 case AArch64_ST1Fourv2d_POST:
10677 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
10679 GETREGCLASS_CONTAIN(AArch64_QQQQRegClassID, 1) &&
10682 AsmString =
"st1 $\xFF\x02\x0C, [$\x01], #64";
10686 case AArch64_ST1Fourv2s_POST:
10689 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
10691 GETREGCLASS_CONTAIN(AArch64_DDDDRegClassID, 1) &&
10694 AsmString =
"st1 $\xFF\x02\x0D, [$\x01], #32";
10698 case AArch64_ST1Fourv4h_POST:
10701 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
10703 GETREGCLASS_CONTAIN(AArch64_DDDDRegClassID, 1) &&
10706 AsmString =
"st1 $\xFF\x02\x0E, [$\x01], #32";
10710 case AArch64_ST1Fourv4s_POST:
10713 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
10715 GETREGCLASS_CONTAIN(AArch64_QQQQRegClassID, 1) &&
10718 AsmString =
"st1 $\xFF\x02\x0F, [$\x01], #64";
10722 case AArch64_ST1Fourv8b_POST:
10725 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
10727 GETREGCLASS_CONTAIN(AArch64_DDDDRegClassID, 1) &&
10730 AsmString =
"st1 $\xFF\x02\x10, [$\x01], #32";
10734 case AArch64_ST1Fourv8h_POST:
10737 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
10739 GETREGCLASS_CONTAIN(AArch64_QQQQRegClassID, 1) &&
10742 AsmString =
"st1 $\xFF\x02\x11, [$\x01], #64";
10746 case AArch64_ST1Onev16b_POST:
10749 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
10751 GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 1) &&
10754 AsmString =
"st1 $\xFF\x02\x0A, [$\x01], #16";
10758 case AArch64_ST1Onev1d_POST:
10761 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
10763 GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 1) &&
10766 AsmString =
"st1 $\xFF\x02\x0B, [$\x01], #8";
10770 case AArch64_ST1Onev2d_POST:
10773 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
10775 GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 1) &&
10778 AsmString =
"st1 $\xFF\x02\x0C, [$\x01], #16";
10782 case AArch64_ST1Onev2s_POST:
10785 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
10787 GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 1) &&
10790 AsmString =
"st1 $\xFF\x02\x0D, [$\x01], #8";
10794 case AArch64_ST1Onev4h_POST:
10797 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
10799 GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 1) &&
10802 AsmString =
"st1 $\xFF\x02\x0E, [$\x01], #8";
10806 case AArch64_ST1Onev4s_POST:
10809 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
10811 GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 1) &&
10814 AsmString =
"st1 $\xFF\x02\x0F, [$\x01], #16";
10818 case AArch64_ST1Onev8b_POST:
10821 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
10823 GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 1) &&
10826 AsmString =
"st1 $\xFF\x02\x10, [$\x01], #8";
10830 case AArch64_ST1Onev8h_POST:
10833 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
10835 GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 1) &&
10838 AsmString =
"st1 $\xFF\x02\x11, [$\x01], #16";
10842 case AArch64_ST1Threev16b_POST:
10845 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
10847 GETREGCLASS_CONTAIN(AArch64_QQQRegClassID, 1) &&
10850 AsmString =
"st1 $\xFF\x02\x0A, [$\x01], #48";
10854 case AArch64_ST1Threev1d_POST:
10857 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
10859 GETREGCLASS_CONTAIN(AArch64_DDDRegClassID, 1) &&
10862 AsmString =
"st1 $\xFF\x02\x0B, [$\x01], #24";
10866 case AArch64_ST1Threev2d_POST:
10869 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
10871 GETREGCLASS_CONTAIN(AArch64_QQQRegClassID, 1) &&
10874 AsmString =
"st1 $\xFF\x02\x0C, [$\x01], #48";
10878 case AArch64_ST1Threev2s_POST:
10881 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
10883 GETREGCLASS_CONTAIN(AArch64_DDDRegClassID, 1) &&
10886 AsmString =
"st1 $\xFF\x02\x0D, [$\x01], #24";
10890 case AArch64_ST1Threev4h_POST:
10893 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
10895 GETREGCLASS_CONTAIN(AArch64_DDDRegClassID, 1) &&
10898 AsmString =
"st1 $\xFF\x02\x0E, [$\x01], #24";
10902 case AArch64_ST1Threev4s_POST:
10905 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
10907 GETREGCLASS_CONTAIN(AArch64_QQQRegClassID, 1) &&
10910 AsmString =
"st1 $\xFF\x02\x0F, [$\x01], #48";
10914 case AArch64_ST1Threev8b_POST:
10917 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
10919 GETREGCLASS_CONTAIN(AArch64_DDDRegClassID, 1) &&
10922 AsmString =
"st1 $\xFF\x02\x10, [$\x01], #24";
10926 case AArch64_ST1Threev8h_POST:
10929 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
10931 GETREGCLASS_CONTAIN(AArch64_QQQRegClassID, 1) &&
10934 AsmString =
"st1 $\xFF\x02\x11, [$\x01], #48";
10938 case AArch64_ST1Twov16b_POST:
10941 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
10943 GETREGCLASS_CONTAIN(AArch64_QQRegClassID, 1) &&
10946 AsmString =
"st1 $\xFF\x02\x0A, [$\x01], #32";
10950 case AArch64_ST1Twov1d_POST:
10953 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
10955 GETREGCLASS_CONTAIN(AArch64_DDRegClassID, 1) &&
10958 AsmString =
"st1 $\xFF\x02\x0B, [$\x01], #16";
10962 case AArch64_ST1Twov2d_POST:
10965 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
10967 GETREGCLASS_CONTAIN(AArch64_QQRegClassID, 1) &&
10970 AsmString =
"st1 $\xFF\x02\x0C, [$\x01], #32";
10974 case AArch64_ST1Twov2s_POST:
10977 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
10979 GETREGCLASS_CONTAIN(AArch64_DDRegClassID, 1) &&
10982 AsmString =
"st1 $\xFF\x02\x0D, [$\x01], #16";
10986 case AArch64_ST1Twov4h_POST:
10989 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
10991 GETREGCLASS_CONTAIN(AArch64_DDRegClassID, 1) &&
10994 AsmString =
"st1 $\xFF\x02\x0E, [$\x01], #16";
10998 case AArch64_ST1Twov4s_POST:
11001 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
11003 GETREGCLASS_CONTAIN(AArch64_QQRegClassID, 1) &&
11006 AsmString =
"st1 $\xFF\x02\x0F, [$\x01], #32";
11010 case AArch64_ST1Twov8b_POST:
11013 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
11015 GETREGCLASS_CONTAIN(AArch64_DDRegClassID, 1) &&
11018 AsmString =
"st1 $\xFF\x02\x10, [$\x01], #16";
11022 case AArch64_ST1Twov8h_POST:
11025 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
11027 GETREGCLASS_CONTAIN(AArch64_QQRegClassID, 1) &&
11030 AsmString =
"st1 $\xFF\x02\x11, [$\x01], #32";
11034 case AArch64_ST1i16_POST:
11037 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
11039 GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 1) &&
11042 AsmString =
"st1 $\xFF\x02\x12$\xFF\x03\x09, [$\x01], #2";
11046 case AArch64_ST1i32_POST:
11049 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
11051 GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 1) &&
11054 AsmString =
"st1 $\xFF\x02\x13$\xFF\x03\x09, [$\x01], #4";
11058 case AArch64_ST1i64_POST:
11061 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
11063 GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 1) &&
11066 AsmString =
"st1 $\xFF\x02\x14$\xFF\x03\x09, [$\x01], #8";
11070 case AArch64_ST1i8_POST:
11073 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
11075 GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 1) &&
11078 AsmString =
"st1 $\xFF\x02\x15$\xFF\x03\x09, [$\x01], #1";
11082 case AArch64_ST2Twov16b_POST:
11085 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
11087 GETREGCLASS_CONTAIN(AArch64_QQRegClassID, 1) &&
11090 AsmString =
"st2 $\xFF\x02\x0A, [$\x01], #32";
11094 case AArch64_ST2Twov2d_POST:
11097 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
11099 GETREGCLASS_CONTAIN(AArch64_QQRegClassID, 1) &&
11102 AsmString =
"st2 $\xFF\x02\x0C, [$\x01], #32";
11106 case AArch64_ST2Twov2s_POST:
11109 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
11111 GETREGCLASS_CONTAIN(AArch64_DDRegClassID, 1) &&
11114 AsmString =
"st2 $\xFF\x02\x0D, [$\x01], #16";
11118 case AArch64_ST2Twov4h_POST:
11121 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
11123 GETREGCLASS_CONTAIN(AArch64_DDRegClassID, 1) &&
11126 AsmString =
"st2 $\xFF\x02\x0E, [$\x01], #16";
11130 case AArch64_ST2Twov4s_POST:
11133 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
11135 GETREGCLASS_CONTAIN(AArch64_QQRegClassID, 1) &&
11138 AsmString =
"st2 $\xFF\x02\x0F, [$\x01], #32";
11142 case AArch64_ST2Twov8b_POST:
11145 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
11147 GETREGCLASS_CONTAIN(AArch64_DDRegClassID, 1) &&
11150 AsmString =
"st2 $\xFF\x02\x10, [$\x01], #16";
11154 case AArch64_ST2Twov8h_POST:
11157 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
11159 GETREGCLASS_CONTAIN(AArch64_QQRegClassID, 1) &&
11162 AsmString =
"st2 $\xFF\x02\x11, [$\x01], #32";
11166 case AArch64_ST2i16_POST:
11169 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
11171 GETREGCLASS_CONTAIN(AArch64_QQRegClassID, 1) &&
11174 AsmString =
"st2 $\xFF\x02\x12$\xFF\x03\x09, [$\x01], #4";
11178 case AArch64_ST2i32_POST:
11181 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
11183 GETREGCLASS_CONTAIN(AArch64_QQRegClassID, 1) &&
11186 AsmString =
"st2 $\xFF\x02\x13$\xFF\x03\x09, [$\x01], #8";
11190 case AArch64_ST2i64_POST:
11193 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
11195 GETREGCLASS_CONTAIN(AArch64_QQRegClassID, 1) &&
11198 AsmString =
"st2 $\xFF\x02\x14$\xFF\x03\x09, [$\x01], #16";
11202 case AArch64_ST2i8_POST:
11205 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
11207 GETREGCLASS_CONTAIN(AArch64_QQRegClassID, 1) &&
11210 AsmString =
"st2 $\xFF\x02\x15$\xFF\x03\x09, [$\x01], #2";
11214 case AArch64_ST3Threev16b_POST:
11217 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
11219 GETREGCLASS_CONTAIN(AArch64_QQQRegClassID, 1) &&
11222 AsmString =
"st3 $\xFF\x02\x0A, [$\x01], #48";
11226 case AArch64_ST3Threev2d_POST:
11229 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
11231 GETREGCLASS_CONTAIN(AArch64_QQQRegClassID, 1) &&
11234 AsmString =
"st3 $\xFF\x02\x0C, [$\x01], #48";
11238 case AArch64_ST3Threev2s_POST:
11241 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
11243 GETREGCLASS_CONTAIN(AArch64_DDDRegClassID, 1) &&
11246 AsmString =
"st3 $\xFF\x02\x0D, [$\x01], #24";
11250 case AArch64_ST3Threev4h_POST:
11253 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
11255 GETREGCLASS_CONTAIN(AArch64_DDDRegClassID, 1) &&
11258 AsmString =
"st3 $\xFF\x02\x0E, [$\x01], #24";
11262 case AArch64_ST3Threev4s_POST:
11265 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
11267 GETREGCLASS_CONTAIN(AArch64_QQQRegClassID, 1) &&
11270 AsmString =
"st3 $\xFF\x02\x0F, [$\x01], #48";
11274 case AArch64_ST3Threev8b_POST:
11277 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
11279 GETREGCLASS_CONTAIN(AArch64_DDDRegClassID, 1) &&
11282 AsmString =
"st3 $\xFF\x02\x10, [$\x01], #24";
11286 case AArch64_ST3Threev8h_POST:
11289 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
11291 GETREGCLASS_CONTAIN(AArch64_QQQRegClassID, 1) &&
11294 AsmString =
"st3 $\xFF\x02\x11, [$\x01], #48";
11298 case AArch64_ST3i16_POST:
11301 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
11303 GETREGCLASS_CONTAIN(AArch64_QQQRegClassID, 1) &&
11306 AsmString =
"st3 $\xFF\x02\x12$\xFF\x03\x09, [$\x01], #6";
11310 case AArch64_ST3i32_POST:
11313 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
11315 GETREGCLASS_CONTAIN(AArch64_QQQRegClassID, 1) &&
11318 AsmString =
"st3 $\xFF\x02\x13$\xFF\x03\x09, [$\x01], #12";
11322 case AArch64_ST3i64_POST:
11325 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
11327 GETREGCLASS_CONTAIN(AArch64_QQQRegClassID, 1) &&
11330 AsmString =
"st3 $\xFF\x02\x14$\xFF\x03\x09, [$\x01], #24";
11334 case AArch64_ST3i8_POST:
11337 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
11339 GETREGCLASS_CONTAIN(AArch64_QQQRegClassID, 1) &&
11342 AsmString =
"st3 $\xFF\x02\x15$\xFF\x03\x09, [$\x01], #3";
11346 case AArch64_ST4Fourv16b_POST:
11349 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
11351 GETREGCLASS_CONTAIN(AArch64_QQQQRegClassID, 1) &&
11354 AsmString =
"st4 $\xFF\x02\x0A, [$\x01], #64";
11358 case AArch64_ST4Fourv2d_POST:
11361 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
11363 GETREGCLASS_CONTAIN(AArch64_QQQQRegClassID, 1) &&
11366 AsmString =
"st4 $\xFF\x02\x0C, [$\x01], #64";
11370 case AArch64_ST4Fourv2s_POST:
11373 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
11375 GETREGCLASS_CONTAIN(AArch64_DDDDRegClassID, 1) &&
11378 AsmString =
"st4 $\xFF\x02\x0D, [$\x01], #32";
11382 case AArch64_ST4Fourv4h_POST:
11385 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
11387 GETREGCLASS_CONTAIN(AArch64_DDDDRegClassID, 1) &&
11390 AsmString =
"st4 $\xFF\x02\x0E, [$\x01], #32";
11394 case AArch64_ST4Fourv4s_POST:
11397 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
11399 GETREGCLASS_CONTAIN(AArch64_QQQQRegClassID, 1) &&
11402 AsmString =
"st4 $\xFF\x02\x0F, [$\x01], #64";
11406 case AArch64_ST4Fourv8b_POST:
11409 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
11411 GETREGCLASS_CONTAIN(AArch64_DDDDRegClassID, 1) &&
11414 AsmString =
"st4 $\xFF\x02\x10, [$\x01], #32";
11418 case AArch64_ST4Fourv8h_POST:
11421 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
11423 GETREGCLASS_CONTAIN(AArch64_QQQQRegClassID, 1) &&
11426 AsmString =
"st4 $\xFF\x02\x11, [$\x01], #64";
11430 case AArch64_ST4i16_POST:
11433 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
11435 GETREGCLASS_CONTAIN(AArch64_QQQQRegClassID, 1) &&
11438 AsmString =
"st4 $\xFF\x02\x12$\xFF\x03\x09, [$\x01], #8";
11442 case AArch64_ST4i32_POST:
11445 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
11447 GETREGCLASS_CONTAIN(AArch64_QQQQRegClassID, 1) &&
11450 AsmString =
"st4 $\xFF\x02\x13$\xFF\x03\x09, [$\x01], #16";
11454 case AArch64_ST4i64_POST:
11457 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
11459 GETREGCLASS_CONTAIN(AArch64_QQQQRegClassID, 1) &&
11462 AsmString =
"st4 $\xFF\x02\x14$\xFF\x03\x09, [$\x01], #32";
11466 case AArch64_ST4i8_POST:
11469 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
11471 GETREGCLASS_CONTAIN(AArch64_QQQQRegClassID, 1) &&
11474 AsmString =
"st4 $\xFF\x02\x15$\xFF\x03\x09, [$\x01], #4";
11478 case AArch64_STNPDi:
11481 GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 0) &&
11483 GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 1) &&
11485 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 2) &&
11489 AsmString =
"stnp $\x01, $\x02, [$\x03]";
11493 case AArch64_STNPQi:
11496 GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 0) &&
11498 GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 1) &&
11500 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 2) &&
11504 AsmString =
"stnp $\x01, $\x02, [$\x03]";
11508 case AArch64_STNPSi:
11511 GETREGCLASS_CONTAIN(AArch64_FPR32RegClassID, 0) &&
11513 GETREGCLASS_CONTAIN(AArch64_FPR32RegClassID, 1) &&
11515 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 2) &&
11519 AsmString =
"stnp $\x01, $\x02, [$\x03]";
11523 case AArch64_STNPWi:
11526 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
11528 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) &&
11530 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 2) &&
11534 AsmString =
"stnp $\x01, $\x02, [$\x03]";
11538 case AArch64_STNPXi:
11541 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
11543 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) &&
11545 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 2) &&
11549 AsmString =
"stnp $\x01, $\x02, [$\x03]";
11553 case AArch64_STPDi:
11556 GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 0) &&
11558 GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 1) &&
11560 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 2) &&
11564 AsmString =
"stp $\x01, $\x02, [$\x03]";
11568 case AArch64_STPQi:
11571 GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 0) &&
11573 GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 1) &&
11575 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 2) &&
11579 AsmString =
"stp $\x01, $\x02, [$\x03]";
11583 case AArch64_STPSi:
11586 GETREGCLASS_CONTAIN(AArch64_FPR32RegClassID, 0) &&
11588 GETREGCLASS_CONTAIN(AArch64_FPR32RegClassID, 1) &&
11590 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 2) &&
11594 AsmString =
"stp $\x01, $\x02, [$\x03]";
11598 case AArch64_STPWi:
11601 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
11603 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) &&
11605 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 2) &&
11609 AsmString =
"stp $\x01, $\x02, [$\x03]";
11613 case AArch64_STPXi:
11616 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
11618 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) &&
11620 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 2) &&
11624 AsmString =
"stp $\x01, $\x02, [$\x03]";
11628 case AArch64_STRBBroX:
11631 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
11633 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
11635 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) &&
11641 AsmString =
"strb $\x01, [$\x02, $\x03]";
11645 case AArch64_STRBBui:
11648 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
11650 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
11654 AsmString =
"strb $\x01, [$\x02]";
11658 case AArch64_STRBroX:
11661 GETREGCLASS_CONTAIN(AArch64_FPR8RegClassID, 0) &&
11663 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
11665 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) &&
11671 AsmString =
"str $\x01, [$\x02, $\x03]";
11675 case AArch64_STRBui:
11678 GETREGCLASS_CONTAIN(AArch64_FPR8RegClassID, 0) &&
11680 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
11684 AsmString =
"str $\x01, [$\x02]";
11688 case AArch64_STRDroX:
11691 GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 0) &&
11693 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
11695 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) &&
11701 AsmString =
"str $\x01, [$\x02, $\x03]";
11705 case AArch64_STRDui:
11708 GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 0) &&
11710 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
11714 AsmString =
"str $\x01, [$\x02]";
11718 case AArch64_STRHHroX:
11721 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
11723 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
11725 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) &&
11731 AsmString =
"strh $\x01, [$\x02, $\x03]";
11735 case AArch64_STRHHui:
11738 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
11740 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
11744 AsmString =
"strh $\x01, [$\x02]";
11748 case AArch64_STRHroX:
11751 GETREGCLASS_CONTAIN(AArch64_FPR16RegClassID, 0) &&
11753 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
11755 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) &&
11761 AsmString =
"str $\x01, [$\x02, $\x03]";
11765 case AArch64_STRHui:
11768 GETREGCLASS_CONTAIN(AArch64_FPR16RegClassID, 0) &&
11770 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
11774 AsmString =
"str $\x01, [$\x02]";
11778 case AArch64_STRQroX:
11781 GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 0) &&
11783 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
11785 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) &&
11791 AsmString =
"str $\x01, [$\x02, $\x03]";
11795 case AArch64_STRQui:
11798 GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 0) &&
11800 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
11804 AsmString =
"str $\x01, [$\x02]";
11808 case AArch64_STRSroX:
11811 GETREGCLASS_CONTAIN(AArch64_FPR32RegClassID, 0) &&
11813 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
11815 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) &&
11821 AsmString =
"str $\x01, [$\x02, $\x03]";
11825 case AArch64_STRSui:
11828 GETREGCLASS_CONTAIN(AArch64_FPR32RegClassID, 0) &&
11830 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
11834 AsmString =
"str $\x01, [$\x02]";
11838 case AArch64_STRWroX:
11841 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
11843 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
11845 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) &&
11851 AsmString =
"str $\x01, [$\x02, $\x03]";
11855 case AArch64_STRWui:
11858 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
11860 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
11864 AsmString =
"str $\x01, [$\x02]";
11868 case AArch64_STRXroX:
11871 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
11873 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
11875 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) &&
11881 AsmString =
"str $\x01, [$\x02, $\x03]";
11885 case AArch64_STRXui:
11888 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
11890 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
11894 AsmString =
"str $\x01, [$\x02]";
11898 case AArch64_STTRBi:
11901 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
11903 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
11907 AsmString =
"sttrb $\x01, [$\x02]";
11911 case AArch64_STTRHi:
11914 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
11916 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
11920 AsmString =
"sttrh $\x01, [$\x02]";
11924 case AArch64_STTRWi:
11927 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
11929 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
11933 AsmString =
"sttr $\x01, [$\x02]";
11937 case AArch64_STTRXi:
11940 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
11942 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
11946 AsmString =
"sttr $\x01, [$\x02]";
11950 case AArch64_STURBBi:
11953 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
11955 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
11959 AsmString =
"sturb $\x01, [$\x02]";
11963 case AArch64_STURBi:
11966 GETREGCLASS_CONTAIN(AArch64_FPR8RegClassID, 0) &&
11968 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
11972 AsmString =
"stur $\x01, [$\x02]";
11976 case AArch64_STURDi:
11979 GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 0) &&
11981 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
11985 AsmString =
"stur $\x01, [$\x02]";
11989 case AArch64_STURHHi:
11992 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
11994 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
11998 AsmString =
"sturh $\x01, [$\x02]";
12002 case AArch64_STURHi:
12005 GETREGCLASS_CONTAIN(AArch64_FPR16RegClassID, 0) &&
12007 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
12011 AsmString =
"stur $\x01, [$\x02]";
12015 case AArch64_STURQi:
12018 GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 0) &&
12020 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
12024 AsmString =
"stur $\x01, [$\x02]";
12028 case AArch64_STURSi:
12031 GETREGCLASS_CONTAIN(AArch64_FPR32RegClassID, 0) &&
12033 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
12037 AsmString =
"stur $\x01, [$\x02]";
12041 case AArch64_STURWi:
12044 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
12046 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
12050 AsmString =
"stur $\x01, [$\x02]";
12054 case AArch64_STURXi:
12057 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
12059 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
12063 AsmString =
"stur $\x01, [$\x02]";
12067 case AArch64_SUBSWri:
12071 GETREGCLASS_CONTAIN(AArch64_GPR32spRegClassID, 1)) {
12073 AsmString =
"cmp $\x02, $\xFF\x03\x01";
12077 case AArch64_SUBSWrs:
12081 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) &&
12083 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2) &&
12087 AsmString =
"cmp $\x02, $\x03";
12093 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) &&
12095 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2)) {
12097 AsmString =
"cmp $\x02, $\x03$\xFF\x04\x02";
12102 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
12105 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2) &&
12109 AsmString =
"negs $\x01, $\x03";
12114 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
12117 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2)) {
12119 AsmString =
"negs $\x01, $\x03$\xFF\x04\x02";
12124 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
12126 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) &&
12128 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2) &&
12132 AsmString =
"subs $\x01, $\x02, $\x03";
12136 case AArch64_SUBSWrx:
12140 GETREGCLASS_CONTAIN(AArch64_GPR32sponlyRegClassID, 1) &&
12142 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2) &&
12146 AsmString =
"cmp $\x02, $\x03";
12152 GETREGCLASS_CONTAIN(AArch64_GPR32spRegClassID, 1) &&
12154 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2)) {
12156 AsmString =
"cmp $\x02, $\x03$\xFF\x04\x03";
12161 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
12163 GETREGCLASS_CONTAIN(AArch64_GPR32sponlyRegClassID, 1) &&
12165 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2) &&
12169 AsmString =
"subs $\x01, $\x02, $\x03";
12173 case AArch64_SUBSXri:
12177 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1)) {
12179 AsmString =
"cmp $\x02, $\xFF\x03\x01";
12183 case AArch64_SUBSXrs:
12187 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) &&
12189 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) &&
12193 AsmString =
"cmp $\x02, $\x03";
12199 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) &&
12201 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2)) {
12203 AsmString =
"cmp $\x02, $\x03$\xFF\x04\x02";
12208 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
12211 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) &&
12215 AsmString =
"negs $\x01, $\x03";
12220 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
12223 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2)) {
12225 AsmString =
"negs $\x01, $\x03$\xFF\x04\x02";
12230 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
12232 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) &&
12234 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) &&
12238 AsmString =
"subs $\x01, $\x02, $\x03";
12242 case AArch64_SUBSXrx:
12246 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
12248 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2)) {
12250 AsmString =
"cmp $\x02, $\x03$\xFF\x04\x03";
12254 case AArch64_SUBSXrx64:
12258 GETREGCLASS_CONTAIN(AArch64_GPR64sponlyRegClassID, 1) &&
12260 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) &&
12264 AsmString =
"cmp $\x02, $\x03";
12270 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
12272 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2)) {
12274 AsmString =
"cmp $\x02, $\x03$\xFF\x04\x03";
12279 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
12281 GETREGCLASS_CONTAIN(AArch64_GPR64sponlyRegClassID, 1) &&
12283 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) &&
12287 AsmString =
"subs $\x01, $\x02, $\x03";
12291 case AArch64_SUBWrs:
12294 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
12297 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2) &&
12301 AsmString =
"neg $\x01, $\x03";
12306 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
12309 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2)) {
12311 AsmString =
"neg $\x01, $\x03$\xFF\x04\x02";
12316 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
12318 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) &&
12320 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2) &&
12324 AsmString =
"sub $\x01, $\x02, $\x03";
12328 case AArch64_SUBWrx:
12331 GETREGCLASS_CONTAIN(AArch64_GPR32sponlyRegClassID, 0) &&
12333 GETREGCLASS_CONTAIN(AArch64_GPR32spRegClassID, 1) &&
12335 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2) &&
12339 AsmString =
"sub $\x01, $\x02, $\x03";
12344 GETREGCLASS_CONTAIN(AArch64_GPR32spRegClassID, 0) &&
12346 GETREGCLASS_CONTAIN(AArch64_GPR32sponlyRegClassID, 1) &&
12348 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2) &&
12352 AsmString =
"sub $\x01, $\x02, $\x03";
12356 case AArch64_SUBXrs:
12359 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
12362 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) &&
12366 AsmString =
"neg $\x01, $\x03";
12371 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
12374 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2)) {
12376 AsmString =
"neg $\x01, $\x03$\xFF\x04\x02";
12381 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
12383 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) &&
12385 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) &&
12389 AsmString =
"sub $\x01, $\x02, $\x03";
12393 case AArch64_SUBXrx64:
12396 GETREGCLASS_CONTAIN(AArch64_GPR64sponlyRegClassID, 0) &&
12398 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) &&
12400 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) &&
12404 AsmString =
"sub $\x01, $\x02, $\x03";
12409 GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) &&
12411 GETREGCLASS_CONTAIN(AArch64_GPR64sponlyRegClassID, 1) &&
12413 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) &&
12417 AsmString =
"sub $\x01, $\x02, $\x03";
12421 case AArch64_SYSxt:
12425 AsmString =
"sys $\x01, $\xFF\x02\x17, $\xFF\x03\x17, $\x04";
12429 case AArch64_UBFMWri:
12432 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
12434 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) &&
12438 AsmString =
"lsr $\x01, $\x02, $\x03";
12443 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
12445 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) &&
12451 AsmString =
"uxtb $\x01, $\x02";
12456 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
12458 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) &&
12464 AsmString =
"uxth $\x01, $\x02";
12468 case AArch64_UBFMXri:
12471 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
12473 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) &&
12477 AsmString =
"lsr $\x01, $\x02, $\x03";
12482 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
12484 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) &&
12490 AsmString =
"uxtb $\x01, $\x02";
12495 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
12497 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) &&
12503 AsmString =
"uxth $\x01, $\x02";
12508 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
12510 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) &&
12516 AsmString =
"uxtw $\x01, $\x02";
12520 case AArch64_UMADDLrrr:
12523 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
12525 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) &&
12527 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2) &&
12530 AsmString =
"umull $\x01, $\x02, $\x03";
12534 case AArch64_UMOVvi32:
12537 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) &&
12539 GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 1)) {
12541 AsmString =
"mov $\x01, $\xFF\x02\x06.s$\xFF\x03\x09";
12545 case AArch64_UMOVvi64:
12548 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
12550 GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 1)) {
12552 AsmString =
"mov $\x01, $\xFF\x02\x06.d$\xFF\x03\x09";
12556 case AArch64_UMSUBLrrr:
12559 GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) &&
12561 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) &&
12563 GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2) &&
12566 AsmString =
"umnegl $\x01, $\x02, $\x03";
12574 for(AsmOps =
tmp; *AsmOps; AsmOps++) {
12575 if (*AsmOps ==
' ' || *AsmOps ==
'\t') {
12584 for (
c = AsmOps; *
c;
c++) {
12587 set_mem_access(MI,
true);
12589 else if (*
c ==
']') {
12591 set_mem_access(MI,
false);
12593 else if (*
c ==
'$') {
12595 if (*
c == (
char)0xff) {
12599 PrintMethodIdx = *
c - 1;
12600 printCustomAliasOperand(MI, OpIdx, PrintMethodIdx,
OS, MRI);
12602 printOperand(MI, *
c - 1,
OS);
void arm64_op_addFP(MCInst *MI, float fp)
void arm64_op_addImm(MCInst *MI, int64_t imm)
void arm64_op_addVectorElementSizeSpecifier(MCInst *MI, int sp)
void arm64_op_addVectorArrSpecifier(MCInst *MI, int sp)
unsigned MCInst_getOpcode(const MCInst *inst)
unsigned MCInst_getNumOperands(const MCInst *inst)
MCOperand * MCInst_getOperand(MCInst *inst, unsigned i)
bool MCOperand_isReg(const MCOperand *op)
int64_t MCOperand_getImm(MCOperand *op)
unsigned MCOperand_getReg(const MCOperand *op)
getReg - Returns the register number.
bool MCOperand_isImm(const MCOperand *op)
void SStream_concat(SStream *ss, const char *fmt,...)
void SStream_concat0(SStream *ss, const char *s)
RzBinInfo * info(RzBinFile *bf)
@ ARM64_CC_NV
Always (unconditional): Always (unconditional)
@ ARM64_CC_AL
Always (unconditional): Always (unconditional)
char * cs_strdup(const char *str)
1.9.1